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Performance analysis of database join processors

Fu Tong, S. Bing Yao
1982 Proceedings of the June 7-10, 1982, national computer conference on - AFIPS '82  
The architecture and performance of a two-dimensional join processor for relational databases are introduced in this paper.  ...  The performance of several recently proposed join processor designs is also analyzed.  ...  DIALOG processors are specifically designed for VLSI implementation.  ... 
doi:10.1145/1500774.1500854 dblp:conf/afips/TongY82 fatcat:oxlgreadkzhbfoi5ikhb376gjm

Page 30 of IEEE Transactions on Computers Vol. 52, Issue 1 [page]

2003 IEEE Transactions on Computers  
His current research interests mostly relate to optimization of logic and physical design automation of VLSI circuits and FPGA related CAD tool designs and architectural analysis/optimization.  ...  His research interests are combinatorial algorithm and complexity, graph theory, and various topics in VLSI design and operations research.  ... 

VLSI implementation of a systolic database machine for relational algebra and hashing

Khaled M. Elleithy, Magdy A. Bayoumi, Lois M. Delcambre
1991 Integration  
Motivated by the simplicity of relations and the repetitive nature of the relational algebra operators, in this paper we present a cell design for a DBM.  ...  A systolic architecture for a DBM capable of performing relational algebra operations is introduced in this paper.  ...  Acknowledgements The first author gratefully acknowledges support from the King Fahd University of Petroleum and Minerals.  ... 
doi:10.1016/0167-9260(91)90018-g fatcat:id6tmjekkjenzalrunodqh2qdq

A database machine based on the data distribution approach

Yahiko Kambayashi
1984 Proceedings of the July 9-12, 1984, national computer conference and exposition on - AFIPS '84  
Various VLSI circuits, each of which realizes a specific database operation, have been studied; and a VLSI database machine can be created by a collection of these circuits.  ...  The whole system can be viewed as a file system having functions for database operations.  ...  Hiroto Yasuura, and Mr. Naofumi Takagi for their discussion. The work is supported in part by a grant from the Ministry of Education of Japan.  ... 
doi:10.1145/1499310.1499389 dblp:conf/afips/Kambayashi84a fatcat:d4lsxz2k3jhhtledeedhqlguwa

An Efficient Data Structure Layout Design for Spatial Data Organization in Geographic Information System

Animesh Tripathy, Prashanta Kumar Patra
2010 International Journal of Computer Applications  
This paper presents a design for map reading based on Corner Stitching for handling the spatial data. Corner Stitching is a technique for representing the rectangular two dimensional objects.  ...  The concept of corner stitching has been used to reduce the space complexity as well as time complexity pertaining to VLSI Layout Design.  ...  method to use for each relational operator.  ... 
doi:10.5120/1276-1602 fatcat:5qsfyzyoqjbrpimukpcwjdprt4

Research in Progress at the Massachusetts Institute of Technology Artificial Intelligence Laboratory

Berthold K. P. Horn, David Marr, John Hollerbach, Gerald J. Sussman, Patrick H. Winston, Randall Davis, Marvin L. Minsky
2017 The AI Magazine  
The MIT AI Laboratory has a long tradition of research in most aspects of Artificial Intelligence.  ...  , distributed problem solving, models of human memory, programmer apprentices, and human education.  ...  Expert Problem Solving and VLSI Design Traditional automated synthesis techniques for circuit design are restricted to small classes of circuit functions for which mathematical methods exist.  ... 
doi:10.1609/aimag.v1i1.87 fatcat:jhuogwomxrbldfrzgeur4ufkpm

Page 1142 of SMPTE Motion Imaging Journal Vol. 107, Issue 12 [page]

1998 SMPTE Motion Imaging Journal  
Must be experienced in analysis, design, and management of broadcast, cable, and related media com- munications systems.  ...  Responsible for leading a team of engineers through the successful deploy- ment of complex high-speed VLSI design solutions for video systems products.  ... 

Cascade error projection: A learning algorithm for hardware implementation [chapter]

Tuan A. Duong, Taher Daud
1999 Lecture Notes in Computer Science  
In this paper, we workout a detailed mathematical analysis for a new learning algorithm termed Cascade Error ProJection (CEP) and a general learning frame work.  ...  This frame work can be used to obtain the cascade correlation learning algorithm by choosing a particular set of parameters.  ...  Duong, and A.P. Thakoor, "Design of parallel hardware neural network systems from custom analog VLSI "building-block" chips," IEEE/INNS [8] T.A. Duong, S. P.  ... 
doi:10.1007/bfb0098202 fatcat:wt3arpsjnfazvbg4brtjoqfdyy

Guest Editorial: Special Issue on Computing Architectures for Real-Time Video/Image Analysis

Shao-Yi Chien, Shorin Kyo, Tsung-Han Tsai
2009 Journal of Signal Processing Systems  
The second part describes several design case studies of image and video analysis systems, including machine learning engines and video segmentation engines.  ...  The purpose of this special issue is to report on new hardware design ideas to support these video and image analysis tools. This special issue contains two parts.  ...  Video object segmentation is a key operation for content-based video analysis and object recognition. One popular approach is to compare the input frame with a background model.  ... 
doi:10.1007/s11265-009-0427-3 fatcat:n75semhokvcdbkyiao6lt4gwru

Guest Editorial

Stephan Olariu, Rong Lin
1999 VLSI design (Print)  
STEPHAN OLARIU and RONG LINThis special issue of VLSI Design presents a collection of seven papers selected out of more than 35 submissions received following the Call for Published by license under  ...  The papers featured in this Special Issue cover a wide range of topics from sorting to string matching, to load balancing, to simulation, matrix operations, to robotics, to the design of high-performance  ... 
doi:10.1155/1999/68076 fatcat:iwihk42q4ffupa3vv2p56rspzq

Study and Analysis of Full Adder in Different Sub-Micron Technologies with an Area Efficient Layout of 4-Bit Ripple Carry Adder

Sayan Chatterjee
2015 International Journal of Innovative Research in Computer and Communication Engineering  
His research interest include embedded system, VLSI architecture and layout designing.  ...  In this paper we analysed a full adder circuit in different sub-micron technologies and obtain low power and minimum delay of it. We also design area efficient layout of full adder schematic.  ...  Where author focused on different uses of CNT and its application relates with VLSI parameters.  ... 
doi:10.15680/ijircce.2015.0306005 fatcat:7buh43oiczhlxegmtshjl6lnom

Tutorial T3A: Testing Low-Power Integrated Circuits: Challenges, Solutions, and Industry Practices

Srivaths Ravi, Vivek Chickermane, Krishna Chakravadhanula
2014 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems  
This tutorial is intended to provide an in-depth and up-to-date understanding of low-power IC testing covering (a) dimensions of power-aware testing, (b) methods for test power analysis and signoff, (c  ...  The push for portable, battery-operated, and "cool-and-green" electronics has elevated power consumption as the defining metric of integrated circuit (IC) design.  ...  This includes implementing Low-Power ATPG techniques for gated clock designs and tools for test power analysis at different design stages.  ... 
doi:10.1109/vlsid.2014.117 dblp:conf/vlsid/RaviCC14 fatcat:flqoksm4andhvhmbuipujrpj7e

Memory-span concepts and the synthesis of sequential machines in feedback shift-register form

Robert L. Martin
1967 8th Annual Symposium on Switching and Automata Theory (SWAT 1967)  
Relational Operators and A Typical Query Optimizer The Selection operation; General selection conditions; The Project operation; The Join operation; The Set operations; Aggregate operations; The impact  ...  Properties of Relational Decompositions; Algorithms for Relational Database Schema Design; Multivalued Dependencies and Fourth Normal Form; Join Dependencies and Fifth Normal Form; Inclusion Dependencies  ...  Mobile Operating Systems Operating System, PalmOS, Windows CE, Symbian OS, Linux for Mobile Devices.  ... 
doi:10.1109/focs.1967.19 dblp:conf/focs/Martin67 fatcat:fwn5xjv7mbcsja5xrhcmdo6ipe


N. Ranganathan
2004 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
From 1998 to 1999, he was a Professor at the University of Texas, El Paso. His research interests include VLSI design, design automation, computer architecture, and parallel processing.  ...  His current research interests include design and test of hardware and software for networked computing systems, electronic design automation, wireless and embedded systems, and system-on-a-chip designs  ...  It is extremely important to maintain and enhance the reputation of the journal. TVLSI has developed into a premier journal in the fields of design, analysis, and test of VLSI systems.  ... 
doi:10.1109/tvlsi.2003.822591 fatcat:seccxp4r4vaxtb5z5yzsou5uuu

Page 21 of Hewlett-Packard Journal Vol. 37, Issue 8 [page]

1986 Hewlett-Packard Journal  
She also did the systems design, performance analysis, control im- plementation, and testability design for a VLSI mi- croprocessor for the program.  ...  She has written several papers on parallel pro- cessors, performance analysis, computer architec- ture, and VLSI structures and testing and is named inventor on several patent applications related to HP  ... 
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