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Why Comparing System-Level MPSoC Mapping Approaches is Difficult: A Case Study

Andres Goens, Robert Khasanov, Jeronimo Castrillon, Simon Polstra, Andy Pimentel
2016 2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)  
Sesame, motivated by modeling and designspace exploration, uses evolutionary algorithms for mapping. MAPS, being a compiler framework, uses simple and fast heuristics instead.  ...  Additionally, using a set of applications from the embedded systems domain, we observe that genetic algorithms tend to outperform heuristics by a factor between 1× and 5×, with notable exceptions.  ...  Finally, we would like to thank Silexica ( for making their embedded multicore software development tool available to us.  ... 
doi:10.1109/mcsoc.2016.48 dblp:conf/mcsoc/GoensKCPP16 fatcat:rzpwsazgqfhjfaygd6ghoqloh4

High Performance Computing for Embedded System Design: A Case Study

Vincenzo Catania, Gianmarco De Francisci Morales, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti
2008 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools  
In this paper we assess the use of High Performance Computing in Design Space Exploration of a complex highly parameterized Very Long Instruction Word based System-on-a-Chip platform.  ...  Experiments show that the conventional belief of linear decrease in exploration time as the number of available processors increases is discredited starting from a relatively low number of processors mainly  ...  In this paper we present a case study of design space exploration of a complex highly parameterized VLIW based SoC platform.  ... 
doi:10.1109/dsd.2008.110 dblp:conf/dsd/CataniaMNPP08 fatcat:oltt4q2t7jc65anuolvavr35ti

Towards General and Autonomous Learning of Core Skills: A Case Study in Locomotion [article]

Roland Hafner, Tim Hertweck, Philipp Klöppner, Michael Bloesch, Michael Neunert, Markus Wulfmeier, Saran Tunyasuvunakool, Nicolas Heess, Martin Riedmiller
2020 arXiv   pre-print
In this paper, we study this idea of generality in the locomotion domain.  ...  Their attraction is due in part to the fact that they can represent a general class of methods that allow to learn a solution with a reasonably set reward and minimal prior knowledge, even in situations  ...  A Supplementary Material for Submission: Towards General and Autonomous Learning of Core Skills -A Case Study in Locomotion A.1 Method Details and Hyper Parameters As defined in [6] , the problem of  ... 
arXiv:2008.12228v1 fatcat:tgrcrjbx6ja55avokjfo7wkcvm

MP core

Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timothy Sherwood, Hua Lee, Ryan Kastner
2005 Proceedings of the 42nd annual conference on Design automation - DAC '05  
Furthermore, we develop a parameterized intellectual property (IP) core, which provides a hardware implementation of the MP algorithm.  ...  The implementation of our MP core on a modern, high performance reconfigurable system is about 216 times faster than running the algorithm on a state of the art microprocessor.  ...  In section 3, different design trade-offs are discussed for the design space exploration of the parameterized MP core implementation.  ... 
doi:10.1145/1065579.1065658 dblp:conf/dac/MengBISLK05 fatcat:cr3xwijf6za2dmr2rg6x5nzu6a

Auto-tuning full applications: A case study

Ananta Tiwari, Jeffrey K Hollingsworth, Chun Chen, Mary Hall, Chunhua Liao, Daniel J Quinlan, Jacqueline Chame
2011 The international journal of high performance computing applications  
The values for these parameters are selected using a search-based auto-tuner, which performs a parallel heuristic search for the best-performing optimized variants of the outlined loop nests.  ...  Each loop nest is optimized through a series of composable code transformations, with the transformations parameterized by unbound optimization parameters that are bound during the tuning process.  ...  Qasem et al [22] use a modified version of pattern-based direct search algorithm to explore the same search space. Kisuki et al report converging to a solution in hundreds of iterations.  ... 
doi:10.1177/1094342011414744 fatcat:5fkceunxxzdtnd4c26ohtnu264

Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores

Yung-Chia Lin, Chia Han Lu, Chung-Ju Wu, Chung-Lin Tang, Yi-Ping You, Ya-Chaio Moo, Jenq-Kuen Lee
2007 Journal of Signal Processing Systems  
This paper describes our application of the open research compiler infrastructure to a novel VLIW DSP (known as the PAC DSP core) and the specific design of code generation for its register file architecture  ...  The compiler is generally regarded as the most important software component that supports a processor design to achieve success.  ...  -EC-17-A-01-S1-034 in Taiwan.  ... 
doi:10.1007/s11265-007-0059-4 fatcat:wwhl4a3d4vcurpebj3rwh2triq

Using Vivado-HLS for Structural Design: a NoC Case Study [article]

Zhipeng Zhao, James C. Hoe
2020 arXiv   pre-print
In this work, we carried out a design study to assess the effectiveness of applying Vivado-HLS in structural design.  ...  Our experience subjectively suggests that HLS is able to simplify the design effort even though much of the structural details had to be provided in the HLS description through a combination of coding  ...  The CONNECT NoC design generator is parameterized to generate packet-switched routers from a comprehensive design space.  ... 
arXiv:1710.10290v2 fatcat:yg7owiclwbcchhltzbxjoysbo4

Model robustness as a confirmatory virtue: The case of climate science

Elisabeth A. Lloyd
2015 Studies in History and Philosophy of Science Part A  
The account is intended as applicable to a broad array of sciences that use complex modeling techniques. . 1 A retrodiction is a model result that describes phenomena that have already occurred.  ...  henceforth to "predictions/retrodictions" to remind the reader that the models to which I refer in this paper all relate to phenomena that have already occurred. 2 In the context of the Pirtle et al. study  ...  These collections of models are convenience-based, since the models are not generated in an orderly way or designed to explore specific parts of the possible model-space (Knutti, Abramowitz, et al., 2010  ... 
doi:10.1016/j.shpsa.2014.12.002 pmid:26109411 fatcat:lfsho4urird5ll24a2plbykw7u

A case study of planning for smart factories

Stefan Edelkamp, Christoph Greulich
2018 International Journal on Software Tools for Technology Transfer (STTT)  
Besides validating the design of the system, the core objective of this work is to find concurrent plans that optimize the throughput of the system.  ...  We compare the results with a randomized exploration based on recent advances in Monte Carlo search.  ...  For the optimization of the production, we explore the state space induced as a system of reactive modules, probably the most widely used simulation technique.  ... 
doi:10.1007/s10009-018-0498-1 fatcat:xsktxjkbbfhjnlihpabimvsfh4

Unifying Registration based Tracking: A Case Study with Structural Similarity [article]

Abhineet Singh, Mennatullah Siam, Martin Jagersand
2017 arXiv   pre-print
Further, these are evaluated comprehensively against existing measures using a unified approach to study registration based trackers that decomposes them into three constituent sub modules - appearance  ...  model, state space model and search method.  ...  Though this decomposition is somewhat obvious and indeed has been observed before [64, 49] , it has never been explored systematically or used to improve the study of this paradigm of tracking.  ... 
arXiv:1607.04673v4 fatcat:d3wasugvlneabgadgr5llglhla

An MPEG-2 decoder case study as a driver for a system level design methodology

Pieter van der Wolf, Paul Lieverse, Mudit Goel, David La Hei, Kees Vissers
1999 Proceedings of the seventh international workshop on Hardware/software codesign - CODES '99  
We present a case study on the design of a heterogeneous architecture for MPEG-2 video decoding.  ...  We performed a design space exploration to derive how the performance of the decoder depends on the busload and the frame rate.  ...  The parameterization would then allow us to do sensitivity analysis and some design space exploration for this architecture.  ... 
doi:10.1145/301177.301196 dblp:conf/codes/WolfLGHV99 fatcat:4e6ewcwm5rdyphvimzbqgbkosq

Exploring Multi-core Design Space: Heracles vs. Rocket Chip Generator

Eduardo André Neves
2018 Journal of Computers  
This article presents the analysis and comparison of two powerful tools to explore design space and study multi-core microprocessors.  ...  RISC-V is a new instruction set architecture, developed at the University of California, Berkeley, that has several tools for designing architectures and processors that use this instruction set.  ...  The easy of use and configuration aided by its GUI makes Heracles more suitable for studying the higher levels of the multi-core design space.  ... 
doi:10.17706/jcp.13.5.555-563 fatcat:i4km2rnotfcpbgd7eqci6o6d6a

Design Flow Instantiation for Run-Time Reconfigurable Systems: A Case Study

Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen, Jari Nurmi
2008 EURASIP Journal on Embedded Systems  
At implementation level, technology-dependent tools are used to realize the run-time reconfiguration. The design case is part of a WCDMA decoder on a commercially available reconfigurable platform.  ...  In this work, we present a design flow instantiation for such systems using a real-life application. The design flow is roughly divided into two parts: system level and implementation.  ...  Instantiation for the case study For the case study, we first created a SystemC model of a fixed system, which had two purposes in the design.  ... 
doi:10.1155/2008/856756 fatcat:cwmqznktrbgfncsxlo5b2hlc6q

Application-level Performance Optimization: A Computer Vision Case Study on STHORM

Vítor Schwambach, Sébastien Cleyet-Merle, Alain Issard, Stéphane Mancini
2014 Procedia Computer Science  
We describe the process to port and optimize a face detection application onto the STHORM many-core accelerator using the STHORM OpenCL SDK.  ...  Computer vision applications constitute one of the key drivers for embedded many-core architectures.  ...  Physical prototypes are the only option, which, due to the higher setup effort and to constraints of the prototype itself, limit design space exploration.  ... 
doi:10.1016/j.procs.2014.05.100 fatcat:26cx7x7cq5a6nbnh42dxloklvi

A case study of synthesis for industrial-scale analog IP

Rodney Phelps, Michael J. Krasnicki, Rob A. Rutenbar, L. Richard Carley, James R. Hellums
2000 Proceedings of the 37th conference on Design automation - DAC '00  
A persistent criticism of analog synthesis techniques is that they cannot cope with the complexity of realistic industrial designs, especially system-level designs.  ...  its original design specifications.  ...  To counter the persistent criticism that analog design--especially design beyond basic cells--is intrinsically "too hard" to make synthesis practical, we present a case study of synthesis for one significant  ... 
doi:10.1145/337292.337297 dblp:conf/dac/PhelpsKRCH00 fatcat:2fu5rtiea5h2xovmh5kwip4h6e
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