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System-on-chip beyond the nanometer wall

Philippe Magarshack, Pierre G. Paulin
2003 Proceedings of the 40th conference on Design automation - DAC '03  
A key enabler for the effective us of these flexible SoC platforms, is a high-level parallel programming model supporting automatic specification-to-platform mapping.  ...  The second paradigm change is the emergence of domain-specific S/W programmable SoC platforms consisting of large, heterogeneous sets of embedded processors.  ...  . • The development of system-level design methods to support mixed H/W-S/W systems, from TLM to RTL [7] , [10] .  ... 
doi:10.1145/775832.775943 dblp:conf/dac/MagarshackP03 fatcat:5aotzupuyfbwfpjlrhnbxu4qz4

System-on-chip beyond the nanometer wall

Philippe Magarshack, Pierre G. Paulin
2003 Proceedings of the 40th conference on Design automation - DAC '03  
A key enabler for the effective us of these flexible SoC platforms, is a high-level parallel programming model supporting automatic specification-to-platform mapping.  ...  The second paradigm change is the emergence of domain-specific S/W programmable SoC platforms consisting of large, heterogeneous sets of embedded processors.  ...  . • The development of system-level design methods to support mixed H/W-S/W systems, from TLM to RTL [7] , [10] .  ... 
doi:10.1145/775940.775943 fatcat:eu6khphzzba3rft2l4lthyptky

Automatic layout of domain-specific reconfigurable subsystems for system-on-a-chip

Shawn Phillips, Scott Hauck
2002 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays - FPGA '02  
When designing SOCs, a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be used.  ...  We explore the standard cell method, as well as the creation of FPGA-specific standard cells.  ...  We also are indebted to Larry McMurchie for support on the Cadence tool-suite. The idea for using standard cells to implement FPGA architectures was originally proposed by Herman Schmit.  ... 
doi:10.1145/503070.503073 fatcat:vtoip256zjhf5gldbeqmhowyfy

Automatic layout of domain-specific reconfigurable subsystems for system-on-a-chip

Shawn Phillips, Scott Hauck
2002 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays - FPGA '02  
When designing SOCs, a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be used.  ...  We explore the standard cell method, as well as the creation of FPGA-specific standard cells.  ...  We also are indebted to Larry McMurchie for support on the Cadence tool-suite. The idea for using standard cells to implement FPGA architectures was originally proposed by Herman Schmit.  ... 
doi:10.1145/503048.503073 dblp:conf/fpga/PhillipsH02 fatcat:76ov364vcne3jdb5jwf46drfja

Automating the Layout of Reconfigurable Subsystems via Template Reduction [chapter]

Shawn Phillips, Akshay Sharma, Scott Hauck
2004 Lecture Notes in Computer Science  
When designing SoCs, a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be used.  ...  Template reduction enables a designer to eliminate resources from a template that are unnecessary to support the specified applic ation domain.  ...  We also are indebted to Larry McMurchie for support on the Cadence tool-suite. This work was funded in part by grants from NSF and NASA.  ... 
doi:10.1007/978-3-540-30117-2_89 fatcat:yoqxoyipmzgdhpyzvy6tsrumdq

On interplay between separation of concerns and genericity principles: Beyond code weaving

Stan Jarzabek, Kuldeep Kumar
2016 Computer Science and Information Systems  
used for generic design.  ...  We illustrate the points we make with examples of program representations built with the Adaptive Reuse Technique (ART) that supports both SoC and generic mechanisms.  ...  The ART supports both SoC and generic mechanisms.  ... 
doi:10.2298/csis160129028j fatcat:q63nfuizj5ahlhs6grn7h5sfum

Extending UML for Electronic Systems Design: A Code Generation Perspective [chapter]

Yves Vanderperren, Wolfgang Mueller, Da He, Fabian Mischkalla, Wim Dehaene
2012 Design Technology for Heterogeneous Embedded Systems  
SysML can be customized to model domain specific applications, and in particular support code generation towards SoC languages.  ...  Strong similarities exist indeed between the methods used in the area of SE and complex SoC design, such as the need for precise requirements management, heterogeneous system specification and simulation  ...  The specification first goes through all classes of the model and checks them for individual stereotypes for generating different code segments.  ... 
doi:10.1007/978-94-007-1125-9_2 fatcat:nkko7sivffe2pmtqg3s3sp52hy

Heterogeneous MP-SoC

Tim Kogel, Heinrich Meyr
2004 Proceedings of the 41st annual conference on Design automation - DAC '04  
To meet conflicting flexibility, performance and cost constraints of demanding signal processing applications, future designs in this domain will contain an increasing number of application specific programmable  ...  Currently, EDA industry develops two diverging strategies to cope with the design complexity of such application specific, heterogeneous MP-SoC platforms.  ...  In the remainder of this paper we further elaborate on architectural and methodical trends to support this thesis.  ... 
doi:10.1145/996566.996754 dblp:conf/dac/KogelM04 fatcat:oiiscg6pwffrhbpj2daf45uxcu

Specification and synthesis of real-time embedded distributed and parallel multiprocessor-based signal processing systems

Randall S. Janka, Linda M. Wills
2000 Proceedings of the international conference on Compilers, architectures, and synthesis for embedded systems - CASES '00  
This SDM is also shown to be applicable to the system-on-chip (SOC) domain, especially as embodied in a new framework called Virtual Component Co-design from Cadence Design Systems.  ...  The MAGIC SDM exploits emerging open-standards based VSIPL computation middleware and MPI communication middleware to provide connectivity between specification and design with synthesis frameworks for  ...  This framework implements a design flow very similar to MAGIC and shows great promise for sound model-continuous and pragmatic SOC specification, design, and implementation.  ... 
doi:10.1145/354880.354890 dblp:conf/cases/JankaW00 fatcat:65br3egnz5ho5np33ndxyaxtnu

UML2.0 Profiles for Embedded Systems and Systems On a Chip (SOCs)

Fateh Boutekkouk, Mohammed Benmohammed, Sebastien Bilavarn, Michel Auguin
2009 Journal of Object Technology  
TML language is too restrictive since there is no support for hierarchy and input dependant behaviour expression The design space exploration concerns only architecture, but not application.  ...  Recent embedded systems and SOCs design is confronted with the problem of the socalled productivity gap.  ...  SYSML With regard to embedded systems and SOCs particularities, there are strong similarities between the methods used in the area of System Engineering and complex SOC design, such as the need for precise  ... 
doi:10.5381/jot.2009.8.1.a1 fatcat:coirvylxd5amzmiwtz6ymxi6l4

Variability and Rigour in Service Computing Engineering

Maurice H. ter Beek, Stefania Gnesi, Alessandro Fantechi, Jose L. Fiadeiro
2011 2011 IEEE 34th Software Engineering Workshop  
, both at design time and at run time.  ...  Our proposal is to develop rigorous modelling techniques as well as analysis and verification support tools for assisting organisations to plan, optimise, and control the quality of software service provision  ...  For instance, SOC systems can benefit from SPL's variability management approaches to identify and design services targeted to multiple SOC systems.  ... 
doi:10.1109/sew.2011.24 dblp:conf/sew/BeekGFF11 fatcat:zsbwed4uxjgclgg5mhdpoxdebi

Design methods for software architectures in the service-oriented computing and cloud paradigms

M. Mora, R. V. O'Connor, F. Tsui, J. Marx Gómez
2017 Software, Practice & Experience  
We also thank Jack Paterson and all SPE journal publishing staff for your assistance on several publishing procedures.  ...  We finally thank authors and anonymous reviewers for your excellent academic work, as well as Professors Rajkumar Buyya at the University of Melbourne, Australia, and R.  ...  paradigms • Usability studies on specific software architecture design methods for SOC and Cloud Computing paradigms • Successful examples of inclusion of software architecture design methods into agile  ... 
doi:10.1002/spe.2547 fatcat:hczkujf2yfhtdjvivcykdzjowm

Model-driven software development approaches in robotics research

Arunkumar Ramaswamy, Bruno Monsuez, Adriana Tapus
2014 Proceedings of the 6th International Workshop on Modeling in Software Engineering - MiSE 2014  
In this paper, currently available modelbased techniques in robotics are analyzed with respect to the domain specific requirements.  ...  Recently, there is an encouraging trend in adopting modeldriven engineering approaches for software development in robotics research.  ...  Providing SoC to models and code can support better traceability and system evolution.  ... 
doi:10.1145/2593770.2593781 dblp:conf/icse/RamaswamyMT14 fatcat:ghqa6xsmdfa5lh3dkxzsyjlupu

A unified HW/SW interface model to remove discontinuities between HW and SW design

Aimen Bouchhima, Xi Chen, Frédéric Pétrot, Wander O. Cesário, Ahmed A. Jerraya
2005 Proceedings of the 5th ACM international conference on Embedded software - EMSOFT '05  
One major challenge in System-on-Chip (SoC) design is the definition and design of interfaces between hardware and software.  ...  The benefits of using the proposed model are two fold: first, it provides a single model to present system design from abstract specification to mixed HW/SW implementation and second, it enables full system  ...  With the support of a component library, HW/SW interfaces can be designed using a systematic method and a HW/SW interface generation tool (see Figure 4 ).  ... 
doi:10.1145/1086228.1086258 dblp:conf/emsoft/BouchhimaCPCJ05 fatcat:lszirosrsngungpofozelwqcri

Low Power Mixed-Signal SoC Integration and Verification Challenges with Third Party IP Cores

Ruchi Shankar, Prachi Mishra, Abhinav Parashar, Ashwini Padoor, Lakshmanan Balasubramanian
2019 EAI Endorsed Transactions on Cloud Systems  
These challenges involve compatibility with power, reset and clock (PRC) schemes, design methods used to achieve system low power goals, integration scalability, and design verification methods to achieve  ...  Increasing amount of third party IPs find their way onto today's complex system-on-chip (SoC) designs.  ...  their consistent motivation, opportunity and support; Saravanan Gajendran, Venkatraman Ramakrishnan, Tejas Salunkhe, Shalini Eswaran, Greg North of Texas Instruments Inc. & Graham Cunningham of ARM Inc  ... 
doi:10.4108/eai.5-11-2019.162592 fatcat:mvhtnkr6rfhszmnei4rbnbdmvm
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