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Evidence of a Larger EM-Induced Fault Model
[chapter]
2015
Lecture Notes in Computer Science
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Dehbaoui et al. [3] that an electromagnetic pulse, produced with a high voltage pulse generator and a probe similar to that used to perform EM analyses, was susceptible to create faults exploitable from ...
Electromagnetic waves have been recently pointed out as a medium for fault injection within circuits featuring cryptographic modules. Indeed, it has been experimentally demonstrated by A. ...
Fig. 10 . 10 Fault types and illustration of EM injection e↵ects for four di↵erent settings of injection parameters: (a) V pulse = 100V , perpendicular; (b) V pulse = 100V , perpendicular; (c) V pulse ...
doi:10.1007/978-3-319-16763-3_15
fatcat:wkg2xwibozhn5a4o7aku5tbsf4
EM Injection: Fault Model and Locality
2015
2015 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC)
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EM injection recently emerged as an effective medium for fault injection. This paper presents an analysis of the IC susceptibility to EM pulses. ...
It highlights that faults produced by EM pulse injection are not timing faults but correspond to a different model which is presented in this paper. ...
As illustrated, Fig. 10 , such considerations are sufficient to explain the apparition of susceptibility windows when EM injections are performed with moderated values (V thhigh > V pulse > V thlow ) ...
doi:10.1109/fdtc.2015.9
dblp:conf/fdtc/OrdasGM15
fatcat:onp7z6gfingknd2vliq2h2hkma
Electromagnetic fault injection: the curse of flip-flops
2016
Journal of Cryptographic Engineering
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ElectroMagnetic (EM) waves have been recently pointed out as a medium for fault injection within Integrated Circuits (IC). ...
This first result clearly extends the range of the threats associated with EM fault injection. ...
wrt t pulse for V pulse (a) =50 V, (b) = 100 V and (c) =150 V For V pulse = 150 V, the probability to inject of fault at any time during the course of the AES is equal to 1. ...
doi:10.1007/s13389-016-0128-3
fatcat:zvut5j5pkrc6fkoh52dwhzqzpi
Experimental Analysis of the Electromagnetic Instruction Skip Fault Model
2020
2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
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We question this fault model for EM fault injection on experimental basis and report the possibility to induce several consecutive instructions skips. ...
Microcontrollers storing valuable data or using security functions are vulnerable to fault injection attacks. ...
Fig. 3 . 3 EM-induced single instruction skip: ability to choose the skipped instruction -Faulted registers as a function of EM injection time (ns) for a −200 V voltage amplitude and 100 ns pulse width ...
doi:10.1109/dtis48698.2020.9081261
dblp:conf/dtis/MenuDPRD20
fatcat:fg7lhxgfy5cfpoantr4wpsflja
Investigation of near-field pulsed EMI at IC level
2013
2013 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)
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This article describes the use of a near-field electromagnetic pulse EMP injection technique in order to perform a hardware cryptanalysis of the AES algorithm. ...
This modification of the chip's behavior is then exploited in order to recover the AES key by using cryptanalysis techniques based on Differential Fault Analysis (DFA). ...
induced by a very short EM pulse. ...
doi:10.1109/apemc.2013.7360621
fatcat:y57rhtkx45esziqhqu3qq672qy
Detecting Electromagnetic Injection Attack on FPGAs Using In-situ Timing Sensors
2020
Journal of Hardware and Systems Security
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The area of Electromagnetic Fault Injection (EMFI) wherein attackers can use electromagnetic (EM) pulses to induce faults has started garnering increasing attention. ...
We look at one such technique that uses electromagnetic pulses to create faults in a system. ...
. • EMFI Transient Probe: The EMFI probe generates high power, fast and predictable electromagnetic pulses which are used for EM fault injection in embedded processors. ...
doi:10.1007/s41635-020-00096-9
fatcat:g5pu6spcmzastg5gczu3ls62qi
Precise Spatio-Temporal Electromagnetic Fault Injections on Data Transfers
2019
2019 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC)
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Fault injection techniques allow an attacker to alter the behavior of an electronic device in order to extract confidential information or be granted unauthorized privileges. ...
Next, we report practical persistent faults on ARM microcontroller, which allows an attacker to retrieve the secret key of a cipher with a single successful injection. ...
Setup Our EM pulse injection setup is depicted in Figure 2 . ...
doi:10.1109/fdtc.2019.00009
dblp:conf/fdtc/MenuBDRD19
fatcat:lvkr5jzlp5cuhc2pcaci6ok4m4
Practical, Low-Cost Fault Injection Attacks on Personal Smart Devices
2022
Applied Sciences
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We design and implement a low-cost fault injection circuit suitable for placement inside a malicious FRU, and show how it can be used to practically extract secrets from a privileged system process through ...
In our model, the attacker integrates a fault injection circuit into a malicious field-replaceable unit, or FRU, which is later placed by the victim in close proximity to their own device. ...
For each point, we activated the EM fault injector, which generated a pulse. ...
doi:10.3390/app12010417
fatcat:ohl2gyg43jcvfi6wgabgreelcy
Fault Attacks on Secure Embedded Software: Threats, Design and Evaluation
[article]
2020
arXiv
pre-print
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For example, the assumption that an adversary has to be close to the physical execution of software, in order to inject an exploitable fault into hardware, has repeatedly been shown to be incorrect. ...
The modified program execution is then analyzed and used as a source of information leakage, or as a mechanism for privilege escalation. ...
ACKNOWLEDGEMENTS The authors would like to thank Dennis Vermoen from Riscure Security Lab for his help and support. ...
arXiv:2003.10513v1
fatcat:paebhdl4cjhfvp7o5skttooyym
Design of a soft-error robust microprocessor
2009
Microelectronics Journal
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Therefore, a SE does not occur due to this injected fault; • SET Injection Approach 10: it was the same that SET Injection Approach 9 except SET pulses of 100 ps were injected. ...
Thus, a SE does not occur due to this injected fault; • SET Injection Approach 4: it was the same that SET Injection Approach 3, but the SET pulse was injected only on the node C from Figure 5 .6; • SET ...
Fault Injection by Simulation Fault injection experiments were performed through the post-layout gate-level simulation discussed in section 5.1.1. The goal of this simulation experiment is to verify ...
doi:10.1016/j.mejo.2008.10.001
fatcat:pfqera6sdnbshgwa3n7ptqh76u
Stratification of Hardware Attacks: Side Channel Attacks and Fault Injection Techniques
2021
SN Computer Science
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Hardware designers spent huge amount of time and effort in implementing cryptographic algorithms, keeping the analysis of design constraints into consideration. ...
Keywords Side channel attacks (SCA) • Fault injection attacks (FIA) • Fault analysis techniques • Power glitch attacks • Spectre attack • Hardware Trojan This article is part of the topical collection ...
There are various low cost techniques mentioned in the Table 4 such as supply glitches, clock glitches, EM pulse etc. ...
doi:10.1007/s42979-021-00562-3
fatcat:axqbbvgqarhnvo22ac4cdwhcby
Let's shock our IoT's heart
2018
Proceedings of the 13th International Conference on Availability, Reliability and Security - ARES 2018
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In this paper, we explore how Electromagnetic fault injection (EMFI) can be used to create vulnerabilities in sound software, targeting a Cortex-M3 microcontroller. ...
A fault attack is a well-known technique where the behaviour of a chip is voluntarily disturbed by hardware means in order to undermine the security of the information handled by the target. ...
An irreducible latency of 600ns is added by our fault injection platform between the input trigger and the EM pulse. ...
doi:10.1145/3230833.3230842
dblp:conf/IEEEares/BukasaLLL18
fatcat:xhrpeqlvpvel3h3rmtwac2vhse
On the Complexity Reduction of Laser Fault Injection Campaigns Using OBIC Measurements
2015
2015 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC)
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Laser Fault Injection (LFI) is one of the most powerful methods of inducing a fault as it allows targeting only specific areas down to single transistors. ...
An exhaustive search through all parameters including dimensions for correct timing, intensity, or length might not be not feasible. ...
for providing the SEM images. ...
doi:10.1109/fdtc.2015.10
dblp:conf/fdtc/SchellenbergFRS15
fatcat:ornfvtd3uvh7zmsvfknw4f7e4i
Modeling the Instrumentation and Control Systems of Fast Breeder Nuclear Reactor
2007
International Journal on Intelligent Electronic Systems
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Format for display of fault messages in Large Video display units at control room should take into account psychology of plant operator. ...
Improper design of Instrumentation & Control (I&C) systems is one of the main reasons for human errors during the operation and maintenance phase of Nuclear reactors. ...
If a pulse is injected in any two channels of a parameter, then the pulse is expected at EM coil. If pulse is not detected then the fault is termed as 'unsafe fault'. ...
doi:10.18000/ijies.30001
fatcat:4awjkmot7vbuthselrmn27227y
A Versatile Framework for Implementation Attacks on Cryptographic RFIDs and Embedded Devices
[chapter]
2010
Lecture Notes in Computer Science
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We present a unified framework for advanced implementation attacks that allows for conducting automated side-channel analysis and fault injection targeting all kinds of embedded cryptographic devices including ...
The corresponding data acquisition system for side-channel attacks makes precise power and EM analyses possible. ...
and EM fault injections. ...
doi:10.1007/978-3-642-17499-5_5
fatcat:yd7vx5jw5vh2boctlr2z2hjxcm
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