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Data Cache Prefetching Using a Global History Buffer

K.J. Nesbit, J.E. Smith
2005 IEEE Micro  
Acknowledgments This research was funded by an Intel undergraduate research scholarship, a University of Wisconsin Hilldale undergraduate research fellowship, and by National Science Foundation grants  ...  Table - - based data cache prefetch methods: conventional prefetch table (a); global history buffer prefetch structure (b). Table 1.  ...  Table-based data cache prefetch methods: conventional prefetch table (a); global history buffer prefetch structure (b). Figure 2 . 2 GHB global/address correlation (G/AC) prefetcher.  ... 
doi:10.1109/mm.2005.6 fatcat:aafr4nj2czf63fgyjt3siydtta

Data Cache Prefetching Using a Global History Buffer

K.J. Nesbit, J.E. Smith
10th International Symposium on High Performance Computer Architecture (HPCA'04)  
Acknowledgments This research was funded by an Intel undergraduate research scholarship, a University of Wisconsin Hilldale undergraduate research fellowship, and by National Science Foundation grants  ...  Table - - based data cache prefetch methods: conventional prefetch table (a); global history buffer prefetch structure (b). Table 1.  ...  Table-based data cache prefetch methods: conventional prefetch table (a); global history buffer prefetch structure (b). Figure 2 . 2 GHB global/address correlation (G/AC) prefetcher.  ... 
doi:10.1109/hpca.2004.10030 dblp:conf/hpca/NesbitS04 fatcat:7kobzr5wy5fyracitcela67ej4

Cache restoration for highly partitioned virtualized systems

David Daly, Harold W. Cain
2012 IEEE International Symposium on High-Performance Comp Architecture  
= Current LPID) Prefetch Engine Prefetch A0 Prefetch A1 Staging Buffer ... PFLA for partition 0  ...  We introduce cache restoration, a hardware-based prefetching mechanism initiated by the underlying virtualization software when a virtual machine is being scheduled on a core, prefetching its working set  ...  GHL prefetching We now provide a comparison of cache restoration prefetching to the only prior work in prefetching across context-switches: Global-history-list prefetching (GHL) [8] .  ... 
doi:10.1109/hpca.2012.6169029 dblp:conf/hpca/DalyC12 fatcat:oj3lparhifffnmfytdnhdbwjbu

Optimizations enabled by a decoupled front-end architecture

G. Reinman, B. Calder, T. Austin
2001 IEEE transactions on computers  
We also examine the performance of fetch-directed instruction prefetching using a multilevel branch predictor and show that an average 19 percent speedup is achieved.  ...  The decoupling enables a number of architecture optimizations, including multilevel branch predictor design, fetch-directed instruction prefetching, and easier pipelining of the instruction cache.  ...  CCR-9808697, and a grant from Compaq Computer Corporation.  ... 
doi:10.1109/12.919279 fatcat:43q2ohg7ivgl3gxadosubjq4wu

Efficient emulation of hardware prefetchers via event-driven helper threading

Ilya Ganusov, Martin Burtscher
2006 Proceedings of the 15th international conference on Parallel architectures and compilation techniques - PACT '06  
Furthermore, we demonstrate that running event-driven prefetching threads on top of a baseline with a hardware stride prefetcher yields significant speedups for many programs.  ...  This paper explores the idea of using available general-purpose cores in a CMP as helper engines for individual threads running on the active cores.  ...  A global Markov prefetcher uses a global history of the last three deltas (instead of a per-PC local history).  ... 
doi:10.1145/1152154.1152178 dblp:conf/IEEEpact/GanusovB06 fatcat:xbd5prrckjf3vlymoeipmmdcv4

Collective prefetching for parallel I/O systems

Yong Chen, Philip C. Roth
2010 2010 5th Petascale Data Storage Workshop (PDSW '10)  
In this study, we propose a new prefetching strategy, called collective prefetching.  ...  Data prefetching can be beneficial for improving parallel I/O system performance, but the amount of benefit depends on how efficiently and swiftly prefetches can be done.  ...  Alok Choudary of Northwestern University for their collective caching code.  ... 
doi:10.1109/pdsw.2010.5668089 fatcat:gthme2jfcrajlnrgvxpetwi4ve

A hardware-based cache pollution filtering mechanism for aggressive prefetches

X. Zhuang, H.-H.S. Lee
2003 2003 International Conference on Parallel Processing, 2003. Proceedings.  
In this paper, a hardware based cache pollution filtering mechanism is proposed to differentiate good and bad prefetches dynamically using a history table.  ...  As smaller L1 caches prevail in deep submicron processor designs in order to maintain short cache access cycles, cache pollution caused by ineffective prefetches is becoming a major challenge.  ...  Note that the scheme depicted in Figure 3 does not use a dedicated fully-associative prefetch buffer, instead, data are prefetched into the L1 cache directly.  ... 
doi:10.1109/icpp.2003.1240591 dblp:conf/icpp/ZhuangL03 fatcat:pygepichcjartp3x3onn7agm7a

Adaptive Granularity Based Last-Level Cache Prefetching Method with eDRAM Prefetch Buffer for Graph Processing Applications

Sae-Gyeol Choi, Jeong-Geun Kim, Shin-Dug Kim
2021 Applied Sciences  
The proposed model achieves 18% and 15% improvements in terms of energy consumption and execution time compared to global history buffer and best offset prefetchers, respectively.  ...  Therefore, we propose the concept of adaptive granularities to develop a prefetching methodology for analyzing memory access patterns based on a wider granularity concept that entails both cache lines  ...  Data Availability Statement: The data presented in this study are available on request from the corresponding author.  ... 
doi:10.3390/app11030991 fatcat:kzg44z4r6fe4hh2xu5y5jhlpnq

Data Cache Prefetching with Perceptron Learning [article]

Haoyuan Wang, Zhiwei Luo
2017 arXiv   pre-print
In this paper, a novel scheme of data cache prefetching with perceptron learning is proposed. The key idea is a two-level prefetching mechanism.  ...  The perceptron can learn from both local and global history in time and space, and can be easily implemented by hardware.  ...  GHB-based stride prefetcher and GHB-based Markov prefetcher requires a global history buffer to record history cache miss data.  ... 
arXiv:1712.00905v1 fatcat:ivqomnevvnfhhdwxj5fbe4vh3e

EdgeBuffer: Caching and prefetching content at the edge in the MobilityFirst future Internet architecture

Feixiong Zhang, Chenren Xu, Yanyong Zhang, K. K. Ramakrishnan, Shreyasee Mukherjee, Roy Yates, Thu Nguyen
2015 2015 IEEE 16th International Symposium on A World of Wireless, Mobile and Multimedia Networks (WoWMoM)  
Specifically, we propose to have a separate popularity based cache and a prefetch buffer at the network edge to capture both longterm and short-term content access patterns.  ...  Further, we point out that it is insufficient to rely on a device's past history to predict when and where to prefetch, especially in urban settings; instead, we propose to derive a prediction model based  ...  First, there exists an "optimal" size for the prefetch buffer -after the prefetch buffer reaches a certain size, cache hit ratio starts to drop.  ... 
doi:10.1109/wowmom.2015.7158137 dblp:conf/wowmom/ZhangXZRMYN15 fatcat:avcafdfpazgxpfhk6kiy7vwwva

Informed prefetching and caching

R. H. Patterson, G. A. Gibson, E. Ginting, D. Stodolsky, J. Zelenka
1995 Proceedings of the fifteenth ACM symposium on Operating systems principles - SOSP '95  
hinted blocks, caching hinted blocks for reuse, and caching recently used data for unhinted accesses.  ...  We implemented informed prefetching and caching in DEC's OSF/1 operating system and measured its performance on a 150 MHz Alpha equipped with 15 disks running a range of applications including text search  ...  Acknowledgment We wish to thank a number of people who contributed to this work including: Charlotte Fischer and the Atomic Structure Calculation Group in Department of Computer Science at Vanderbilt University  ... 
doi:10.1145/224056.224064 dblp:conf/sosp/PattersonGGSZ95 fatcat:sceyqhymjzgq3brla5tczpbtzu

Storage-Efficient Data Prefetching for High Performance Computing [chapter]

Yong Chen, Huaiyu Zhu, Hui Jin, Xian-He Sun
2012 Lecture Notes in Electrical Engineering  
It is critical to find a storage-efficient data prefetching mechanism.  ...  Many prefetching techniques have been proposed to exploit patterns among data access history that is stored in on-chip hardware table.  ...  BACKGROUND AND MOTIVATION To support stream localization and prefetching based on it, one or more hardware tables, such as Global History Buffer (GHB) [12] , are required to record useful data access  ... 
doi:10.1007/978-94-007-4516-2_11 fatcat:rxglp2rvdjbdbpvpct5evxrmre

Informed Prefetching and Caching [chapter]

2009 High Performance Mass Storage and Parallel I/O  
hinted blocks, caching hinted blocks for reuse, and caching recently used data for unhinted accesses.  ...  We implemented informed prefetching and caching in DEC's OSF/1 operating system and measured its performance on a 150 MHz Alpha equipped with 15 disks running a range of applications including text search  ...  Acknowledgment We wish to thank a number of people who contributed to this work including: Charlotte Fischer and the Atomic Structure Calculation Group in Department of Computer Science at Vanderbilt University  ... 
doi:10.1109/9780470544839.ch16 fatcat:xn47z46ga5asfanpxyxwcfyyy4

Informed prefetching and caching

R. H. Patterson, G. A. Gibson, E. Ginting, D. Stodolsky, J. Zelenka
1995 ACM SIGOPS Operating Systems Review  
hinted blocks, caching hinted blocks for reuse, and caching recently used data for unhinted accesses.  ...  We implemented informed prefetching and caching in DEC's OSF/1 operating system and measured its performance on a 150 MHz Alpha equipped with 15 disks running a range of applications including text search  ...  Acknowledgment We wish to thank a number of people who contributed to this work including: Charlotte Fischer and the Atomic Structure Calculation Group in Department of Computer Science at Vanderbilt University  ... 
doi:10.1145/224057.224064 fatcat:wlxyxqfo3bbxxd6axc57r5qdku

Predictor-directed stream buffers

Timothy Sherwood, Suleyman Sair, Brad Calder
2000 Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture - MICRO 33  
One form of data prefetching, stream buffers, has been shown to be particularly effective due to its' ability to detect data streams and run ahead of them, prefetching as it goes.  ...  Our results show for pointer-based applications that PSB provides a 30% speedup on average over no prefetching, and provides an average 10% speedup over using previously proposed stride-based stream buffers  ...  CCR-9733278, by DARPA/ITO under contract number DABT63-98-C-0045, and a grant from Compaq Computer Corporation.  ... 
doi:10.1145/360128.360135 fatcat:n2cabh27k5amhjupfzu4gxie4u
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