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Designing Efficient NoC-Based Neural Network Architectures for Identification of Epileptic Seizure

Ayut Ghosh, Arka Prava Roy, Ramapati Patra, Hemanta Kumar Mondal
2021 SN Computer Science  
In this paper, we develop NoC-based feed-forward neural network and convolutional neural network models for the identification of epileptic seizure by analysis of continuously monitored EEG signal.  ...  Artificial Neural Networks (ANNs) mirror the analytical functions of human neural networks.  ...  Certain NoCbased ANN [22] , CNN [23] and DNN [24] test systems have been proposed for simulating of NoC-based Neural Networks.  ... 
doi:10.1007/s42979-021-00756-9 fatcat:w355wtatizfj5pyp7odxmsqbhe

FangTianSim: High-Level Cycle-Accurate Resistive Random-Access Memory-Based Multi-Core Spiking Neural Network Processor Simulator

Jinsong Wei, Zhibin Wang, Ye Li, Jikai Lu, Hao Jiang, Junjie An, Yiqi Li, Lili Gao, Xumeng Zhang, Tuo Shi, Qi Liu
2022 Frontiers in Neuroscience  
Finally, the function of FangTianSim is verified on liquid state machine (LSM), fully connected neural network (FCNN), and convolutional neural network (CNN).  ...  Realization of spiking neural network (SNN) hardware with high energy efficiency and high integration may provide a promising solution to data processing challenges in future internet of things (IoT) and  ...  Two-Layer Fully Connected Neural Network The Convolutional Neural Network As shown in Figure 5 , the neural network based on convolution has a three-layer neural network (Esser et al., 2015) , and  ... 
doi:10.3389/fnins.2021.806325 pmid:35126046 pmcid:PMC8811373 fatcat:4aiwyx2chrg63oonh3fxilpib4

Shenjing: A low power reconfigurable neuromorphic accelerator with partial-sum and spike networks-on-chip [article]

Bo Wang, Jun Zhou, Weng-Fai Wong, Li-Shiuan Peh
2019 arXiv   pre-print
We show that conventional artificial neural networks (ANN) such as multilayer perceptron, convolutional neural networks, as well as the latest residual neural networks can be mapped successfully onto Shenjing  ...  The next wave of on-device AI will likely require energy-efficient deep neural networks. Brain-inspired spiking neural networks (SNN) has been identified to be a promising candidate.  ...  SYSTEM LEVEL RESULTS We developed a cycle-level functional simulator for simulating large scale neural network benchmarks that are beyond the ability of detailed RTL simulation.  ... 
arXiv:1911.10741v1 fatcat:b7oiesr6nrfybkzzotlj3c2b5q

Deep learning accelerators: a case study with MAESTRO

Hamidreza Bolhasani, Somayyeh Jafarali Jassbi
2020 Journal of Big Data  
Measured performance indicators of novel optimized architecture, NVDLA shows higher L1 and L2 computation reuse, and lower total runtime (cycles) in comparison to the other one.  ...  [8] proposed DianNao as a hardware accelerator for large-scale convolutional neural networks (CNNs) and deep neural networks (DNNs).  ...  Convolutional neural networks are a type of deep neural networks that is mostly used for recognition, mining and synthesis applications like face detection, handwritting recognition and natural language  ... 
doi:10.1186/s40537-020-00377-8 fatcat:3lxclxhhivearodnx6xpxrcoa4

Improving the Performance of a NoC-based CNN Accelerator with Gather Support [article]

Binayak Tiwari, Mei Yang, Xiaohang Wang, Yingtao Jiang, Venkatesan Muthukumar
2021 arXiv   pre-print
The increasing application of deep learning technology drives the need for an efficient parallel computing architecture for Convolutional Neural Networks (CNNs).  ...  In this paper, we propose to use the gather packet on mesh-based NoCs employing output stationary systolic array in support of many-to-one traffic.  ...  Simulation Settings A cycle accurate C++ based NoC simulator [15] is used to simulate the proposed method implemented with the OS systolic array [7] on mesh-based NoCs as shown in Fig. 2 .  ... 
arXiv:2108.02567v1 fatcat:w7irlen2abcwzdf7tieiasgvxi

Dataflow Aware Mapping of Convolutional Neural Networks Onto Many-Core Platforms With Network-on-Chip Interconnect [article]

Andreas Bytyn, René Ahlsdorf, Rainer Leupers, Gerd Ascheid
2020 arXiv   pre-print
Machine intelligence, especially using convolutional neural networks (CNNs), has become a large area of research over the past years.  ...  The strategy is then extended towards a suitable many-core mapping scheme and evaluated using a scalable system-level simulation with a network-on-chip interconnect.  ...  INTRODUCTION Convolutional neural networks (CNNs) are nowadays widely used for applications such as face recognition and object detection.  ... 
arXiv:2006.12274v1 fatcat:dyvicvvo5rf3rftqvftx2t3uya

Design Framework for ReRAM-Based DNN Accelerators with Accuracy and Hardware Evaluation

Hsu-Yu Kao, Shih-Hsu Huang, Wei-Kai Cheng
2022 Electronics  
To achieve faster design closure, there is a need to provide a design framework for the design of ReRAM-based DNN (deep neural network) accelerator at the early design stage.  ...  To our knowledge, the proposed design framework is the first behavior-level ReRAM deep learning accelerator simulator that can simulate real hardware behavior.  ...  CNN (convolutional neural network) is the most common DNN (deep neural network) to apply in many applications.  ... 
doi:10.3390/electronics11132107 fatcat:thurjlcyx5f6td5d3gwmikusqu

FLASH: Fast Neural Architecture Search with Hardware Optimization [article]

Guihong Li, Sumit K. Mandal, Umit Y. Ogras, Radu Marculescu
2021 arXiv   pre-print
Neural architecture search (NAS) is a promising technique to design efficient and high-performance deep neural networks (DNNs).  ...  We demonstrate that, compared to the state-of-the-art NAS approaches, our proposed hierarchical SHGO-based algorithm enables more than four orders of magnitude speedup (specifically, the execution time  ...  Simulation of communication fabric: We consider cycle-accurate simulation for the communication fabric. BookSim is used to perform simulation.  ... 
arXiv:2108.00568v1 fatcat:y3wnkm6un5cj7om4m2byg3nij4

Data Streaming and Traffic Gathering in Mesh-based NoC for Deep Neural Network Acceleration [article]

Binayak Tiwari, Mei Yang, Xiaohang Wang, Yingtao Jiang
2021 arXiv   pre-print
The increasing popularity of deep neural network (DNN) applications demands high computing power and efficient hardware accelerator architecture.  ...  However, the widely used mesh-based NoC architectures inherently cannot support the efficient one-to-many and many-to-one traffic largely existing in DNN workloads.  ...  A cycle-accurate C++ based NoC simulator [38] is used to simulate the generated traces for Alexnet [4] and VGG-16 [5] .  ... 
arXiv:2108.02569v1 fatcat:32hhv2aeqrgh3amn4j5fziwldi

Optimizing Routerless Network-on-Chip Designs: An Innovative Learning-Based Framework [article]

Ting-Ru Lin, Drew Penney, Massoud Pedram, Lizhong Chen
2019 arXiv   pre-print
A deep neural network is developed using parallel threads that efficiently explore the immense routerless NoC design space with a Monte Carlo search tree.  ...  This paper proposes a novel deep reinforcement framework, taking routerless networks-on-chip (NoC) as an evaluation case study.  ...  We use convolutional layers because loop placement analysis is similar to spatial analysis in image segmentation, which performs well on convolutional neural networks.  ... 
arXiv:1905.04423v1 fatcat:dlfrvxriqrevjbo5b6uwst2bcq

SMART Paths for Latency Reduction in ReRAM Processing-In-Memory Architecture for CNN Inference [article]

Sho Ko, Shimeng Yu
2020 arXiv   pre-print
This research work proposes a design of an analog ReRAM-based PIM (processing-in-memory) architecture for fast and efficient CNN (convolutional neural network) inference.  ...  We also optimize the performance of the NoC (network-on-chip) routers by decreasing hop counts using SMART (single-cycle multi-hop asynchronous repeated traversal) flow control.  ...  Simulators In the experiment, we run the cycle-accurate simulation for the processing side by building a C++ simulator from scratch.  ... 
arXiv:2004.04865v1 fatcat:els77dpqsnhrtlfy7lgx2lassu

An Artificial Neural Networks based Temperature Prediction Framework for Network-on-Chip based Multicore Platform [article]

Sandeep Aswath Narayana
2016 arXiv   pre-print
Artificial Neural Networks (ANNs) have been used in various domains for modeling and prediction with high accuracy due to its ability to learn and adapt.  ...  However, the Network-on-chip (NoC) paradigm, which has emerged as an enabling methodology for integrating hundreds to thousands of cores on the same die can contribute significantly to the thermal issues  ...  The NoC architecture is characterized using a cycle accurate simulator that models the progress of the data flits accurately per clock cycle accounting for those Fig. 9 : 9 Maximum chip temperature with  ... 
arXiv:1612.04197v1 fatcat:uoyot2zhwvfq7kigsqy5avruei

A Survey of Machine Learning Applied to Computer Architecture Design [article]

Drew D. Penney, Lizhong Chen
2019 arXiv   pre-print
This paper reviews machine learning applied system-wide to simulation and run-time optimization, and in many individual components, including memory systems, branch predictors, networks-on-chip, and GPUs  ...  Recent work, however, has explored broader applicability for design, optimization, and simulation.  ...  Additional variants such as convolutional neural networks (CNNs) incorporate convolution operations between some layers to capture spatial locality while recurrent neural networks re-use the previous output  ... 
arXiv:1909.12373v1 fatcat:o4nscgkjfbes7kqwmtjvvgl3oa

RANC: Reconfigurable Architecture for Neuromorphic Computing [article]

Joshua Mack, Ruben Purdy, Kris Rockowitz, Michael Inouye, Edward Richter, Spencer Valancius, Nirmal Kumbhare, Md Sahil Hassan, Kaitlin Fair, John Mixter, Ali Akoglu
2020 arXiv   pre-print
Neuromorphic architectures have been introduced as platforms for energy efficient spiking neural network execution.  ...  RANC allows optimizing architectures based on application insights as well as prototyping future neuromorphic architectures that can support new classes of applications entirely.  ...  Additionally, the cycle-accurate simulator they use is a general purpose NoC simulator that requires precise SystemC implementations of the NoC tiles tested.  ... 
arXiv:2011.00624v1 fatcat:blfn6a6s7bco7omnhx5tr4dnfu

NeuroXplorer 1.0: An Extensible Framework for Architectural Exploration with Spiking Neural Networks [article]

Adarsha Balaji and Shihao Song and Twisha Titirsha and Anup Das and Jeffrey Krichmar and Nikil Dutt and James Shackleford and Nagarajan Kandasamy and Francky Catthoor
2021 arXiv   pre-print
NeuroXplorer can perform both low-level cycle-accurate architectural simulations and high-level analysis with data-flow abstractions.  ...  Recently, both industry and academia have proposed many different neuromorphic architectures to execute applications that are designed with Spiking Neural Network (SNN).  ...  We select 10 machine learning programs which are representative of three most commonly-used neural network classes: convolutional neural network (CNN), multi-layer perceptron (MLP), and recurrent neural  ... 
arXiv:2105.01795v1 fatcat:yztiegjepvho5ecztv2akaj4vy
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