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Concurrent Use of Write-Once Memory [chapter]

James Aspnes, Keren Censor-Hillel, Eitan Yaakobi
2016 Lecture Notes in Computer Science  
In a sequential setting, write-once memory (WOM) codes have been developed that allow simulating memory that support multiple writes, even of large values, setting an average of 1 + o(1) write-once bits  ...  We consider the problem of implementing general shared-memory objects on top of write-once bits, which can be changed from 0 to 1 but not back again.  ...  To what extent could a small amount of rewritable shared memory allow more e ciency in use of write-once shared memory? 3.  ... 
doi:10.1007/978-3-319-48314-6_9 fatcat:r5gnseuvyncttjkdisoet2vcwq

Improving software concurrency with hardware-assisted memory snapshot

JaeWoong Chung, Jiwon Seo, Woongki Baek, Chi CaoMinh, Austen McDonald, Christos Kozyrakis, Kunle Olukotun
2008 Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures - SPAA '08  
It is built on top of the hardware resources for transactional memory and allows for easy development of system software modules such as concurrent garbage collector and dynamic profiler.  ...  We propose a hardware-assisted memory snapshot to improve software concurrency.  ...  In search of such tools, we found that memory snapshot is particularly useful for improving the concurrency of software systems [2] .  ... 
doi:10.1145/1378533.1378596 dblp:conf/spaa/ChungSBMMKO08 fatcat:dzfjsedhpzbyfdzewl4ohsjywi

Transactional Locking II [chapter]

Dave Dice, Ori Shalev, Nir Shavit
2006 Lecture Notes in Computer Science  
The transactional memory programming paradigm is gaining momentum as the approach of choice for replacing locks in concurrent programming.  ...  STMs it efficiently avoids periods of unsafe execution, that is, using its novel version-clock validation, user code is guaranteed to operate only on consistent memory states, and (3) in a sequence of  ...  The key tool in designing concurrent data structures has been the use of locks.  ... 
doi:10.1007/11864219_14 fatcat:xcnoqu6fmjhldpgoto3jdwyoau

Memory centric thread synchronization on platform FPGAs

C. Kulkarni, G. Brebner
2006 Proceedings of the Design Automation & Test in Europe Conference  
Concurrent programs are difficult to write, reason about, re-use, and maintain.  ...  In particular, for system-level descriptions that use a shared memory abstraction for thread or process synchronization, the current practice involves manual scheduling of processes, introduction of guard  ...  In addition, the latency of consumer read accesses once the corresponding producer write happens is not deterministic for the arbitrated memory organization.  ... 
doi:10.1109/date.2006.243863 dblp:conf/date/KulkarniB06 fatcat:oba44uuizvd5zoew7igsd7dqxi

Rewriting Semantics and Analysis of Concurrency Features for a C-like Language

Traian Florin Şerbănuţă
2014 Electronical Notes in Theoretical Computer Science  
To increase the confidence that these runtime verification tools can be used for testing realworld programs, the paper uses KernelC, a subset of the C programming language containing functions, memory  ...  KernelC is extended with threads and synchronization constructs, and two concurrent semantics are derived from its sequential semantics.  ...  The x86-TSO memory model used in this section associates a write buffer to each process (or thread, in our case), which collects the local updates of memory variables, and defines the semantics of memory  ... 
doi:10.1016/j.entcs.2014.05.009 fatcat:b5kloios7fewhisct24n5ylkiq

Implementing Atomic Section by Using Hybrid Concurrent Control

Lei Zhao, Yu Zhang
2007 2007 IFIP International Conference on Network and Parallel Computing Workshops (NPC 2007)  
This paper introduces a flexible hybrid concurrent control system which could harmonize the two modes of concurrent control.  ...  So far, it can only be implemented by using pessimistic or optimistic concurrent control singly.  ...  Once being aborted, T restarts without any shared memory updating. • Transaction T with O mode remains active at commit O T , it acquires all locks of its guard-objects, writing back the local copies to  ... 
doi:10.1109/npc.2007.160 fatcat:hjfoxpdrlbcifne34wcywkpxcu

Implementing Atomic Section by Using Hybrid Concurrent Control

Lei Zhao, Yu Zhang
2007 2007 IFIP International Conference on Network and Parallel Computing Workshops (NPC 2007)  
This paper introduces a flexible hybrid concurrent control system which could harmonize the two modes of concurrent control.  ...  So far, it can only be implemented by using pessimistic or optimistic concurrent control singly.  ...  Once being aborted, T restarts without any shared memory updating. • Transaction T with O mode remains active at commit O T , it acquires all locks of its guard-objects, writing back the local copies to  ... 
doi:10.1109/icnpcw.2007.4351558 fatcat:sli4u4goezcl5i2tzu4xg2xp2q

Exploiting main memory DBMS features to improve real-time concurrency control protocols

Özgür Ulusoy, Alejandro Buchmann
1996 SIGMOD record  
For each transaction the disk is only accessed once to write the log record onto disk and guarantee write-ahead logging.  ...  However, the concurrency control protocols developed so far for RTDBSs are derived from disk-resident DBMS concurrency control algorithms and do not exploit the inherent properties of main memory datab  ... 
doi:10.1145/381854.381876 fatcat:n2asnx6wcjd3hn65xz7q2uxbrq

The Transactional Memory

V. M. Dhivya Shri, K. Reshma
2019 International Journal of Scientific Research in Computer Science Engineering and Information Technology  
Its implementations operate by tracking loads and stores to memory and by detecting concurrent conflicts.  ...  TM allows programmers to write simpler programs that are composable and deadlock-freeThis essay presents remarkable similarities between transactional Memory and garbage collection.  ...  Rather, it will lead us to the balanced and obvious-once-you-say-it conclusion that transactions make it easy to define critical sections (which is a huge help in writing and maintaining shared-memory  ... 
doi:10.32628/cseit1951117 fatcat:ob62ayqwtjaa7i5ymz7jxzthja

A Practical Analysis of Rust's Concurrency Story [article]

Aditya Saligrama, Andrew Shen, Jon Gjengset
2019 arXiv   pre-print
Correct concurrent programs are difficult to write; when multiple threads mutate shared data, they may lose writes, corrupt data, or produce erratic program behavior.  ...  We detail the implementation of a concurrent lock-free hashmap in order to describe these traits of the Rust language.  ...  Frans Kaashoek at MIT Parallel and Distributed Operating Systems Group for advising us over the course of the project and for directing us to focus on the Rust language due to its concurrency-aware design  ... 
arXiv:1904.12210v1 fatcat:6ybs4cgkczgttl7slt4jds664e

DTranx: A SEDA-based Distributed and Transactional Key Value Store with Persistent Memory Log [article]

Ning Gao, Zhang Liu, Dirk Grunwald
2017 arXiv   pre-print
Moreover, we customize a hybrid commit protocol that combines optimistic concurrency control and two-phase commit to reduce critical section of distributed locking and introduce a locking mechanism to  ...  This paper proposes DTranx, a distributed key value store based on a persistent memory aware log.  ...  Experiments show that DTranx offers higher throughput than the state-of-the-art system, Hyperdex, and DTranx displays high scalability for various workloads.  ... 
arXiv:1711.09543v1 fatcat:oxm2pjmdkfgu7mjhd5swlj5e5m

Analyzing memory management methods on integrated CPU-GPU systems

Mohammad Dashti, Alexandra Fedorova
2017 Proceedings of the 2017 ACM SIGPLAN International Symposium on Memory Management - ISMM 2017  
These frameworks offer a range of memory management methods that vary in ease of use, consistency guarantees and performance.  ...  On these systems, both the CPU and GPU share the same physical memory as opposed to using separate memory dies.  ...  Once these flags are set, we can simply use cudaHostAlloc() to allocate memory without caching restrictions.  ... 
doi:10.1145/3092255.3092256 dblp:conf/iwmm/DashtiF17 fatcat:cfyj6uqohzcwvcxou2c7ukhbve

Analyzing memory management methods on integrated CPU-GPU systems

Mohammad Dashti, Alexandra Fedorova
2017 SIGPLAN notices  
These frameworks offer a range of memory management methods that vary in ease of use, consistency guarantees and performance.  ...  On these systems, both the CPU and GPU share the same physical memory as opposed to using separate memory dies.  ...  Once these flags are set, we can simply use cudaHostAlloc() to allocate memory without caching restrictions.  ... 
doi:10.1145/3156685.3092256 fatcat:2klkumxvuredza4v4wtln53hg4

Rethinking serializable multiversion concurrency control [article]

Jose M. Faleiro, Daniel J. Abadi
2015 arXiv   pre-print
In addition, Bohm does not require reads to perform any book-keeping whatsoever, thereby avoiding the overhead of tracking reads via contended writes to shared memory.  ...  We propose Bohm, a new concurrency control protocol for main-memory multi-versioned database systems. Bohm guarantees serializable execution while ensuring that reads never block writes.  ...  We thank Phil Bernstein, Alexander Thomson, and the anonymous VLDB 2015 reviewers for their insightful feedback on earlier drafts of this paper.  ... 
arXiv:1412.2324v3 fatcat:dn5fxbvjjnf7tctl7uwbljvj6i

Making the fast case common and the uncommon case simple in unbounded transactional memory

Colin Blundell, Joe Devietti, E. Christopher Lewis, Milo M. K. Martin
2007 SIGARCH Computer Architecture News  
Second, we propose ONETM to simplify the implementation of unbounded transactional memory by bounding the concurrency of transactions that overflow the cache.  ...  By holding coherence permissions for these blocks, the regular cache coherence protocol can be used to detect transactional conflicts using only a few bits of on-chip storage per overflowed cache block  ...  The per-block metadata is part of the system's architected state, existing both in caches (in addition to transactional read/write bits used by non-overflowed transactions) and memory.  ... 
doi:10.1145/1273440.1250667 fatcat:ak72eiywkjcovp546udcg7puda
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