Filters








66,509 Hits in 6.4 sec

High-speed software-based platform for embedded software of a single-chip MPEG-2 video encoder LSI with HDTV scalability

Katsuyuki Ochiai, Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Takeshi Ogura
1999 Proceedings of the conference on Design, automation and test in Europe - DATE '99  
The platform is written in C/C++ languages without any hardware description languages (HDLs) for high-speed simulation. This platform is applicable before writing up complete HDLs.  ...  The simulation speed is very fast and more than 600 times faster than compiled HDL simulators using RTL description.  ...  Susumu Ichinose of the NTT Human Interface Laboratories and Dr. Ryouta Kasai of the NTT System Electronics Laboratories for supporting this work.  ... 
doi:10.1145/307418.307510 fatcat:rnk6oznsbrb5zdsll32v35jln4

Modeling operation and microarchitecture concurrency for communication architectures with application to retargetable simulation

Xinping Zhu, Wei Qin, Sharad Malik
2004 Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04  
We show that by simulation, critical system information such as timing and communication patterns can be obtained and evaluated.  ...  both the computation and communication architectures to be modeled in a single OSM framework.  ...  As commonly observed, both the PEs and the OCA are highly concurrent hardware.  ... 
doi:10.1145/1016720.1016738 dblp:conf/codes/ZhuQM04 fatcat:w5jyxr6rffcczomscywkcaqy6e

Modeling operation and microarchitecture concurrency for communication architectures with application to retargetable simulation

Xinping Zhu, Wei Qin, S. Malik
2006 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
We show that by simulation, critical system information such as timing and communication patterns can be obtained and evaluated.  ...  both the computation and communication architectures to be modeled in a single OSM framework.  ...  As commonly observed, both the PEs and the OCA are highly concurrent hardware.  ... 
doi:10.1109/tvlsi.2006.878266 fatcat:h4tbmkvjvzcr3iyt3ssp6tnwci

Co-simulation of networked embedded control systems, a CSP-like process-oriented approach

Matthijs H. ten Berge, Bojan Orlic, Jan F. Broenink
2006 2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control  
Complex control software problems can be solved by using structured design methods that take advantage of hardware abstraction and concurrency.  ...  This separates the concerns of the control software from distribution and inter-node communication issues, creating freedom in process allocation.  ...  Fig. 4 shows the concurrency structure of the simulation environment in the study case.  ... 
doi:10.1109/cacsd-cca-isic.2006.4776685 fatcat:v4yirb6nonezhok22jlwcvck7u

Co-Simulation of Networked Embedded Control Systems, a CSP-like Process-oriented Approach

Matthijs Ten Berge, Bojan Orlic, Jan Broenink
2006 2006 IEEE Conference on Computer-Aided Control Systems Design  
Complex control software problems can be solved by using structured design methods that take advantage of hardware abstraction and concurrency.  ...  This separates the concerns of the control software from distribution and inter-node communication issues, creating freedom in process allocation.  ...  Fig. 4 shows the concurrency structure of the simulation environment in the study case.  ... 
doi:10.1109/cacsd.2006.285470 fatcat:uwt6ol6adbfsncaldrbl5cei4e

Multiple-process behavioral synthesis for mixed hardware-software systems

Jay K. Adams, Donald E. Thomas
1995 Proceedings of the 8th international symposium on System synthesis - ISSS '95  
The paper describes an automated iterativeimprovement technique for performing concurrency optimization and hardware-software trade-offs simultaneously.  ...  For this reason, the design of such systems offers an opportunity to exploit not only hardware-software trade-offs, but concurrency trade-offs as well.  ...  software and the other in hardware.  ... 
doi:10.1145/224486.224489 dblp:conf/isss/AdamsT95 fatcat:7tumvc5h2rgavdi3n3fmykjbsq

An Approach of Concurrent Communications for Distributed Sensing Networks

Tuyen P. Truong, Can Tho University, Can Tho 900000, Vietnam, Bernard Pottier
2020 Journal of Communications  
Finally, code synthesis to port on executing hardware was carried out on an actual LoRa wireless network in order to assess the feasibility and usefulness of our approach for concurrent communication.  ...  This article describes research on modeling and simulating concurrent communications of distributed wireless sensor networks for improving available network capacity.  ...  This article presents research on modeling and simulating concurrent communication in distributed wireless networks. LoRa systems have been chosen as a study case.  ... 
doi:10.12720/jcm.15.4.372-378 fatcat:3g42eyfiyvelpk4uzqoh32tywm

Wireless sensor network application programming and simulation system

Zivanov Zarko, Rakic Predrag, Hajdukovic Miroslav
2008 Computer Science and Information Systems  
We present, a wireless sensor network application programming and simulation system, suitable for wireless sensor network application development for both resource constrained and unconstrained hardware  ...  Developed programs can be tested inside simulator, or (with source unchanged) executed directly on hardware.  ...  Since preemptive concurrency model is convenient and comfortable for hardware unconstrained platforms and at the same time inappropriate for hardware constrained platforms both preemptive and non-preemptive  ... 
doi:10.2298/csis0801110z fatcat:nbh4abv46vc4zgvbyspxfdldju

Digital system simulation

Kunle Olukotun, Mark Heinrich, David Ofelt
1998 Proceedings of the 35th annual conference on Design automation conference - DAC '98  
Most systems are composed of hardware and software and it is desirable to develop the hardware and the software concurrently.  ...  Multi-level simulation can be used to support concurrent software and hardware development of an ASIP with specialized functional units in the following way.  ... 
doi:10.1145/277044.277212 dblp:conf/dac/OlukotunHO98 fatcat:5tsp43k7jvhznm5ouaipdft2mm

Hardware/software co-design of an avionics communication protocol interface system

François Clouté, Jean-Noël Contensou, Daniel Esteve, Pascal Pampagnin, Philippe Pons, Yves Favard
1999 Proceedings of the seventh international workshop on Hardware/software codesign - CODES '99  
Hardware/Software co-design is not a new idea, since designers have been used to mixing programmable and specific hardware components for algorithms implementation.  ...  This paper presents an application of the avionics domain: the ARINC communication protocol interface system.  ...  ACKNOWLEDGEMENTS We would like to thank all the members of the Internet groups of Esterel and POLIS for their precious help.  ... 
doi:10.1145/301177.301203 dblp:conf/codes/ClouteCEPPF99 fatcat:6fbq7m4gsvffxpykxd5tm6nzp4

Using a programming language for digital system design

R.K. Gupta, S.Y. Liao
1997 IEEE Design & Test of Computers  
In addition, they want to quickly produce a working hardware model, simulate it with the rest of the system, and synthesize and/or formally verify it for specific properties.  ...  Using programming languages for hardware specification can significantly shorten the system designer's learning curve and enables simulation of complete systems for correct functionality.  ...  Gupta from National Science Foundation Career Award MIP 95-01615, NSF/DARPA contract ASC-96-34947, and NSF grant EEC 89-43166.  ... 
doi:10.1109/54.587745 fatcat:sjinyujaj5b4pjhuq2v2eoqbha

Rapid C to FPGA Prototyping with Multithreaded Emulation Engine

Shin-Kai Chen, Bing-Shiun Wang, Tay-Jyi Lin, Chih-Wei Liu
2007 2007 IEEE International Symposium on Circuits and Systems  
FPGA prototyping is preferred over software simulations for its more convincing & realistic behaviours and fast simulation time.  ...  This paper describes an earlystage FPGA prototyping flow, which starts from C sources, through hardware/software partitioning with transactionlevel modelling (TLM), to the RTL design.  ...  After hardware/software partition, data communications in untimed TLM model are replaced with hardware queues.  ... 
doi:10.1109/iscas.2007.378476 dblp:conf/iscas/ChenWLL07 fatcat:pci3xw5ksvgatbompdsbpn56eq

Hardware/software partitioning of embedded system in OCAPI-xl

G. Vanmeerbeeck, P. Schaumont, S. Vernalde, M. Engels, I. Bolsens
2001 Proceedings of the ninth international symposium on Hardware/software codesign - CODES '01  
With OCAPI-xl, we developed a methodology in which the partitioning decision can be made anywhere in the design flow, even just prior to doing code-generation for both HW and SW.  ...  The implementation of embedded networked appliances requires a mix of processor cores and HW accelerators on a single chip.  ...  It is described in 25 concurrent processes that are communicating with each other using 32 semaphores, 32 messages and are sharing 45 variables.  ... 
doi:10.1145/371636.371665 dblp:conf/codes/VanmeerbeeckSVEB01 fatcat:jyybsladorfh7f7z4ifyj3aiwu

Concurrency emulation and analysis of parallel applications for multi-processor system-on-chip co-design

Giovanni Beltrame, Luca Fossati, Donatella Sciuto
2008 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis - CODES/ISSS '08  
Results show that our methodology enables (a) fast simulation of POSIX applications, (b) accurate analysis of multi-threaded applications, and (c) co-design and fast preliminary hardware-software partitioning  ...  This paper presents a novel technique for the modeling and the simulation of parallel applications for Multi-Processor Systems-on-Chip (MPSoCs).  ...  The concurrent design of hardware and software aims at mitigating these issues, allowing software to be developed before the final hardware is ready.  ... 
doi:10.1145/1450135.1450138 dblp:conf/codes/BeltrameFS08 fatcat:n4vshi5jabgo7lzatn2f4ia6ui

Hardware — Software co-design of embedded telecommunication systems [chapter]

N. S. Voros, S. Tsasakou, C. Valderrama, S. Arab, A. Birbas, M. Birbas, V. Mariatos, A. Andritsou
1998 IFIP Advances in Information and Communication Technology  
It defines a platfonn that integrates different notations and, the necessary mechanisms to handle different in nature models in a coherent way.  ...  In this paper a co-design methodology based on multifonnalism modelling is presented.  ...  The distributed co-simulation environment is composed of a VHDL simulator (VSS: VHDL SYNOPSYS Simulator) for hardware components and C-debuggers (any tools in the market) for software modules communicating  ... 
doi:10.1007/978-0-387-35394-4_24 fatcat:hllxpix4y5h73af3qyn5bjduke
« Previous Showing results 1 — 15 out of 66,509 results