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Lightweight Error Correction Coding for System-Level Interconnects

Jason D. Bakos, Donald M. Chiarulli, Steven P. Levitan
2007 IEEE transactions on computers  
Lightweight Hierarchical Error Control Coding (LHECC)" is a new class of nonlinear block codes that is designed to increase noise immunity and decrease error rate for high-performance chip-to-chip and  ...  The effectiveness of these codes is demonstrated by modeling error behavior of MBDS interconnects over a range of transmission rates and noise characteristics.  ...  These corrected high-level code symbols, along with each corresponding sampled nCm symbol received in error, are used to compute the corrected nCm symbols from the code word.  ... 
doi:10.1109/tc.2007.49 fatcat:cuayef2kefcx7n334z3ewuozty

Bit Error Rate Analysis of ReedSolomon Code for Efficient Communication System

Sanjeev Kumar, Ragini Gupta
2011 International Journal of Computer Applications  
High bit error rates of the wireless communication system require employing various coding methods on the data transferred.  ...  Channel coding for error detection and correction helps the communication system designers to reduce the effects of a noisy transmission channel.  ...  BER performance comparison of RS codes for different code rates and block lengths ), and mapping these blocks into code words in c.  ... 
doi:10.5120/3710-5174 fatcat:qtyzvh4ynrextok3su7zmyc72i

Review of FPGA Implementation of Reed-Solomon Encoder-Decoder

Vaibhav J.Babrekar, Swati V. Sakhare
2014 International Journal of Computer Applications  
RS code is a type of Forward Error Correction (FEC) code and it is a nonbinary, linear and cyclic block error correcting code.  ...  RS codes are the most powerful in the family of linear block codes and are arguably the most widely used type of error control codes.  ...  Error correction If the error symbol has any set bit, it means that the corresponding bit in the received symbol is having an error, and must be inverted.  ... 
doi:10.5120/15228-3749 fatcat:7m6ayuwkajatvgq47cxozkbini

Performance Analysis of Reed-Solomon Codes Concatenated with Convolutional Codes over AWGN Channel

Kattaswamy Mergu
2016 APTIKOM Journal on Computer Science and Information Technologies  
The performance of the concatenation of Reed-Solomon codes with Convolutional codes can be evaluated by finding bit error rate with various values of signal-to-noise ratio over AWGN channel.  ...  In this communication, Coding plays a prominent role to contribute error free transmission through channel coding which improves capacity of a channel by adding some redundant bit to the original information  ...  This is called error correction. Algorithm for Reed-Solomon Decoding: a. The received code word r(X) is the original code word U(X) plus error code word e(X) i.e., r(X) = U(X)+e(X) b.  ... 
doi:10.34306/csit.v1i1.41 fatcat:znlu5oq72faqtbqz7zcwarzqsq

Performance Analysis of Reed-Solomon Codes Concatenated with Convolutional Codes over AWGN Channel

Kattaswamy Mergu
2016 APTIKOM Journal on Computer Science and Information Technologies  
The performance of the concatenation of Reed-Solomon codes with Convolutional codes can be evaluated by finding bit error rate with various values of signal-to-noise ratio over AWGN channel.  ...  In this communication, Coding plays a prominent role to contribute error free transmission through channel coding which improves capacity of a channel by adding some redundant bit to the original information  ...  This is called error correction. Algorithm for Reed-Solomon Decoding: a. The received code word r(X) is the original code word U(X) plus error code word e(X) i.e., r(X) = U(X)+e(X) b.  ... 
doi:10.11591/aptikom.j.csit.100 fatcat:32rtexllebgzbjyz7gv6u5sliy

Forward-error correction with decision feedback

George I. Davida, Sudhakar M. Reddy
1972 Information and Control  
It is shown to be superior to forward error correction in rate and probability of error.  ...  For low channel errors the resulting rate is higher than that of retransmission with no significant difference in the probability of error.  ...  They would also like to thank the reviewers for correcting errors in an earlier version of the manuscript. RECEIVED: M a y 6, 1971  ... 
doi:10.1016/s0019-9958(72)90057-5 fatcat:cwdca25gfzejbcrsqvh7tncgmy

Performance Analysis of Linear Block Code, Convolution code and Concatenated code to Study Their Comparative Effectiveness

Mr.Vishal G Jadhao
2012 IOSR Journal of Electrical and Electronics Engineering  
Error coding uses mathematical formulas to encode data bits at the source into longer bit words for is transmission. Decoding of the code word is possible at side of receiver.  ...  Faster processors and better communications technology make more complex coding schemes, with better error detecting and correcting capabilities, possible for smaller embedded systems, allowing for more  ...  Error coding uses mathematical formulas to encode data bits at the source into longer bit words for transmission. The "code word" can then be decoded at the destination to retrieve the information.  ... 
doi:10.9790/1676-0115361 fatcat:7k43c2k24zdgnbvwk56iodmzx4

Approximating The Protection Offered By A Channel Code In Terms Of Bit Error Rate

Fabrice Labeau, Claude Desset, Benot Macq, Luc V, Erdorpe
1998 Zenodo  
Publication in the conference proceedings of EUSIPCO, Rhodes, Greece, 1998  ...  We propose here an approximation of the bit error rate of a channel protected by a linear block error correcting code.  ...  We will limit ourselves to linear block codes. An (n; k) block code maps a k-bit symbol to an n-bit codeword, adding thus n k redundancy bits to the original signal.  ... 
doi:10.5281/zenodo.36903 fatcat:2ivaiimzevh6voahh6hfhvtppi

On the Construction and Decoding of Concatenated Polar Codes [article]

Hessam Mahdavifar, Mostafa El-Khamy, Jungwon Lee, Inyup Kang
2013 arXiv   pre-print
We also propose decoding algorithms for concatenated polar codes, which significantly improve the error-rate performance at finite block lengths while preserving the low decoding complexity.  ...  A scheme for concatenating the recently invented polar codes with interleaved block codes is considered.  ...  For the concatenation scheme, we define the block error rate as the error rate of the sub-blocks of data corresponding to each inner polar codeword.  ... 
arXiv:1301.7491v1 fatcat:dy7koswl5fadvbl5wsik5j6uxu

Tensor-product Parity codes: combination with constrained codes and application to perpendicular recording

P. Chaichanavong, P.H. Siegel
2006 IEEE transactions on magnetics  
We simulate the performance of several coding systems based upon the two combination methods on a perpendicular recording channel, and we compare their symbol error rates and sector error rates with those  ...  The second method uses a new technique, which we call word-set partitioning, to achieve a higher code rate relative to the first method.  ...  ACKNOWLEDGMENT This work was supported in part by the Information Storage Industry Consortium (INSIC), the Center for Magnetic Recording Research (CMRR), and the National Science Foundation (NSF) under  ... 
doi:10.1109/tmag.2005.861747 fatcat:p77u4b4q4ndv3lpiz47bybow34

Performance analysis and optimization of concatenated block-turbo coding schemes

A. Perotti, G. Montorsi, S. Benedetto
2004 2004 IEEE International Conference on Communications (IEEE Cat. No.04CH37577)  
The performance of the concatenated code is evaluated through a semi-analytical approach, based on the expression of the word error probability at the output of the outer decoder as a function of the error  ...  The proposed technique yields results that depend on the size of the interleaver, and permits to obtain trade-offs between that size and the outer code characteristics.  ...  turbo code with rate R (i) c = 1/2 and information block lengths k (i) = 512 and 2, 048 bits, and for Reed-Solomon codes with symbol size m = 5, . . . , 8 bits.  ... 
doi:10.1109/icc.2004.1312505 dblp:conf/icc/PerottiMB04 fatcat:3lpkex5ygzhtho4tdbotkwqcmi

Design, optimization and Real Time implementation of a new Embedded Chien Search Block for Reed-Solomon (RS) and Bose-Chaudhuri-Hocquenghem (BCH) codes on FPGA Board

Azeddine Wahbi, Anas el Habti el Idrissi, Ahmed Roukhe, Bahloul Bensassi, Laamari Hlou
2021 International Journal of Communication Networks and Information Security  
The development of error correcting codes has been a major concern for communications systems.  ...  Also, the performance of the designed embedded Chien search block for decoder RS\BCH (255, 239) has been successfully verified by implementation on FPGA board.  ...  encoder takes k data symbols of m bits each, appends n-k parity symbols, and produces a code word of n symbols (each of m bits). • Polynomial Message The message that needs to be encoded in one block consists  ... 
dblp:journals/ijcnis/WahbiIRBH21 fatcat:vghy2gdri5h3va3zzhiwsbtfsa

Comparative Performance Analysis of Block and Convolution Codes

Manika Pandey, Vimal Kant Pandey
2015 International Journal of Computer Applications  
Error Correction Codes are required to have a reliable communication within a channel having an unacceptable bit error rate and low SNR (signal to noise ratio).  ...  Channel coding for error detection and correction helps communication system designers in reduction of effects caused due to noise in the transmission channel.  ...  For a reliable communication that has an acceptable Bit Error Rate (BER) and High Signal to Noise Ratio (SNR) these codes are used.  ... 
doi:10.5120/21388-4398 fatcat:m3krdyaffbczbowitrbd4h2s24

Computer Arithmetic Preserving Hamming Distance of Operands in Operation Result [article]

Shlomi Dolev, Sergey Frenkel, Dan Tamir
2011 arXiv   pre-print
This paper presents a new method for fault tolerant computing where for a given error rate, the hamming distance between correct inputs and faulty inputs as well as the hamming distance between a correct  ...  The traditional approach to fault tolerant computing involves replicating computation units and applying a majority vote operation on individual result bits.  ...  For example, a 32-bit ALU would require a 6-bit BCP Symbol, while our method would require a 7-bit symbol, but the BCP based circuit cannot correct the errors.  ... 
arXiv:1104.3310v1 fatcat:os7sktw725gbdm4ovyg3nohtwi

Implementation of Product Reed Solomon Codes for Multi level cell Flash controller

A Lakshm
2013 IOSR Journal of Electronics and Communication Engineering  
The Product Reed Solomon code consists of two shortened Reed-Solomon codes and a conventional Reed-Solomon code. It can correct up to certain symbol errors.  ...  Error control coding (ECC) is essential for correcting errors in Flash memories.In order to correct multiple random errors and burst errors, an efficient decoding algorithms are required.In this work (  ...  It can correct up to certain symbol errors. The proposed code is Product Reed Solomon code scheme used for flash memories. This code can correct burst errors and multiple random errors.  ... 
doi:10.9790/2834-0653140 fatcat:bkcmknxkjracjjk4vbru6wo6a4
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