Filters








203,225 Hits in 5.0 sec

Computer architecture in the 1990s

H.S. Stone, J. Cocke
1991 Computer  
Trade and integration in the 1990s In the 1990s the Argentine external sector has changed greatly.  ...  ratios computed for a larger category of goods such as industrial goods.  ... 
doi:10.1109/2.84897 fatcat:ys3pamzjxvb3rjyarr52zurhqi

Analysis of multithreaded architectures for parallel computing

R. Saavedra-Barrera, D. Culler, T. von Eicken
1990 Proceedings of the second annual ACM symposium on Parallel algorithms and architectures - SPAA '90  
Multithreading has been proposed as an architectural strategy for tolerating latency in multiprocessors and, through limited empirical studies, shown to offer promise.  ...  The model gives rise to a large Markov chain, which is solved to obtain a formula for processor efficiency in terms of the number of threads per processor, the remote reference rate, the latency, and the  ...  Computing resources were provided in part by the National Science Foundation through the UCB Mammoth project under grant CDA-8722788.  ... 
doi:10.1145/97444.97683 dblp:conf/spaa/Saavedra-BarreraCE90 fatcat:xabyoewzdjg2dio3co4x2lwfrq

Maximizing performance in a striped disk array

Peter M. Chen, David A. Patterson
1990 Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90  
In this paper, we address how to stripe data to get maximum performance from the disks.  ...  Improvements in disk speeds have not kept up with improvements in processor and memory speeds. One way to correct the resulting speed mismatch is to stripe data across many disks.  ...  Introduction In recent years, computer technology has advanced at an astonishing rate: processor speed, memory speed, and memory size have grown exponentially over the past few years [Bell84, Joy85, Moore75  ... 
doi:10.1145/325164.325158 dblp:conf/isca/ChenP90 fatcat:kh3c3zwpm5cfdgyhjtksqsl7sm

Boosting beyond static scheduling in a superscalar processor

Michael D. Smith, Monica S. Lam, Mark A. Horowitz
1990 Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90  
We are indebted to Mike Johnson of Advanced Micro Devices, Inc. for the use of his simulator, and to Neil Wilhelm of DEC for his help in the design of the TORCH architecture.  ...  Acknowledgements Mike Smith was supported in part through Digital Equipment Corporation's contributions to the Center for Integrated Systems at Stanford University.  ...  However, the overhead and complexity of speculative computation in compilers has prevented efficient parallelization of non-numerical code.  ... 
doi:10.1145/325164.325160 dblp:conf/isca/SmithLH90 fatcat:c73wgog74fe7rlhzz4wwrky3yq

Efficient parallel computation of arrangements of hyperplanes in d dimensions

Torben Hagerup, H. Jung, E. Welzl
1990 Proceedings of the second annual ACM symposium on Parallel algorithms and architectures - SPAA '90  
We propose the jirst optimal parallel algorithm computing arrangements of hyperplanes in Ed (d 2 2).  ...  The algorithm is randomized and computes the arrangement of n hyperplanes within expected logarithmic time on a CRCW-PRAM with O(nd/ log n) processors.  ...  We propose another approach to circumvent the problems of the recursive divide-and-conquer technique. @ 1990 ACM 08979 l-370-1/90/0007/0290 $1.50 We randomly choose a "large" subset of the input set and  ... 
doi:10.1145/97444.97696 dblp:conf/spaa/HagerupJW90 fatcat:ulzpwpt4bvfl5pfpcduyc42na4

Memory consistency and event ordering in scalable shared-memory multiprocessors

Kourosh Gharachorloo, Daniel Lenoski, James Laudon, Phillip Gibbons, Anoop Gupta, John Hennessy
1990 Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90  
Unless carefully controlled, such architectural optimizations can cause memory accesses to be executed in an order different from what the programmer expects.  ...  In addition, memory accesses are cached, buffered, and pipelined to bridge the gap between the slow shared memory and the fast processors.  ...  We also wish to thank the reviewers for their helpful comments. This research was supported by DARPA contract N00014-87-K-0828. Daniel Lenoski is supported by Tandem Computer Incorporated.  ... 
doi:10.1145/325164.325102 dblp:conf/isca/GharachorlooLLGGH90 fatcat:yvf46b773fa2hb33ub5gsvgwhm

A VMM security kernel for the VAX architecture

P.A. Karger, M.E. Zurko, D.W. Bonin, A.H. Mason, C.E. Kahn
1990 Proceedings. 1990 IEEE Computer Society Symposium on Research in Security and Privacy  
This paper describes the development of a virtual-machine monitor (VMM) security kernel for the VAX architecture.  ...  The kernel performs sufficiently well that all of its development is now carried out in virtual machines running on the kernel itself, rather than in a conventional time-sharing system.  ...  VAX security kernel is current] y (as of February 1990) in thc Design Analysis Phase with the National Computer Security Center (NCSC) for an Al rating.  ... 
doi:10.1109/risp.1990.63834 dblp:conf/sp/KargerZBMK90 fatcat:sxir3rrvlfehrea4atviaamyfa

Supporting systolic and memory communication in iWarp

Shekhar Borkar, Craig Peterson, Jim Susman, Jim Sutton, John Urbanski, Jon Webb, Robert Cohn, George Cox, Thomas Gross, H. T. Kung, Monica Lam, Margie Levine (+2 others)
1990 Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90  
In addition, the computation agent can redirect messages by changing the connection of the pathways in the communication agent's logical crossbar.  ...  On the control side, the computation agent informs the communication agent of the events it is interested in and the communication agent notifies the computation agent when an event occurs.  ...  Acknoyledgements We appreciate the contributions of Dave Nedwek and An Nguyen, of Intel Corp. to the design and implementation of the iWarp communication system.  ... 
doi:10.1145/325164.325116 dblp:conf/isca/BorkarCCGKLLMMPSSUW90 fatcat:u34kdq5fdjei5ngq4vop4h34hq

The general architecture of generation in ACORD

Dieter Kohl, Agnes Plainfossé, Claire Gardent
1990 Proceedings of the 13th conference on Computational linguistics -   unpublished
This paper describes the general architecture of generation in the ACORD project.  ...  The central module of this architecture is a planning component, which allows to plan single sentences as an answer to a KB query.  ...  Architecture of the generator The answer process consists of the following steps: e The question is parsed.  ... 
doi:10.3115/991146.991228 fatcat:n226zehbnrbgtp2m3xuh5s3aji

Maximizing performance in a striped disk array

P.M. Chen, D.A. Patterson
[1990] Proceedings. The 17th Annual International Symposium on Computer Architecture  
In this paper, we address how to stripe data to get maximum performance from the disks.  ...  Improvements in disk speeds have not kept up with improvements in processor and memory speeds. One way to correct the resulting speed mismatch is to stripe data across many disks.  ...  Introduction In recent years, computer technology has advanced at an astonishing rate: processor speed, memory speed, and memory size have grown exponentially over the past few years [Bell84, Joy85, Moore75  ... 
doi:10.1109/isca.1990.134542 fatcat:ibtiqwrhq5f6tiel47diyaxjxe

Boosting beyond static scheduling in a superscalar processor

M.D. Smith, M.S. Lam, M.A. Horowitz
[1990] Proceedings. The 17th Annual International Symposium on Computer Architecture  
We are indebted to Mike Johnson of Advanced Micro Devices, Inc. for the use of his simulator, and to Neil Wilhelm of DEC for his help in the design of the TORCH architecture.  ...  Acknowledgements Mike Smith was supported in part through Digital Equipment Corporation's contributions to the Center for Integrated Systems at Stanford University.  ...  However, the overhead and complexity of speculative computation in compilers has prevented efficient parallelization of non-numerical code.  ... 
doi:10.1109/isca.1990.134545 fatcat:zukbu5c4mvgjngkyantc2uh7lm

Determination of Algorithm Parallelism in NP-Complete Problems for Distributed Architectures

R.A. Beard, G.B. Lamont
Proceedings of the Fifth Distributed Memory Computing Conference, 1990.  
First, three methods used General Architecture There exist many methods to classify computers in general and parallel computers in particular.  ...  Clearly, the mythical architecture specified in the previous analysis is the ideal parallel computer for this implementation.  ...  The branch- to generate the final row of the D' matrix is computed as follows: [24557245535672364678 min[cj/jSjj] = min[ 3'i 3 3'3'12',2'l' 92'12'l'1 3',2'l'l' ,2')1, 1,-,1 ] 11 To compute the  ... 
doi:10.1109/dmcc.1990.555360 fatcat:k7z4pnf5unba7afp7ctb5y4n5a

Memory consistency and event ordering in scalable shared-memory multiprocessors

K. Gharachorloo, D. Lenoski, J. Laudon, P. Gibbons, A. Gupta, J. Hennessy
[1990] Proceedings. The 17th Annual International Symposium on Computer Architecture  
Unless carefully controlled, such architectural optimizations can cause memory accesses to be executed in an order different from what the programmer expects.  ...  In addition, memory accesses are cached, buffered, and pipelined to bridge the gap between the slow shared memory and the fast processors.  ...  We also wish to thank the reviewers for their helpful comments. This research was supported by DARPA contract N00014-87-K-0828. Daniel Lenoski is supported by Tandem Computer Incorporated.  ... 
doi:10.1109/isca.1990.134503 fatcat:2futt7t7jnaulhsbtura76hgvu

Organization Strategy of Established Firms for Adapting to a Change in Product Architecture

John H. WI
2002 Annals of Business Administrative Science  
This paper analyzes the organization strategy of an established firm when a change in product architecture occurs on a previous product.  ...  For the purpose, the paper analyzes an organizational design and management of an established firm in overcoming the restrictions from past resources and in creating heterogeneous resources required in  ...  First, NEC Johoshori subunit in charge of desktop computer was not able to develop a new architecture. This result supports the argument of a prior research such as Henderson and Clark (1990).  ... 
doi:10.7880/abas.1.9 fatcat:hjql7bzhsrfanifbc2x6lrprk4

Page 150 of Journal of Research and Practice in Information Technology Vol. 24, Issue 4 [page]

1992 Journal of Research and Practice in Information Technology  
KRIKELIS, A. (1990): “Benchmarking the ASP for Computer Vision”, Proc. SPIE, Vol. 1360, pp. 92-103.  ...  ISHII, M., IKESAKA, M. and ISHIHATA, H. (1990): “A Highly Parallel Processor CAP”, Systems and Computers in Japan, Vol. 21, No.3, pp. 14-24.  ... 
« Previous Showing results 1 — 15 out of 203,225 results