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Compositional Bitvector Analysis for Concurrent Programs with Nested Locks [chapter]

Azadeh Farzan, Zachary Kincaid
2010 Lecture Notes in Computer Science  
We propose a new technique to perform bitvector data flow analysis for concurrent programs. Our algorithm works for concurrent programs with nested locking synchronization.  ...  Moreover, this algorithm is compositional: it first solves a local (sequential) data flow problem, and then efficiently combines these solutions leveraging reachability results on nested locks [5, 6] .  ...  We propose a compositional (and therefore scalable) technique to precisely solve bitvector analysis problems for concurrent programs with nested locks. The analysis proceeds in three phases.  ... 
doi:10.1007/978-3-642-15769-1_16 fatcat:qrswf7z6xzbqtlghooiedyhgnm

Duet: Static Analysis for Unbounded Parallelism [chapter]

Azadeh Farzan, Zachary Kincaid
2013 Lecture Notes in Computer Science  
Duet is a static analysis tool for concurrent programs in which the number of executing threads is not statically bounded.  ...  concurrency.  ...  Nested locks (SAS10) In [4] , we leverage reachability results for concurrent programs communicating via nested locks [6] to develop a compositional technique for solving bitvector analysis problems  ... 
doi:10.1007/978-3-642-39799-8_12 fatcat:wrqnqvvk6rav7pijgdgtivkxwi

Static and Precise Detection of Concurrency Errors in Systems Code Using SMT Solvers [chapter]

Shuvendu K. Lahiri, Shaz Qadeer, Zvonimir Rakamarić
2009 Lecture Notes in Computer Science  
Context-bounded analysis is an attractive approach to verification of concurrent programs.  ...  to be employed for verifying concurrent programs.  ...  Bugs often manifest only in highly concurrent scenarios; consequently, this property is difficult to check with static analysis tools for sequential programs.  ... 
doi:10.1007/978-3-642-02658-4_38 fatcat:gycp3e34anfbnaacb5knvc5uvu

Software model checking

Ranjit Jhala, Rupak Majumdar
2009 ACM Computing Surveys  
Software model checking is the algorithmic analysis of programs to prove properties of their executions.  ...  Initially, the focus of program verification research was on manual reasoning, and the development of axiomatic semantics and logics for reasoning about programs provided a means to treat programs as logical  ...  We thank Jay Misra and Tony Hoare for encouraging us to write this survey and several useful comments along the way.  ... 
doi:10.1145/1592434.1592438 fatcat:hxexhmlpxjbx3hqlfh3o4bzz4u

Model Checking Software Programs with First Order Logic Specifications using AIG Solvers [article]

Fadi A. Zaraket, Mohamad Noureddine
2014 arXiv   pre-print
the use of a number of powerful automated analysis techniques that have no counterparts for other Boolean formulae.  ...  circuit with a designated output that is true when the program violates the specification.  ...  VCC [28] is an industrial strength verification framework for for concurrent low level C programs.  ... 
arXiv:1409.6825v1 fatcat:3lqtmcsxcjf7rlauyatk5s3g6y

A Survey of Automated Techniques for Formal Software Verification

Vijay D'Silva, Daniel Kroening, Georg Weissenbacher
2008 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
The three techniques considered are static analysis with abstract domains, model checking, and bounded model checking.  ...  This paper surveys algorithms that perform automatic static analysis of software to detect programming errors or prove their absence.  ...  Wahl for their helpful input.  ... 
doi:10.1109/tcad.2008.923410 fatcat:2cfyumxa6bglpai7jpvhqr5yyu

Stack allocation and synchronization optimizations for Java using escape analysis

Jong-Deok Choi, Manish Gupta, Mauricio J. Serrano, Vugranam C. Sreedhar, Samuel P. Midkiff
2003 ACM Transactions on Programming Languages and Systems  
mutex lock operations are eliminated in those ten programs (with a median of 51%), and the overall execution time reduction ranges from 2% to 23% (with a median of 7%) on a 333 MHz PowerPC workstation  ...  We introduce a new program abstraction for escape analysis, the connection graph, that is used to establish reachability relationships between objects and object references.  ...  Using a simple bitvector analysis, it can be determined which sync instructions s can be reached by a global write, with no intervening sync instructions.  ... 
doi:10.1145/945885.945892 fatcat:srevj5qc6rg47oi2pposgwtaoi

Pointer analysis for structured parallel programs

Radu Rugina, Martin C. Rinard
2003 ACM Transactions on Programming Languages and Systems  
This paper presents a novel interprocedural, flow-sensitive, and context-sensitive pointer analysis algorithm for multithreaded programs that may concurrently update shared pointers.  ...  Our experimental results show that the analysis has good precision and converges quickly for our set of Cilk programs.  ...  assignment forms Lee et al. 1999] ; and dataflow frameworks for bitvector problems [Knoop et al. 1996] or for multithreaded programs with copy-in, copy-out memory semantics [Grunwald and Srinivasan  ... 
doi:10.1145/596980.596982 fatcat:vrjx4lncvrdcphrb7unkkfhvee

Scalable validation of binary lifters

Sandeep Dasgupta, Sushant Dinesh, Deepan Venkatesh, Vikram S. Adve, Christopher W. Fletcher
2020 Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation  
Second, I show that formal translation validation of single instructions for a complex ISA like x86-64 is not only practical but can be used as a building block for scalable full-program validation.  ...  Specifically, I compose the validated IR sequences using a tool we develop called Compositional Lifter to create a reference standard.  ...  Sail, however, allows us to integrate a semantic definition with their relaxed memory models [130, 131] for concurrency semantics.  ... 
doi:10.1145/3385412.3385964 dblp:conf/pldi/DasguptaDVAF20 fatcat:3khjl5gbmnetjay23fk3sc2ktu

Static analysis of deterministic negotiations

Javier Esparza, Anca Muscholl, Igor Walukiewicz
2017 2017 32nd Annual ACM/IEEE Symposium on Logic in Computer Science (LICS)  
We extend the classical "meet-over-all-paths" (MOP) formulation of static analysis problems to our concurrent setting, and introduce Mazurkiewicz-invariant analysis problems, which encompass the questions  ...  We show that any Mazurkiewicz-invariant analysis problem can be solved in PTIME for sound deterministic negotiations whenever it is in PTIME for sequential flow-graphs-even though the flow-graph of a deterministic  ...  We thank the anonymous reviewers for useful remarks, and Jörg Desel, Philipp Hoffmann, and Denis Kuperberg for helpful discussions.  ... 
doi:10.1109/lics.2017.8005144 dblp:conf/lics/EsparzaMW17 fatcat:mo7rpdlhyvg4vd6e5srzapahmm

Static Analysis of Deterministic Negotiations [article]

Javier Esparza and Anca Muscholl and Igor Walukiewicz
2017 arXiv   pre-print
We extend the classical "meet-over-all-paths" (MOP) formulation of static analysis problems to our concurrent setting, and introduce Mazurkiewicz-invariant analysis problems, which encompass the questions  ...  We show that any Mazurkiewicz-invariant analysis problem can be solved in PTIME for sound deterministic negotiations whenever it is in PTIME for sequential flow-graphs---even though the flow-graph of a  ...  We thank the anonymous reviewers for useful remarks, and Jörg Desel, Denis Kuperberg, and Philipp Hoffmann for helpful discussions.  ... 
arXiv:1704.04190v1 fatcat:honwmqxsevedvcw4ffbcddtuba

Why does Astrée scale up?

Patrick Cousot, Radhia Cousot, Jérôme Feret, Laurent Mauborgne, Antoine Miné, Xavier Rival
2009 Formal methods in system design  
We discuss the way the precision of the semantics was tuned in ASTRÉE in order to scale up, the differences with some more academic approaches and some of the dead-ends we explored.  ...  In particular, we show a development process which was not specific to the particular usage ASTRÉE was built for, hoping that it might prove helpful in building other scalable static analyzers.  ...  nested loops.  ... 
doi:10.1007/s10703-009-0089-6 fatcat:lf5bl7rtznfjtlriqu62gvs35m

Effective Domain-Specific Formal Verification Techniques

Ákos Hajdu, Zoltán Micskei
2020 Zenodo  
Thesis 1 targets concurrent and asynchronous systems by modeling them with Petri nets and checking the reachability of a given state.  ...  We propose various efficient strategies for both abstraction and refinement. For abstraction, we extend the [...]  ...  Modular Verification Modular program verification [Poe97; Mül02] is a technique that enables efficient reasoning for composite programs built up from smaller modules, such as classes, interfaces, objects  ... 
doi:10.5281/zenodo.3892347 fatcat:56hta7rkh5dinlehzrcfapumme

A Formally Verified Compiler Back-end

Xavier Leroy
2009 Journal of automated reasoning  
programming the compiler and for proving its correctness.  ...  development and formal verification (proof of semantic preservation) of a compiler back-end from Cminor (a simple imperative intermediate language) to PowerPC assembly code, using the Coq proof assistant both for  ...  [43] develop an operational semantics for Concurrent Cminor, an extension of Cminor with threads and locks.  ... 
doi:10.1007/s10817-009-9155-4 fatcat:ofhgseu6hfda7fki4cyofq27bi

Multi-core Reachability for Timed Automata [chapter]

Andreas E. Dalsgaard, Alfons Laarman, Kim G. Larsen, Mads Chr. Olesen, Jaco van de Pol
2012 Lecture Notes in Computer Science  
Acknowledgments We would like to thank the LTSmin and APRON developers for making their excellent code available to others in the research community.  ...  To implement the subsumption check (line l. 8-9 in Figure 7 ) for successors (t, τ ) and to update the waiting set concurrently, update is called. It first locks L on t.  ...  To make L thread-safe, we protect its operations with a fine-grained locking mechanism that locks only the part of the map associated with an explicit state part s: lock(L(s)), similar to the spinlocks  ... 
doi:10.1007/978-3-642-33365-1_8 fatcat:qwhq3mr2bzfizm54xhsw7ddd5a
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