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Compiler-aided methodology for low overhead on-line testing
2013
2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)
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As alternative, software Signature-Monitoring (SM) schemes based on compiler assertions are an efficient method for control-flow-error detection. ...
Compared to ACFC, our technique improves (on average) fault coverage by 17%, performance overhead by 5% and power-consumption by 3% with equal code-size overhead. ...
Many thanks are due to Bryan Olivier from ACE B.V. support team for his valuable help and Vlad M. Sima for his comments. ...
doi:10.1109/samos.2013.6621126
dblp:conf/samos/NazarianSSG13
fatcat:oq3ce2bdefftdnkjpgcscoq5oy
Code coverage testing using hardware performance monitoring support
2005
Proceedings of the Sixth sixth international symposium on Automated analysis-driven debugging - AADEBUG'05
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Second, compiler analysis is performed on branch vectors to extend the amount of code coverage information derived from each sample. ...
Hardware-based sampling techniques attempt to lower overhead by leveraging existing Hardware Performance Monitoring (HPM) support for program counter (PC) sampling. ...
The framework consists of two main phases: a run-time collection phase in which PMU samples are gathered, and an off-line compiler-aided analysis phase. ...
doi:10.1145/1085130.1085151
dblp:conf/aadebug/ShyeIRC05
fatcat:kf4kyrve7zazbmn6ine5nwwjdi
Rappit
2005
Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05
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Unfortunately, the high runtime overhead has prevented scripting from being widely adopted in embedded applications. ...
This work proposes to overcome these obstacles by synthesizing light-weight, hostassisted scripting engines for embedded systems. ...
Translational Research on Optical Imaging) seed grant. ...
doi:10.1145/1084834.1084912
dblp:conf/codes/HahnXC05
fatcat:folst2lr75d4ndjj4oiblbu6f4
PyMTL: A Unified Framework for Vertically Integrated Computer Architecture Research
2014
2014 47th Annual IEEE/ACM International Symposium on Microarchitecture
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Technology trends prompting architects to consider greater heterogeneity and hardware specialization have exposed an increasing need for vertically integrated research methodologies that can effectively ...
We introduce a new framework called PyMTL that aims to close this computer architecture research methodology gap by providing a unified design environment for FL, CL, and RTL modeling. ...
for their help developing the C++ and Verilog mesh network models. ...
doi:10.1109/micro.2014.50
dblp:conf/micro/LockhartZB14
fatcat:45vwsdljefg35akasoy5ijyspu
Low Overhead Instruction Latency Characterization for NVIDIA GPGPUs
[article]
2019
arXiv
pre-print
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In this paper, we introduce a very low overhead and portable analysis for exposing the latency of each instruction executing in the GPU pipeline(s) and the access overhead of the various memory hierarchies ...
Furthermore, we show the impact of the various optimizations the CUDA compiler can perform over the various latencies. ...
They tested their framework on old NVIDIA GPUs (GeForce GTX8800) and (GeForce GTX280). ...
arXiv:1905.08778v2
fatcat:physx7sjmfh4bjzgb2r5ypni6q
Object Flow Integrity
2017
Proceedings of the 2017 ACM SIGSAC Conference on Computer and Communications Security - CCS '17
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A prototype implementation for Microsoft Component Object Model demonstrates that OFI is scalable to large interfaces on the order of tens of thousands of methods, and exhibits low overheads of under 1% ...
for some common-case applications. ...
All other test programs have runtime overheads below 1%, and the calculator's <2% worst-case overhead only occurs on mode changes. ...
doi:10.1145/3133956.3133986
dblp:conf/ccs/WangXH17
fatcat:oefwmh46dbhctaubc54cvfgprq
SoftTest
2003
Proceedings of the 2003 OOPSLA workshop on eclipse technology eXchange - eclipse '03
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While testing can improve software reliability, current tools typically are inflexible and have high overheads, making it challenging to test large software projects. ...
In this paper, we describe a new scalable and flexible framework, called SoftTest, for testing Java programs with a novel path-based approach to coverage testing. ...
Our preliminary results show low runtime overhead for several small Java programs. ...
doi:10.1145/965660.965677
dblp:conf/oopsla/ChildersSBBCKLM03
fatcat:fswpa2osfveqvn5jyteeu5bm4i
Visualising exemplary program values
2007
Proceedings of the the 6th joint meeting of the European software engineering conference and the ACM SIGSOFT symposium on The foundations of software engineering - ESEC-FSE '07
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We describe an idea of a tool to aid software developers, similar to tracing and software visualization. The tool monitors a running program and log some values of its variables. ...
Since the test suite is executed off-line, the efficiency overhead could be larger, but it should be fully automated. ...
This way a low overhead could be kept without sacrificing quality hoverglassing for non-dense code. ...
doi:10.1145/1287624.1287714
dblp:conf/sigsoft/Stefaniak07
fatcat:mnscmrkcvjcivn7yyefy72zgqu
Efficient synchronization
1997
Proceedings of the 24th annual international symposium on Computer architecture - ISCA '97
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Finally, we demonstrate the superior performance of a low-cost implementation of Qom, which runs on an unmodified cluster of commodiry workstations. ...
EjFcient synchronization primitives are essential for achieving high performance in he-grain, shared-memory parallel programs. ...
Mary Vernon commented on drafts of this paper. Satish Chandra, Babak Falsafi, Steve Reinhardt, Ioannis Schoinas, Brian Toonen helped clarify some fine points of Tempest and Blizzard. ...
doi:10.1145/264107.264166
dblp:conf/isca/KagiBG97
fatcat:pd5v3g4mwfgqbkposlmdkjreaa
Efficient synchronization
1997
SIGARCH Computer Architecture News
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Finally, we demonstrate the superior performance of a low-cost implementation of Qom, which runs on an unmodified cluster of commodiry workstations. ...
EjFcient synchronization primitives are essential for achieving high performance in he-grain, shared-memory parallel programs. ...
Mary Vernon commented on drafts of this paper. Satish Chandra, Babak Falsafi, Steve Reinhardt, Ioannis Schoinas, Brian Toonen helped clarify some fine points of Tempest and Blizzard. ...
doi:10.1145/384286.264166
fatcat:46wccg2dvrg55c3sem5iuewugu
Custom-Instruction Synthesis for Extensible-Processor Platforms
2004
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In this work, we describe an automatic methodology to select custom instructions to augment an extensible processor, in order to maximize its efficiency for a given application program. ...
instruction candidates grows rapidly with program size, leading to a large design space, and that the quality (speedup) of custom instructions varies significantly across this space, motivating the need for ...
Related Work We briefly trace related research work along the lines of ASIP architectures and overall design methodologies, application-specific instruction set selection, compilation techniques for ASIPs ...
doi:10.1109/tcad.2003.822133
fatcat:condjo6h5vcozau5lh3smjzaqm
Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications
2007
International Symposium on Code Generation and Optimization (CGO'07)
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Run-time compilation systems are challenged with the task of translating a program's instruction stream while maintaining low overhead. ...
While software managed code caches are utilized to amortize translation costs, they are ineffective for programs with short run times or large amounts of cold code. ...
Acknowledgements We thank Alex Shye, Kelley Kyle, Bala Narasimhan and the anonymous reviewers for their detailed comments and suggestions on improving the quality of this paper. ...
doi:10.1109/cgo.2007.29
dblp:conf/cgo/ReddiCCS07
fatcat:iyn5oucchvdbnej36lm4acpqpi
A SIMPLIFIED APPROACH TO TEST-DRIVEN DEVELOPMENT FOR THE FIRST PROGRAMMING COURSE
2006
Issues in Information Systems
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Based on an end-of-course student survey, recommendations are made for integrating TDD into the first programming course. ...
This paper examines various strategies for presenting test-driven concepts in an introductory software development course. ...
Early on, students are exposed to program development using a text editor and a command line compiler but soon migrate to Visual Studio 2005 for application development. ...
doi:10.48009/1_iis_2006_161-166
fatcat:o4q6ira46fcs5ktbkhq6jlwrpe
Scalable Frame to Block Based Automatic Converter for Efficient Embedded Vision Processing
2013
2013 IEEE Conference on Computer Vision and Pattern Recognition Workshops
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We have implemented and tested the parser for Texas Instruments (TI) C6000 DSPs but the method is generic to work with any processor core. ...
It has a fast on-chip memory with data-access rates similar to the DSP's processing rate but it is not large enough to hold the entire Image data. ...
Compiler assisted Code Parser for extraction of Kernel Parameters In this section, we describe the methodology to extract the kernel parameters for each kernel present in the image processing application ...
doi:10.1109/cvprw.2013.89
dblp:conf/cvpr/YogamaniPN13
fatcat:v4ytzhbq2rggjhktycjuluczrq
Energy Consumption Estimation for Embedded Applications
2016
Elektronika ir Elektrotechnika
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The lack of accurate and suitable methodology for energy consumption estimation for embedded applications based on ultra-low power heterogeneous multicore DSP platforms inspired a solution that will be ...
1 Abstract-Energy consumption, indeed, represents one of the essential properties of embedded applications, especially for those devices whose autonomy depends on battery life. ...
), base cost, and Table II (upper line), overhead cost. ...
doi:10.5755/j01.eie.22.3.15313
fatcat:5jvuubb5afatxbmyhzmqty2mta
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