Filters








368 Hits in 3.8 sec

Compilation of a Countermeasure Against Instruction-Skip Fault Attacks

Thierno Barry, Damien Couroussé, Bruno Robisson
2016 Proceedings of the Third Workshop on Cryptography and Security in Computing Systems - CS2 '16  
Conclusion We proposed a modified LLVM compiler to efficiently automate the application of the instruction duplication technique We illustrated through experimentations the effectiveness of our approach  ...  in terms of overheads compared to existing solutions Thanks for your attention  ...  IR IR Transformation passes Instruction Duplication Instruction Scheduling Code Emission Binary Code This pass is responsible for mapping the endless number of program variables to a  ... 
doi:10.1145/2858930.2858931 dblp:conf/hipeac/BarryCR16 fatcat:apjj75orufe5bletqv5lv3f6e4

Fault Tolerant Infective Countermeasure for AES

Sikhar Patranabis, Abhishek Chakraborty, Debdeep Mukhopadhyay
2017 Journal of Hardware and Systems Security  
Finally, we develop a fault tolerant implementation of the countermeasure using the x86 instruction set to make any attacks which attempt to change the control flow of the algorithm via instruction skips  ...  Infective countermeasures have been a promising class of fault attack countermeasures.  ...  Countermeasures Against Fault Attacks Any countermeasure against fault attack has two major phases-fault detection and fault nullification.  ... 
doi:10.1007/s41635-017-0006-1 dblp:journals/jhss/Patranabis0M17 fatcat:sjge3ohhf5emdlv5fdkpahs3gu

Fault Tolerant Infective Countermeasure for AES [chapter]

Sikhar Patranabis, Abhishek Chakraborty, Debdeep Mukhopadhyay
2015 Lecture Notes in Computer Science  
Infective countermeasures have been a promising class of fault attack countermeasures.  ...  Furthermore, we develop a fault tolerant implementation of the countermeasure using the x86 instruction set to make such attacks which attempt to change the control flow of the algorithm practically infeasible  ...  A formal treatment of a countermeasure scheme at the machine instruction level against instruction skip fault attacks was presented by Heydemann et. al in [21] .  ... 
doi:10.1007/978-3-319-24126-5_12 fatcat:6zbjkwrnpjfsbifiz4hang5fb4

Efficient Design and Evaluation of Countermeasures against Fault Attacks Using Formal Verification [chapter]

Lucien Goubet, Karine Heydemann, Emmanuelle Encrenaz, Ronald De Keulenaer
2016 Lecture Notes in Computer Science  
Using the tool we developed, we evaluated the robustness of state-of-theart countermeasures against fault injection attacks.  ...  This paper presents a formal verification framework and tool that evaluates the robustness of software countermeasures against faultinjection attacks.  ...  Using our framework, we were able to prove its robustness against a single instruction skip fault.  ... 
doi:10.1007/978-3-319-31271-2_11 fatcat:fy4ebwizwjgbnhjmbdntelup54

Combining High-Level and Low-Level Approaches to Evaluate Software Implementations Robustness Against Multiple Fault Injection Attacks [chapter]

Lionel Rivière, Marie-Laure Potet, Thanh-Ha Le, Julien Bringer, Hervé Chabanne, Maxime Puys
2015 Lecture Notes in Computer Science  
Software techniques strengthen such implementations to enhance their robustness against fault attacks. Exhaustively testing physical fault injections is time consuming and requires complex platforms.  ...  We chose two independent tools presented in 2014, the Laser Attack Robustness (Lazart) and the Embedded Fault Simulator (EFS) in order to evaluate software implementations against multiple fault injection  ...  # of skipped # of attacks Three of the four attacks that skipped only one instruction are obtained when some assignment instructions are skipped (MOV).  ... 
doi:10.1007/978-3-319-17040-4_7 fatcat:gniuvrjvfbadtcnuaojwy5pf7m

Formal verification of a software countermeasure against instruction skip attacks

N. Moro, K. Heydemann, E. Encrenaz, B. Robisson
2014 Journal of Cryptographic Engineering  
However, to the best of our knowledge, no approach that enables to secure a generic assembly program in order to make it fault-tolerant to instruction skip attacks has been formally proven yet.  ...  Every attack path relies on a specific fault model which defines the type of faults that the attacker can perform.  ...  Countermeasure scheme The proposed countermeasure scheme aims at ensuring a fault-tolerant execution of an assembly code against instruction skip faults.  ... 
doi:10.1007/s13389-014-0077-7 fatcat:i3mqr66q4fbgbaj3eg32t4ktiy

Experimental evaluation of two software countermeasures against fault attacks [article]

Nicolas Moro, Amine Dehbaoui, Emmanuelle Encrenaz
2014 arXiv   pre-print
Injection of transient faults can be used as a way to attack embedded systems.  ...  In this paper, we perform a practical evaluation for two of those countermeasure schemes by using a pulsed electromagnetic fault injection process on a 32-bit microcontroller.  ...  In particular, this function is theoretically vulnerable to a fault attack: an instruction skip attack can skip the msr 3 instruction that switches to unprivileged mode.  ... 
arXiv:1407.6019v1 fatcat:ruggebjfnzh77pkj5y3k2ra65i

Experimental evaluation of two software countermeasures against fault attacks

Nicolas Moro, Karine Heydemann, Amine Dehbaoui, Bruno Robisson, Emmanuelle Encrenaz
2014 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)  
Injection of transient faults can be used as a way to attack embedded systems.  ...  In this paper, we perform a practical evaluation for two of those countermeasure schemes by using a pulsed electromagnetic fault injection process on a 32-bit microcontroller.  ...  In particular, this function is theoretically vulnerable to a fault attack: an instruction skip attack can skip the msr 3 instruction that switches to unprivileged mode.  ... 
doi:10.1109/hst.2014.6855580 dblp:conf/host/MoroHDRE14 fatcat:u7jh5aoxevfpjbxbwo5kn4cxxi

Compiler-based Techniques to Secure Cryptographic Embedded Software against Side Channel Attacks

Giovanni Agosta, Alessandro Barenghi, Gerardo Pelosi
2019 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
We will dedicate a spotlight to a significant progress in the countermeasures techniques which is represented by the application of dynamic compilation techniques to prevent a side-channel attacker from  ...  devising a model of the attacked application.  ...  instruction skip faults.  ... 
doi:10.1109/tcad.2019.2912924 fatcat:xifhtsgjzba3veg7m54zeyatjy

Lightweight Fault Attack Resistance in Software Using Intra-instruction Redundancy [chapter]

Conor Patrick, Bilgiday Yuce, Nahid Farhady Ghalaty, Patrick Schaumont
2017 Lecture Notes in Computer Science  
Our technique is based on redundant bit-slicing, and it is able to detect faults in the execution of a single instruction.  ...  Fault attack countermeasures can be implemented by storing or computing sensitive data in redundant form, such that the faulty data can be detected and restored.  ...  Conclusion We have introduced a set of novel and state of the art methods for detecting faults in block ciphers. We use only software and introduce intra-instruction redundancy.  ... 
doi:10.1007/978-3-319-69453-5_13 fatcat:vsgio73qpbgibmjj4e5met2t4y

FISSC: A Fault Injection and Simulation Secure Collection [chapter]

Louis Dureuil, Guillaume Petiot, Marie-Laure Potet, Thanh-Ha Le, Aude Crohen, Philippe de Choudens
2016 Lecture Notes in Computer Science  
We present FISSC, the first public code collection dedicated to the analysis of code robustness against fault injection attacks.  ...  Applications in secure components (such as smartcards, mobile phones or secure dongles) must be hardened against fault injection to guarantee security even in the presence of a malicious fault.  ...  For instance, since conditional HL statements are usually compiled to cmp and jmp instructions, it makes sense to interpret corruptions of cmp or jmp instructions (in the instruction replacement fault  ... 
doi:10.1007/978-3-319-45477-1_1 fatcat:lyaap3iim5f4rcucdfphn3baia

Countermeasures against fault attacks on software implemented AES

Alessandro Barenghi, Luca Breveglieri, Israel Koren, Gerardo Pelosi, Francesco Regazzoni
2010 Proceedings of the 5th Workshop on Embedded Systems Security - WESS '10  
In this paper we present software countermeasures specifically designed to counteract fault injection attacks during the execution of a software implementation of a cryptographic algorithm and analyze  ...  to thwart most or all of the known fault attacks.  ...  Table 1 : 1 Fault coverage and minimum required faults to subvert a countermeasure Counter Fault Instr. Skips Instr.  ... 
doi:10.1145/1873548.1873555 dblp:conf/cases/BarenghiBKPR10 fatcat:6jojlqzjjjaj3dpk532xwkm5uu

ARMORY: Fully Automated and Exhaustive Fault Simulation on ARM-M Binaries

Max Hoffmann, Falk Schellenberg, Christof Paar
2020 IEEE Transactions on Information Forensics and Security  
However, physical access of users and likewise attackers makes them often threatened by fault attacks: a single fault during the computation of a cryptographic primitive can lead to a total loss of system  ...  Surprisingly, we show that a countermeasure that protects against one type of fault can actually largely increase the vulnerability to other fault models.  ...  • We demonstrate that the application of a countermeasure against faults of a certain model can actually severely increase vulnerability against other fault models.  ... 
doi:10.1109/tifs.2020.3027143 fatcat:ii2ktl5ffja5vlzzzf6stykqzi

Fault Injection Attacks Utilizing Waveform Pattern Matching against Neural Networks Processing on Microcontroller

Yuta FUKUDA, Kota YOSHIDA, Takeshi FUJINO
2021 IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences  
We propose a countermeasure against fault injection attacks that utilizes the randomization of power waveforms.  ...  Therefore, we focus on the softmax function and evaluate a fault attack using a clock glitch against NN implemented in an 8-bit microcontroller.  ...  Clock glitch generation for skipping branch instruction The shape of the clock glitch affects the success rate of the fault attack.  ... 
doi:10.1587/transfun.2021cip0015 fatcat:brrkaptglje3nafswx3ha3f3t4

High precision fault injections on the instruction cache of ARMv7-M architectures

Lionel Riviere, Zakaria Najm, Pablo Rauzy, Jean-Luc Danger, Julien Bringer, Laurent Sauvage
2015 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)  
While many research studies concentrated on successful attacks on the data flow, only a few targets the instruction flow.  ...  Indeed, we observe that a precise fault model occurs in up to 96% of the cases. We then characterize and exhibit this practical fault model on the cache that is not yet considered in the literature.  ...  However, since we skip at least 4 instructions (in the case of 32-bit instructions) in our fault model, their countermeasure would not work against the model of fault we presented in this paper.  ... 
doi:10.1109/hst.2015.7140238 dblp:conf/host/RiviereNRDBS15 fatcat:cxmfheplijgwjdgr4le6lxmpbu
« Previous Showing results 1 — 15 out of 368 results