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Competitive analysis of flash memory algorithms
2011
ACM Transactions on Algorithms
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The cells of flash memories can only endure a limited number of write cycles, usually between 10,000 and 1,000,000. ...
To maximize the endurance of the device (the amount of useful data that can be written to it before one of its cells wears out), flash-based systems move data around in an attempt to reduce the total number ...
In spite of this pessimistic competitive result, many flash-based systems use deterministic algorithms. ...
doi:10.1145/1921659.1921669
fatcat:iiefzx6mpvgyrakbv57igfazqu
Competitive Analysis of Flash-Memory Algorithms
[chapter]
2006
Lecture Notes in Computer Science
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The cells of flash memories can only endure a limited number of write cycles, usually between 10,000 and 1,000,000. ...
To maximize the endurance of the device (the amount of useful data that can be written to it before one of its cells wears out), flash-based systems move data around in an attempt to reduce the total number ...
In spite of this pessimistic competitive result, many flash-based systems use deterministic algorithms. ...
doi:10.1007/11841036_12
fatcat:ihnqxxnzgvgtnj5uzxtxvmya4i
Online Paging for Flash Memory Devices
[chapter]
2009
Lecture Notes in Computer Science
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For deterministic algorithms, we show that an adaptation of LRU is strongly competitive, while for the randomized case we show that by adapting the classical Mark algorithm we get an algorithm with a competitive ...
After providing experimental evidence that α-paging can improve the performance of flash-memory devices in the context of translation layers we turn to the theoretical connections between αpaging and standard ...
By Lemma 3, for large enough k and α, approximating H x ≈ ln x + γ, γ ≈ 0.57, any randomized algorithm has a competitive ratio C lb ≥ ln(k/α + 1)/ ln (2) . ...
doi:10.1007/978-3-642-10631-6_37
fatcat:u2akyy5l4regdii25rttdkcglm
Efficient External Sorting on Flash Memory Embedded Devices
2013
International Journal of Database Management Systems
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Most embedded devices use flash memory to store large amounts of data. Flash memory has unique performance characteristics that can be exploited to improve algorithm performance. ...
In this paper, we describe the Flash MinSort external sorting algorithm that uses an index, generated at runtime, to take advantage of fast random reads in flash memory. ...
ACKNOWLEDGEMENTS The authors would like to acknowledge the support of NSERC that helped fund this research. ...
doi:10.5121/ijdms.2013.5101
fatcat:wugpzqkv2rhnverge36w4xxtu4
Lazy-Adaptive Tree
2009
Proceedings of the VLDB Endowment
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Our performance results on raw NAND flashes show that the LA-Tree achieves 2× to 12× gains over the best of alternate schemes across a range of workloads and memory constraints. ...
to workload using an online algorithm, which we prove to be optimal under the cost model for raw NAND flashes, and 3) it optimizes index parameters, memory management and storage reclamation to address ...
Besides the traditional use of memory for caching to reduce page reads and writes, memory is also needed for write-coalescing to reduce fragmentation of buffers on flash. ...
doi:10.14778/1687627.1687669
fatcat:34fkhzex5jeu3nyjwqq7aiczs4
FSort
2009
Proceedings of the Sixth International Workshop on Data Management for Sensor Networks - DMSN '09
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F Sort minimizes the expensive write/delete operations of flash memory minimizing in that way the consumption of energy. ...
In this paper we devise the F Sort algorithm, an efficient external sorting algorithm for flash-based sensor devices with a small memory footprint. ...
Acknowledgments This work was supported in part by the Open University of Cyprus under the project SenseView, the US National Science Foundation under the project AQSIOS (#IIS-0534531), the European Union ...
doi:10.1145/1594187.1594201
dblp:conf/dmsn/AndreouSZSC09
fatcat:h2kpr3p3rnckhewg5sf3eia5va
Comparative Analysis Study on SSD, HDD, and SSHD
2021
Turkish Journal of Computer and Mathematics Education
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SSD contains NAND flash memory to write the data in the drive. Based on the method and material of storing different. HDD and SSD feature well to upgrade with technology in Computer filed. ...
The Abbreviation of SSHD is called the solid-state hybrid disk. A mixture of both secondary devices to enhance the performance of the system. ...
SSD Wear Leveling Algorithms Although SLC NAND Flash memory provides a high level of performance, it still has a large lifespan. ...
doi:10.17762/turcomat.v12i3.1644
fatcat:2j4n2mtcezcrjeswfgx4664j5i
FlashDB: Dynamic Self-tuning Database for NAND Flash
2007
2007 6th International Symposium on Information Processing in Sensor Networks
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We formalize the self-tuning nature of an index as a two-state task system and propose a 3-competitive online algorithm that achieves the theoretical optimum. ...
We show that existing databases for flash are not optimized for all types of flash devices or for all workloads and their performance is thus suboptimal in many practical systems. ...
Yossi Azar and Uri Feige helped in competitive analysis of the SWITCHMODE algorithm. ...
doi:10.1109/ipsn.2007.4379701
fatcat:vkzeqqnckncefcr5v6g63ovosy
FlashDB
2007
Proceedings of the 6th international conference on Information processing in sensor networks - IPSN '07
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We formalize the self-tuning nature of an index as a two-state task system and propose a 3-competitive online algorithm that achieves the theoretical optimum. ...
We show that existing databases for flash are not optimized for all types of flash devices or for all workloads and their performance is thus suboptimal in many practical systems. ...
Yossi Azar and Uri Feige helped in competitive analysis of the SWITCHMODE algorithm. ...
doi:10.1145/1236360.1236412
dblp:conf/ipsn/NathK07
fatcat:ll52elwtefhx7cyyfccbkw7bz4
M-Flash: Fast Billion-Scale Graph Computation Using a Bimodal Block Processing Model
[chapter]
2016
Lecture Notes in Computer Science
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2016 pre-print arXiv:1506.01406v4 fatcat:uhwxescmovgxnbaoq7txnjuphqOther Versions
While these approaches achieve scalability by optimizing I/O operations, they do not fully exploit the capabilities of modern hard drives and processors. ...
With this strategy, we achieved the following contributions: (1) M-Flash, the fastest graph computation framework to date; (2) a flexible and simple programming model to easily implement popular and essential ...
Theoretical (I/O) Analysis Following, we show the theoretical scalability of M-Flash when we reduce the available memory at the same time that we demonstrate why the performance of M-Flash improves when ...
doi:10.1007/978-3-319-46227-1_39
fatcat:wf3oznbwr5haxbcica36gmsbve
Multithreaded Asynchronous Graph Traversal for In-Memory and Semi-External Memory
2010
2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis
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Unfortunately, many algorithms and implementations do not scale with increasing graph sizes. ...
We present an experimental study applying our technique to both In-Memory and Semi-External Memory graphs utilizing multi-core processors and solid-state memory devices. ...
An overview of the characteristics and performance of flash memory (namely NAND Flash) with respect to algorithmic research is given in [15] , [16] . ...
doi:10.1109/sc.2010.34
dblp:conf/sc/PearceGA10
fatcat:3yk6eu2rxrdshfkqb5wmtbwery
Chronos: a NoSQL system on flash memory for industrial process data
2015
Distributed and parallel databases
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Keywords database · flash memory · NoSQL system · data historian Introduction At EDF, a worldwide leading energy company, process data produced in power stations are archived for various analysis applications ...
This type of memory had notable consequences on data acquisition performance, with a substantial drop compared with hard disk drives. ...
Performance
Complexity analysis For process data management typical workloads, Chronos makes a point of minimizing flash memory accesses. ...
doi:10.1007/s10619-015-7175-0
fatcat:dk47bt3levgejgof65dvp2zu2e
Impact of process variation on endurance algorithms for wear-prone memories
2011
2011 Design, Automation & Test in Europe
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Non-volatile memories, such as Flash and Phase-Change Memory, are replacing other memory and storage technologies. ...
This analysis considers two general endurance strategies (physical capacity degradation and physical sparing) under four distributions of cell lifetime (constant, linear, normal, and bimodal). ...
Analysis of endurance algorithms with process variation We assume the memory subsystem has M physical pages, each of fixed size. ...
doi:10.1109/date.2011.5763156
dblp:conf/date/FerreiraBCMM11
fatcat:lriswgyblnbdraihflnhuirbum
Fast multiplication of large permutations for disk, flash memory and RAM
2010
Proceedings of the 2010 International Symposium on Symbolic and Algebraic Computation - ISSAC '10
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For larger permutations on flash or disk, the novel algorithm is orders of magnitude faster. ...
Yet for large permutations, the standard algorithm is not the fastest for disk or for flash, and surprisingly, it is not even the fastest algorithm for RAM on recent multi-core CPUs. ...
PERFORMANCE ANALYSIS The analysis presented here can be used to estimate the running time for the implicit indices algorithms, when using any 2-level memory hierarchy, including cache/RAM, RAM/ flash, ...
doi:10.1145/1837934.1838001
dblp:conf/issac/SlaviciDKC10
fatcat:rks55e4zt5hohl6vuq3ymogruq
A closed-form expression for write amplification in NAND Flash
2010
2010 IEEE Globecom Workshops
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The analysis shows write amplification approximately independent of NAND block size and number of blocks in the SSD. The analysis is verified by full drive simulations. ...
This paper presents a novel probabilistic model to analytically quantify the impact of over-provisioning on write amplification under a uniformly-distributed random workload and a greedy garbage collection ...
[11] performed a worst-case competitive analysis with focus on endurance-based randomized algorithms. On a different note, Jagmohan et al. ...
doi:10.1109/glocomw.2010.5700261
fatcat:s46o2hvkund3lci6dag64x224u
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