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Comparing algorithm for dynamic speed-setting of a low-power CPU

Kinshuk Govil, Edwin Chan, Hal Wasserman
1995 Proceedings of the 1st annual international conference on Mobile computing and networking - MobiCom '95  
Here we continue this research, using a simulation to compare a number of policies for dynamic speed-setting.  ...  Our work clarifies a fundamental power vs. delay tradeoff, as well as the role of prediction and of smoothing in dynamic speed-setting policies.  ...  Essential performance factors of a dynamic speedsetting policy are power-savings and delay. To save power, a CPU would ideally run at a flat, average speed.  ... 
doi:10.1145/215530.215546 dblp:conf/mobicom/GovilCW95 fatcat:75r54cl7wfgbtc3oiyvkdexsqq

The Effects of Various Frequency Scaling Algorithm on Embedded Linux CPU Power Consumption

D. Shuhaizar, R. Badlishah Ahmad, Ong Bi Lynn
2014 INTERNATIONAL JOURNAL OF COMPUTERS & TECHNOLOGY  
We have tested all the default scaling algorithms included in Linux in a controlled testing environment and measured the actual effects of the scaling algorithms to the CPU power consumption during operation  ...  In this paper we have tested various frequency scaling algorithm available in Linux and measured the effects of the different algorithms during operation in an actual system.  ...  At the start of the compilation sequence, the performance-oriented governors (performance and locked highest speed) idles at a higher power compared to the rest of the group.  ... 
doi:10.24297/ijct.v13i5.2536 fatcat:3wauk2znyjfz3cx5easeg2shz4

Energy-efficient dynamic task scheduling algorithms for DVS systems

Jianli Zhuo, Chaitali Chakrabarti
2008 ACM Transactions on Embedded Computing Systems  
Next, we develop dynamic task scheduling algorithms that make use of dynamic processor utilization and optimal scaling factor to determine the speed setting of a task.  ...  When the CPU power and device power are comparable, algorithms duSYS and duSYS PC achieve up to 25% energy saving compared to CPU energy-efficient algorithm duEDF, and up to 12% energy saving over the  ...  Simulations on a randomized version of the Video-Phone task set show that when the CPU power and device power are comparable, algorithms duSYS and duSYS PC achieve large energy savings (up to 25%) compared  ... 
doi:10.1145/1331331.1331341 fatcat:hnxoyzc46bc2regecf2mgh5em4

A Practical Framework to Study Low-Power Scheduling Algorithms on Real-Time and Embedded Systems

Jian Lin, Albert Cheng, Wei Song
2014 Journal of Low Power Electronics and Applications  
The dynamic voltage scaling (DVS) and CPU shut-down are the two most popular techniques used to design the algorithms.  ...  Real-time scheduling is one of the fields that has attracted extensive attention to design low-power, embedded/real-time systems.  ...  Conflicts of Interest The authors declare no conflict of interest.  ... 
doi:10.3390/jlpea4020090 fatcat:ztn4bws26vd5lh2mvvypg2pnsq

System-level energy-efficient dynamic task scheduling

Jianli Zhuo, C. Chakrabarti
2005 Proceedings. 42nd Design Automation Conference, 2005.  
The algorithms use a combination of (i) optimal speed setting, which is the speed that minimizes the system energy for a specific task, and (ii) limited preemption which reduces the numbers of possible  ...  For the case when the CPU power and device power are comparable, these algorithms achieve up to 43% energy savings compared to [1], but only up to 12% over the non-DVS scheduling.  ...  The algorithms use a combination of (i) optimal speed setting, which is the speed that minimizes the system energy for a specific task, and (ii) limited preemption, which reduces the number of preemptions  ... 
doi:10.1109/dac.2005.193887 fatcat:onxo7ezcnzf6zbe4ghdgpsc6rq

System-level energy-efficient dynamic task scheduling

Jianli Zhuo, Chaitali Chakrabarti
2005 Proceedings of the 42nd annual conference on Design automation - DAC '05  
The algorithms use a combination of (i) optimal speed setting, which is the speed that minimizes the system energy for a specific task, and (ii) limited preemption which reduces the numbers of possible  ...  For the case when the CPU power and device power are comparable, these algorithms achieve up to 43% energy savings compared to [1], but only up to 12% over the non-DVS scheduling.  ...  The algorithms use a combination of (i) optimal speed setting, which is the speed that minimizes the system energy for a specific task, and (ii) limited preemption, which reduces the number of preemptions  ... 
doi:10.1145/1065579.1065744 dblp:conf/dac/ZhuoC05 fatcat:4t7n5cwhcffk7cj6hwnjoedfbm

PTEC: A System for Predictive Thermal and Energy Control in Data Centers

Jinzhu Chen, Rui Tan, Guoliang Xing, Xiaorui Wang
2014 2014 IEEE Real-Time Systems Symposium  
We evaluated PTEC on a hardware testbed consisting of 15 servers and a total of 23 temperature and power sensors, as well as through Computational Fluid Dynamics (CFD) simulations based on real data traces  ...  This paper presents the design and evaluation of PTEC -a system for predictive thermal and energy control in data centers.  ...  Thus, DFSC reuses the native fan speed control algorithm but adjusts its setting in response to the CPU utilization changes while meeting a CPU temperature upper bound requirement.  ... 
doi:10.1109/rtss.2014.27 dblp:conf/rtss/ChenTXW14 fatcat:bt3wlxnoz5hypl6nf66e4hwrfe

System-Level Energy Management for Periodic Real-Time Tasks

Hakan Aydin, Vinay Devadas, Dakai Zhu
2006 2006 27th IEEE International Real-Time Systems Symposium (RTSS'06)  
In this paper, we consider the system-wide energy management problem for a set of periodic real-time tasks running on a DVS-enabled processor.  ...  Our experimental evaluation shows that the optimal solution provides significant (up to 50%) gains over the previous solutions that focused on dynamic CPU power at the expense of ignoring other power components  ...  In [2, 3] , a generic dynamic reclamation algorithm (GDRA) was proposed for power-aware scheduling of periodic tasks.  ... 
doi:10.1109/rtss.2006.48 dblp:conf/rtss/AydinDZ06 fatcat:urkf47gsibb7birgf3b3la7dju

An experimental evaluation of real-time DVFS scheduling algorithms

Sonal Saha, Binoy Ravindran
2012 Proceedings of the 5th Annual International Systems and Storage Conference on - SYSTOR '12  
Our studies reveal that measuring the CPU power consumption as the cube of CPU frequency -as often done in the simulation-based RT-DVFS literature -ignores the idle state CPU power consumption, which is  ...  We implemented the schedulers in a real-time Linux kernel and measured their timeliness and energy consumption under a range of workloads including CPU-intensive, memory-intensive, mutual exclusion lock-intensive  ...  ACET for a 5 task set, at 70% CPU Utilization, Actual CPU Power vs. ACET for a 5 task set, at 70% CPU Utilization, on Intel i5 Figure 15 . 15 Normalized CPU Energy vs.  ... 
doi:10.1145/2367589.2367604 dblp:conf/systor/SahaR12 fatcat:p44bnlekp5dhjhhzvyc3nkun3q

On scheduling soft real-time tasks with lock-free synchronization for embedded devices

Shouwen Lai, Binoy Ravindran, Hyeonjoong Cho
2009 Proceedings of the 2009 ACM symposium on Applied Computing - SAC '09  
At run-time, the algorithm dynamically adjusts the CPU speed to compensate for slack time, while taking into account the speed transition overhead.  ...  At offline stage, we statistically determine task execution time, and set the optimal CPU speed that will minimize system-level energy consumption.  ...  Energy Consumption We compared the system-level energy consumption of the algorithms under different power models. Figure 1(a) shows the convex characteristic of our power model.  ... 
doi:10.1145/1529282.1529660 dblp:conf/sac/LaiRC09 fatcat:boqktn3oarcpvnmk2lqsfvdy7y

Dynamic Power Management for Embedded System Idle State in the Presence of Periodic Interrupt Services

Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada
2008 IPSJ Transactions on System LSI Design Methodology  
In case the periodic interrupt cannot be disabled, we formulate the power consumption of idle state, and propose static and dynamic approaches for the optimal frequency selection to save idle power.  ...  power mode for longer time.  ...  Acknowledgments This work is supported in part by Core Research for Evolutional Science and Technology (CREST) program from Japan Science and Technology Agency.  ... 
doi:10.2197/ipsjtsldm.1.48 fatcat:cwi7pafjazdlpcrc6hg5k75am4

Practical voltage scaling for mobile multimedia devices

Wanghong Yuan, Klara Nahrstedt
2004 Proceedings of the 12th annual ACM international conference on Multimedia - MULTIMEDIA '04  
PDVS makes these decisions based on the discrete speed levels of the CPU, the total power of the device at different speeds, and the probability distribution of CPU demand of multimedia applications.  ...  This paper presents the design, implementation, and evaluation of a practical voltage scaling (PDVS) algorithm for mobile devices primarily running multimedia applications.  ...  Previous statistical DVS algorithms, and generally most of previous DVS algorithms, often assume an ideal CPU: (1) the CPU can change speed continuously, (2) the CPU power is dominated by the dynamic power  ... 
doi:10.1145/1027527.1027737 dblp:conf/mm/YuanN04 fatcat:ku5vzpwn6rfqjpi5gqli2e35iq

On minimizing expected energy usage of embedded wireless systems with probabilistic workloads

Maryam Bandari, Robert Simon, Hakan Aydin
2016 Sustainable Computing: Informatics and Systems  
Our results illustrate the benefits of joint power control algorithms.  ...  We define several energy control algorithms, including an optimal combined DVS-DMS approach, and evaluate these algorithms under a wide range of workload values and hardware settings.  ...  function of the ratio of the radio power to the CPU power, by comparing to other algorithms, including those that use DVS-only or DMS-only approaches for energy management.  ... 
doi:10.1016/j.suscom.2016.02.004 fatcat:l4eowvbiefbyhftuytohsvha6e

Effective Dynamic Voltage Scaling Through CPU-Boundedness Detection [chapter]

Chung-Hsing Hsu, Wu-Chun Feng
2005 Lecture Notes in Computer Science  
Dynamic voltage scaling (DVS) allows a program to execute at a non-peak CPU frequency in order to reduce CPU power, and hence, energy consumption; however, it is oftentimes done at the expense of performance  ...  We propose a new DVS algorithm that detects the CPU-boundedness of a program on the fly (via a regression method on the past MIPS rate) and then adjusts the CPU frequency accordingly.  ...  If the percentage is higher than a pre-defined threshold, the algorithm will set the CPU to the fast speed; if it is lower than another pre-defined threshold, the algorithm will set the CPU to the low  ... 
doi:10.1007/11574859_10 fatcat:e7kjm7qri5fplfi5gn4fy6i5ty

Power-aware scheduling for periodic real-time tasks

H. Aydin, R. Melhem, D. Mosse, P. Mejia-Alvarez
2004 IEEE transactions on computers  
In this paper, we address power-aware scheduling of periodic tasks to reduce CPU energy consumption in hard real-time systems through dynamic voltage scaling.  ...  Our intertask voltage scheduling solution includes three components: 1) a static (offline) solution to compute the optimal speed, assuming worst-case workload for each arrival, 2) an online speed reduction  ...  Fig. 15 presents the results obtained with a 30-task set and normal distribution of execution times, assuming quadratic power/speed functions (compare to Figs. 11 and 12 ).  ... 
doi:10.1109/tc.2004.1275298 fatcat:dwoocts6efbvnfldzyyijhmney
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