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Digital Logic Design: Basics

Durgesh Raghuvanshi
2018 International Journal of Trend in Scientific Research and Development  
In the modern world of electronics, the term digital is usually associated with a computer.  ...  The digital logic design is a system in electrical and computer engineering that uses simple numerical values to produce input and output operations.  ...  Today, logic optimization is divided into various on the circuit representation level logic optimization level logic optimization Based on circuit characteristics Sequential logic optimization Combinational  ... 
doi:10.31142/ijtsrd18948 fatcat:q36rov66qbcvdmewxq463xipni

Optimal control of mutual impact of electric grids for the reduction of their electric energy losses

Petro Lezhniuk, Olexandr Rubanenko, Anton Kylymchuk
2014 Eastern-European Journal of Enterprise Technologies  
On the first glance because leveling e.m.f. depends on loading both of HV grid and LV grid then BT must be with of tap-changing-under load.  ...  The degree of influence of mutual and transit power transfers on the level of active electric energy losses changes, depending on AT transformation ratios, on the value of CT phase shifting angle, on circuit  ... 
doi:10.15587/1729-4061.2014.26263 fatcat:vyiqo6t5zbegjc3dgssm7jwymm

Fuzzy logic energy management system of food manufacturing processes

Serhii Baliuta, Liudmyla Kopylova, Iuliia Kuievda, Valerii Kuevda, Olena Kovalchuk
2020 Ukrainian Food Journal  
The fuzzy system method under study ensures that energy-efficient voltage levels are maintained at the distribution network nodes when the voltage of the power source or the consumer loads are changed.  ...  and short circuit losses of secondary substation transformers.  ...  and optimization of the modes of the electrical distribution network, which will ensure a rational level of electricity losses.  ... 
doi:10.24263/2304-974x-2020-9-1-19 fatcat:b2rfwjmujzg7pgg2dor3ceqb5u

Transistor Sizing in Order to Hardening CMOS circuit against Soft Error

Leila Morad, Javad Javidan, Golamreza Zare Fatin, Ehsan Morad
2013 International Journal of Computer Applications  
agree well with SPICE simulations, while allowing for very fast analysis.  ...  Since the suggested method at this paper is obtained minimum transistor size for hardening, the optimization of area will be done. experimental results show that present mathematical model results are  ...  In memory circuits and latches, these errors are just a flip in the stored values, which result in temporary changes in the output of combinational circuits.  ... 
doi:10.5120/13545-1337 fatcat:24wnpwlml5eo3h4zgqkrd5sr5i

Optimization Design of a New Type of Interior Permanent Magnet Generator for Electric Vehicle Range Extender

Shilun Ma, Xueyi Zhang, Qinjun Du, Liwei Shi, Xiangyu Meng
2019 Journal of Electrical and Computer Engineering  
Aiming at the disadvantages of large leakage flux and low magnetic flux density of radial magnetic circuit and tangential magnetic circuit, a new type of permanent magnet (PM) rotor with parallel tangential  ...  and radial magnetic circuits is proposed.  ...  In order to facilitate the comprehensive analysis, the change of the indicators with the level of factors is represented by broken lines, as shown in Figures 4-6 .  ... 
doi:10.1155/2019/3108053 fatcat:aydljhqo3vasfemi4yw46lyg3y

Optimization parameters effects on electrical conductivity of 3D printed circuits fabricated by direct ink writing method using functionalized multiwalled carbon nanotubes and polyvinyl alcohol conductive ink

Syed Riyaz Ahammed, Ayyappan Susila Praveen, Sachin Salunkhe, Sofiane Guessasma, Vishal Naranje
2021 International Journal for Simulation and Multidisciplinary Design Optimization  
Optimized printing parameters such as nozzle diameter of 0.8 mm, extrusion pressure of 0.1 MPa and printing speed of 4 mm/sec are found to be the best the for printing electronic circuits with high electrical  ...  Fabrication of electronic circuits and the effects of optimization parameters on electrical conductivity of the printed circuits fabricated by direct ink writing method (D.I.W); one of the novel methods  ...  However, understanding the variation of electrical conductivity with changes in process parameters is of significance to fabricate a strain gage circuit with high electrical conductivity.  ... 
doi:10.1051/smdo/2021007 fatcat:ex25gs3kmzgyvo2qkdw4unwe4a

Thermal energy diagnosis of boiler plant by computer image processing and neural network technology

Guoli Yu, Jinge Sang, Yafei Sun
2020 Thermal Science  
Third, based on the support vector machine (SVM) intelligent algorithm, genetic algorithm (GA) was used to optimize the parameters, and combined with the grey prediction model, the infrared TFD scheme  ...  Taking the airborne circuit board in the boiler plant as the research object, first, the sequential analysis method was selected to collect the temperature changes during the operation of the circuit board  ...  This multi-level SVM model-based TFD has high accuracy and is consistent with the actual trend of change.  ... 
doi:10.2298/tsci191218128y fatcat:aznkiut7a5dhpia7akkorb7hny

Optimal Multiple FCLs Allocation Considering DG Penetration in Meshed Network With Multi-Level Voltages

M. Hosseinpour, J. Sadeh
2020 Iranian Journal of Electrical and Electronic Engineering  
This method suggests the optimal allocation with the least investment cost in multi-level voltages networks according to the FCL costs.  ...  In this paper, a new approach is presented for multiple FCLs locating to decrease short circuit levels in meshed networks with several subsystems and multi-level voltages.  ...  On the other hand, in meshed networks with different voltage levels, DGs with various ratings could be connected to the grid, which leads to change the fault currents and short circuit levels.  ... 
doaj:6a2021e4bb4246e38a9ae5103a0320e4 fatcat:mconbq7gnrd6tkvoa6okpkl4ge

Full-Circuit Design Optimization of a RF Silicon Integrated Passive Device

Kai Liu, Robert Frye
2006 2006 IEEE Electrical Performane of Electronic Packaging  
The method uses component values derived from circuit simulation and optimization to determine physical design changes. The diplexer was fabricated in a silicon wafer process.  ...  A schematic-electromagnetic (EM) hybrid optimization scheme was used to design an integrated passive device (IPD)-diplexer.  ...  The key difference is the subsequent optimization loop, which uses a combination of circuit and EM simulation and optimization to fine-tune the physical design.  ... 
doi:10.1109/epep.2006.321244 fatcat:wvj2kxwnrbgj5kj47k7vcldkjq

Tuning of a vibration absorber with shunted piezoelectric transducers

Oliver Heuss, Rogério Salloum, Dirk Mayer, Tobias Melz
2014 Archive of applied mechanics (1991)  
The vibration level of the absorber can be strongly attenuated by applying different combinations of resistant, resonant, and negative capacitance shunt circuits.  ...  Additionally, the tuning frequency of the absorber can be adapted to the excitation frequency, using a negative capacitance shunt circuit, which requires only the energy to supply the electric components  ...  unrestricted use, distribution, and reproduction in any medium, provided you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes  ... 
doi:10.1007/s00419-014-0972-5 fatcat:b7y6syfokrbl3i67yfckgrt5va

Analysis Of Genotype Size For An Evolvable Hardware System

Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert
2007 Zenodo  
One of main difficulties in developing evolvable hardware with the ability to design functional electrical circuits is to choose the most favourable EA features such as fitness function, chromosome representations  ...  the number of generations and optimize the digital logic circuits through reducing the number of logic gates.  ...  In this figure the percentages of fully evolved digital logic circuit in relation with the change of the chromosome representations is given Fig. 9 9 Relationship between the number of generations and  ... 
doi:10.5281/zenodo.1084513 fatcat:yvxvqvhixrbajd47yhvcci47zq

Device and architecture concurrent optimization for FPGA transient soft error rate

Yan Lin, Lei He
2007 Computer-Aided Design (ICCAD), IEEE International Conference on  
In this paper, we show that continuous CMOS scaling dramatically increases the significance of FPGA chip-level transient soft errors in circuit elements other than configuration memory, and transient SER  ...  of device and architecture combinations.  ...  There are several masking mechanisms including logic masking, electrical masking and latch-window masking for combinational circuits.  ... 
doi:10.1109/iccad.2007.4397265 dblp:conf/iccad/LinH07 fatcat:v4tocgzky5gvpfrasxrd3ptg4i

Demonstration of a 4 × 4-port universal linear circuit

Antonio Ribeiro, Alfonso Ruocco, Laurent Vanacker, Wim Bogaerts
2016 Optica  
Instead of predefining the exact functionality of a photonic circuit at design time, we demonstrate a simple generic silicon photonic circuit, combined with electronic control and software feedback, that  ...  The circuit consists of a network of thermally tunable symmetric Mach-Zehnder interferometers with phase and amplitude control, in-circuit optical power monitors, and local software controlled feedback  ...  Also a careful control of the electrical signal to the heaters is essential to keep the current level at a safe level, preventing the heater to burn out.  ... 
doi:10.1364/optica.3.001348 fatcat:5bwhz7przbe7vktvvqsw3asbim

Mutation Rate For Evolvable Hardware

Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert
2007 Zenodo  
The experimental results found provide the behaviour of the mutation rate to be used during evolution for the design and optimization of logic circuits.  ...  The mutation rate for an EHW system modifies values of the logic cell inputs, the cell type (for example from AND to NOR) and the circuit output.  ...  required to completely evolve a logic circuit by changing the mutation rate.  ... 
doi:10.5281/zenodo.1062457 fatcat:qajamvjjonhmvg5zguw35jtniq

Optimizing of the installed capacity of hybrid renewable energy with a modified MPPT model

Sukarno Budi Utomo, Iwan Setiawan, Berkah Fajar, Sonny Hady Winoto, Arief Marwanto
2022 International Journal of Power Electronics and Drive Systems (IJPEDS)  
Therefore, the potential opportunities for increasing power production in the tropics wheather could be carried out and applied with this model.  ...  Hybrid combination can improve the performance of the power stored in the battery and optimized with MMPT.  ...  Optimizing of the installed capacity of hybrid renewable energy … (Sukarno Budi Utomo) 77 BUCK BOOST CONVERTER The buck-boost converter functions to change the DC voltage level, either to a higher level  ... 
doi:10.11591/ijece.v12i1.pp73-81 fatcat:gqu3yir4oncxxmjcm75pjdd5au
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