Filters








334,467 Hits in 4.5 sec

Combining Verifiers in Conditional Model Checking via Reducers

Dirk Beyer, Marie-Christine Jakobs, Thomas Lemberger, Heike Wehrheim
2019 Software Engineering  
A promising approach to create combinations is conditional model checking (CMC).  ...  In CMC, the first verifier outputs a condition that describes the parts of the program state space that it successfully verified, and the next verifier uses that condition to steer its exploration towards  ...  One solution to this problem is to combine the strength of different verifiers. Conditional model checking (CMC) [Be12] is one promising combination approach.  ... 
doi:10.18420/se2019-46 dblp:conf/se/0001J0W19 fatcat:lvmekx2kdfgafebop7po56juve

Conditional model checking

Dirk Beyer, Thomas A. Henzinger, M. Erkan Keremoglu, Philipp Wendler
2012 Proceedings of the ACM SIGSOFT 20th International Symposium on the Foundations of Software Engineering - FSE '12  
In our experiments, we investigated as one major application of conditional model checking the sequential combination of model checkers with information passing.  ...  We propose to reformulate the model-checking problem as follows, in order to have the verification tool report a summary of the performed work even in case of failure: given a program and a specification  ...  In sequential combination with conditions, the two model checkers are not executed independently in batch mode one after the other, in good hope that one succeeds, but connected via a condition.  ... 
doi:10.1145/2393596.2393664 dblp:conf/sigsoft/BeyerHKW12 fatcat:2ay4retrdzfzdjrasoug27aom4

Verification Artifacts in Cooperative Verification: Survey and Unifying Component Framework [chapter]

Dirk Beyer, Heike Wehrheim
2020 Lecture Notes in Computer Science  
The goal of cooperative verification is to combine verification approaches in such a way that they work together to verify a system model.  ...  In particular, cooperative verifiers provide exchangeable information (verification artifacts) to other verifiers or consume such information from other verifiers with the goal of increasing the overall  ...  Conditional model checking is not widespread yet because it was considered difficult to extend a verifier such that it understands conditions as input and reduces the state space accordingly before running  ... 
doi:10.1007/978-3-030-61362-4_8 fatcat:32t7iq7e6fbbhchr4hveo3beja

Formal Verification of an Executable LTL Model Checker with Partial Order Reduction [chapter]

Julian Brunner, Peter Lammich
2016 Lecture Notes in Computer Science  
Building on Doron Peled's paper "Combining Partial Order Reductions with On-the-Fly Model-Checking", we formally prove abstract correctness of ample set partial order reduction.  ...  Thus, the Cava model checker that we verified in previous work can be used as a back end with only minimal changes. Finally, we generate executable SML code using a stepwise refinement approach.  ...  There is also the issue of implementation correctness, which is usually addressed via testing in the context of model checking algorithms.  ... 
doi:10.1007/978-3-319-40648-0_23 fatcat:e4caxriogfdjpme3gwsbnrzwlq

Verifying Commit-Atomicity Using Model-Checking [chapter]

Cormac Flanagan
2004 Lecture Notes in Computer Science  
Using the SPIN model checker, we have applied this technique to verify the atomicity of a number of irreducible procedures that could not be handled by previous reduction-based tools for checking atomicity  ...  Several existing tools verify atomicity by showing that every interleaved execution reduces to an equivalent serial execution (in which the actions of each atomic procedure are not interleaved with actions  ...  Their experimental results suggest that verifying atomicity via model-checking is feasible for unit-testing.  ... 
doi:10.1007/978-3-540-24732-6_18 fatcat:hh3yllnjsrhjtlqfobni3zgjjq

Reducing the Model Checking Cost of Product Lines Using Static Analysis Techniques [chapter]

Hamideh Sabouri, Ramtin Khosravi
2012 Lecture Notes in Computer Science  
In this paper, we propose two techniques to reduce the number of component combinations that have to be verified.  ...  The number of combinations is exponential in the number of features, which makes the cost of product line model checking high.  ...  The model checker does not verify these products, therefore the number of feature combinations that should be verified is reduced.  ... 
doi:10.1007/978-3-642-35743-5_18 fatcat:mf4rdtojojhcxl42i36yff4aeu

Verification of Control Systems Implemented in Simulink with Assertion Checks and Theorem Proving: A Case Study [article]

Dejanira Araiza-Illan, Kerstin Eder, Arthur Richards
2015 arXiv   pre-print
On the other hand, according to their scope, some of the sub-requirements are verified through assertion checks in simulation, and others via automatic theorem proving over an ideal mathematical model  ...  On one hand, the sub-requirements are verified through assertion checks in simulation.  ...  Acknowledgements The work presented in this paper was supported by the EPSRC grant EP/J01205X/1 RIVERAS: Robust Integrated Verification of Autonomous Systems.  ... 
arXiv:1505.05699v2 fatcat:sersezqkhzasnipkavks6oqcqe

Synthesis of Memory Fences via Refinement Propagation [chapter]

Yuri Meshman, Andrei Dan, Martin Vechev, Eran Yahav
2014 Lecture Notes in Computer Science  
We address the problem of fence inference in infinite-state concurrent programs running on relaxed memory models such as TSO and PSO.  ...  Our technique is based on two main ideas: (i) verification with numerical domains: we reduce verification under relaxed models to verification under sequential consistency using integer and boolean variables  ...  Verification via Reduction with Numerical Abstract Domains Second, we verify a program under relaxed memory models by reduction to a program under sequential consistency.  ... 
doi:10.1007/978-3-319-10936-7_15 fatcat:mu4y3whi2bbzhaltvsam7gthm4

FRed: Conditional Model Checking via Reducers and Folders [chapter]

Dirk Beyer, Marie-Christine Jakobs
2020 Lecture Notes in Computer Science  
Conditional model checking (CMC) is a successful solution for cooperation between verification tools.  ...  In CMC, the first verifier outputs a condition describing the state space that it successfully verified.  ...  One promising combination is conditional model checking (CMC) [9] , which unlike others does not modify the programs nor let the combined techniques know each other.  ... 
doi:10.1007/978-3-030-58768-0_7 fatcat:kesg4biuu5g6tilogtce57qjuu

Closed-loop formal verification framework with non-determinism, configurable by meta-modelling

Sandeep Patil, Sayantan Bhadra, Valeriy Vyatkin
2011 IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society  
In this paper we propose a new method reducing complexity of model-checking on account of infusing nondeterminism into certain parts of the plant model during formal verification process guided by a software  ...  Net Condition/Event Systems (NCES) formalism is used for modular design of closed-loop models which are verified by ViVe and SESA model-checkers.  ...  In order to verify control logic under various input combinations, model developers introduce nondeterminism into the model of the plant.  ... 
doi:10.1109/iecon.2011.6119923 fatcat:oigqtj2cq5f47dlp4fu3ungzsy

Verifying hardware in its software context

Kurshan, Levin, Minea, Peled, Yenigun
1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD) ICCAD-97  
The reduced transformed model then may be verified using a verification algorithm whose scope is purely synchronous models, without modification.  ...  Thus, independent of the interface verification problem, this gives a general method for combining partial order reduction with symbolic model-checking.  ...  The reduced model is checked by COSPAN in the same manner a s any synchronous model.  ... 
doi:10.1109/iccad.1997.643621 fatcat:uqoz5k7vlfflzpepn73fbwuaku

Bounded Model Checking of C++ Programs Based on the Qt Framework (extended version) [article]

Felipe R. M. Sousa, Lucas C. Cordeiro, Eddie B. de Lima Filho
2015 arXiv   pre-print
Because of that, the present paper proposes a simplified version of the Qt framework, which is integrated into the Efficient SMT-Based Bounded Model Checking tool to verify actual applications that use  ...  As a consequence, consumer electronics companies usually invest a lot of resources in fast and automatic verification processes, in order to create robust systems and reduce product recall rates.  ...  Part of the results presented in this paper were sponsored by Samsung Eletrônica da Amazônia Ltda. under the terms of Brazilian federal law No. 8.387/91 (SUFRAMA).  ... 
arXiv:1509.01682v1 fatcat:kmp2rpvz4fchpi5qxookpvy7le

Bounded model checking of C++ programs based on the Qt framework

Felipe R. M. Sousa, Lucas C. Cordeiro, Eddie B. de Lima Filho
2015 2015 IEEE 4th Global Conference on Consumer Electronics (GCCE)  
Because of that, the present paper proposes a simplified version of the Qt framework, which is integrated into the Efficient SMT-Based Bounded Model Checking tool to verify actual applications that use  ...  As a consequence, consumer electronics companies usually invest a lot of resources in fast and automatic verification processes, in order to create robust systems and reduce product recall rates.  ...  Part of the results presented in this paper were sponsored by Samsung Eletrônica da Amazônia Ltda. under the terms of Brazilian federal law No. 8.387/91 (SUFRAMA).  ... 
doi:10.1109/gcce.2015.7398699 dblp:conf/gcce/SousaCF15 fatcat:a4vynhc5rza43fa4h2zo736ubq

A Formal Approach to Connectibility Affordances

Andrew J. Abbate, Ellen J. Bass
2019 IEEE Transactions on Human-Machine Systems  
A model checking technique aids in verifying accuracy, meaning the user can actualize desired affordance instances, and robustness, meaning undesired affordance instances never emerge.  ...  An XML-based grammar, a model checking syntax translation tool, and a linear temporal logic specification of accuracy and robustness support the analyses.  ...  , a technique for verifying a specification of accuracy and robustness via model checking.  ... 
doi:10.1109/thms.2018.2886265 fatcat:xlpwxwzdvjhndb2heo4pw6xbyy

Conditional Model Checking [article]

Dirk Beyer and Thomas A. Henzinger and M. Erkan Keremoglu and Philipp Wendler
2011 arXiv   pre-print
We propose to reformulate the model-checking problem as follows, in order to have the verification tool report a summary of the performed work even in case of failure: given a program and a specification  ...  We are of course interested in model checkers that return conditions P that are as weak as possible.  ...  In summary, we have demonstrated that with conditional model checking: (1) More problem instances can be solved. (2) Performance can be improved, in terms of reduced runtime and reduced memory consumption  ... 
arXiv:1109.6926v1 fatcat:rdow5d3cabggzjy2tqlb7o3ubi
« Previous Showing results 1 — 15 out of 334,467 results