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Code Compression with Split Echo Instructions
2009
IEICE transactions on information and systems
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Code density is often a critical issue in embedded computers, since the memory size of embedded systems is strictly limited. Echo instructions have been proposed as a method for reducing code size. ...
Evaluation results show that memory requirement is reduced by 12% on average with small additional hardware cost. ...
By replacing all but one instance of duplicate code sequences by echo instructions, program size can be reduced. ...
doi:10.1587/transinf.e92.d.1650
fatcat:wsz27rv74bdvlpz2jmcvvan5te
Simultaneously Improving Code Size, Performance, and Energy in Embedded Processors
2006
Proceedings of the Design Automation & Test in Europe Conference
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Techniques such as reduced length instruction sets lead to significant code size savings but also introduce performance and energy consumption impediments such as additional dynamic instructions or decompression ...
Code size and energy consumption are critical design concerns for embedded processors as they determine the cost of the overall system. ...
By removing jump and branch instructions, the basic code size optimizations expose more repeated instruction sequences that block subsetting can eliminate. ...
doi:10.1109/date.2006.244090
dblp:conf/date/ZmilyK06
fatcat:jhidoow6r5gnnlh4mtkg2u7q5m
Optimizing Code Size for Embedded Real-Time Applications
[chapter]
2006
Lecture Notes in Computer Science
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This paper presents an efficient technique for code compression. In our work, a sequence of instructions that occurs repeatedly in an application will be compressed to reduce its code size. ...
Moreover, we devise some optimization techniques to improve the code size reduction and the performance, and show their impacts. ...
In this paper, we address the code compression of an application program by compressing its repeated instruction sequences. ...
doi:10.1007/11802167_31
fatcat:lrogwrvaarg5nha73ircsokcr4
Enhanced code density of embedded CISC processors with echo technology
2005
Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05
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Some RISC processor, e.g. the THUMB extension in the ARM processor, supports aggressive code size reduction even at the cost of significant performance loss. ...
Our experiments show that IA32 processor equipped with Echo instructions is capable of achieving a similar code density as the THUMB extension in the ARM instruction set with significantly lower performance ...
Echo Technology (ET) replaces a repeating code sequence with a single ECHO instruction to reduce code size Its usefulness for code size reduction has been demonstrated for JAVA bytecode and Alpha code ...
doi:10.1145/1084834.1084878
dblp:conf/codes/WuBHPP05
fatcat:grh74756ozfmhfvzeap5itn3w4
Instruction Selection for Compilers That Target Architectures with Echo Instructions
[chapter]
2004
Lecture Notes in Computer Science
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Identical program fragments are replaced with echo instructions, thereby compressing the program. ...
As embedded architectures begin to adopt echo instructions, new compiler techniques will be required to perform the compression step. ...
Third, the code sequences referenced by two echo instructions may overlap. For example, repeated patterns may overlap, as exemplified by patterns ABCDE and ABC in Figure 1 . ...
doi:10.1007/978-3-540-30113-4_17
fatcat:ftngq24lprhldni64z4jijvade
Enhanced code compression for embedded RISC processors
1999
SIGPLAN notices
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Our work focuses on reducing the size of a program's code segment, using pattern-matching techniques to identify and coalesce together repeated instruction sequences. ...
of repeated code fragments, and a new form of profile-driven code compression that reduces the speed penalty arising from compression. ...
We used software built by the entire group over many years; we are indebted to the many people who have contributed to this code base. Tim Harvey assisted in this work in many ways. ...
doi:10.1145/301631.301655
fatcat:k23l74rm6jdv3dfu3duuisko7e
Enhanced code compression for embedded RISC processors
1999
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation - PLDI '99
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Our work focuses on reducing the size of a program's code segment, using pattern-matching techniques to identify and coalesce together repeated instruction sequences. ...
of repeated code fragments, and a new form of profile-driven code compression that reduces the speed penalty arising from compression. ...
We used software built by the entire group over many years; we are indebted to the many people who have contributed to this code base. Tim Harvey assisted in this work in many ways. ...
doi:10.1145/301618.301655
dblp:conf/pldi/CooperM99
fatcat:w56z6qn7m5gsbh2aau3cqspkbu
Efficient profile-guided size optimization for native mobile applications
2022
Proceedings of the 31st ACM SIGPLAN International Conference on Compiler Construction
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Our work improves both the size and performance of real-world mobile apps when compared to the MinSize (-Oz) optimization level: (i) in SocialApp, we reduced the compressed app size by 5.2%, the uncompressed ...
app size by 9.6% and the page faults by 20.6%, and (ii) in ChatApp, we reduced them by 2.4%, 4.6% and 36.4%, respectively. ...
Outliner Outlining reduces code size by replacing repeated sequences of instructions with function calls. ...
doi:10.1145/3497776.3517764
fatcat:ozjhtrc5f5epdj5dimactfcg5e
Code compression for embedded systems
1998
Proceedings of the 35th annual conference on Design automation conference - DAC '98
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Compression reduced code size by an average of 7.91% without optimization, and made less of a difference with optimization, yielding a combined 22.48% reduction. ...
The first, procedural abstraction, created new procedures out of frequently repeated sequences of code and replaces sequences with procedure calls. ...
Code Compression in Embedded Systems Miller _____________________________________________________________________________________________
_____________________________________________________________ ...
doi:10.1145/277044.277185
dblp:conf/dac/LekatsasW98
fatcat:bmrzzjevfbgnlil4uljjgjmywe
Profile-guided code compression
2002
SIGPLAN notices
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The code size reductions obtained depend on the threshold used to determine what code is "infrequently executed" and hence should be compressed: for low thresholds, we see size reductions of 13.7% to 18.8% ...
The use of data compression techniques increases the amount of code size reduction that can be achieved; their application to infrequently executed code limits the runtime overhead due to dynamic decompression ...
Acknowledgements We gratefully acknowledge the loan of equipment by Karen Flattery, Richard Flower, and Robert Muth of Compaq Corp. ...
doi:10.1145/543552.512542
fatcat:lze6pmme6rdvff32w35etmlsl4
Reducing code size with echo instructions
2003
Proceedings of the international conference on Compilers, architectures and synthesis for embedded systems - CASES '03
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With echo instructions, two or more similar, but not necessarily identical, sections of code can be reduced to a single copy of the repeating code. ...
We apply register renaming and instruction scheduling to expose more similarities in code, use profiles to guide compression, and propose minor architectural modifications to support echo instructions. ...
This work was funded in part by NSF grant No. CCR-0105743, and grants from Microsoft and Intel. ...
doi:10.1145/951710.951724
dblp:conf/cases/LauSSC03
fatcat:aiqlb56lqbdcvdxio5vjynnhca
Reducing code size with echo instructions
2003
Proceedings of the international conference on Compilers, architectures and synthesis for embedded systems - CASES '03
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With echo instructions, two or more similar, but not necessarily identical, sections of code can be reduced to a single copy of the repeating code. ...
We apply register renaming and instruction scheduling to expose more similarities in code, use profiles to guide compression, and propose minor architectural modifications to support echo instructions. ...
This work was funded in part by NSF grant No. CCR-0105743, and grants from Microsoft and Intel. ...
doi:10.1145/951723.951724
fatcat:7xgm4zh6gfc73jfbembawphmfi
Code Size Reduction in Embedded Systems with Redesigned ISA for RISC Processors
2013
International Journal of Computer Applications
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Experimental results for MiBench Benchmark programs with Register-Memory Architecture Simulation reveal that code size reduction up to 22% can be achieved with modified MIPS Architecture. ...
This is also applicable for microMIPS processor that claims 35% code space saving with 16-bit instructions, thus offering a total of over 55% code space reduction compared to MIPS32 Architecture, for embedded ...
This strategy can be combined with other methods of code size reduction thereby achieving additional amount of code size reduction. ...
doi:10.5120/10690-5594
fatcat:kjleqjsnbbdyfgssp3wdjezfni
Survey of code-size reduction methods
2003
ACM Computing Surveys
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Although code-size reduction is a relatively new research area, numerous publications already exist on it. ...
Program code compression is an emerging research activity that is having an impact in several production areas such as networking and embedded systems. ...
The size-reduction of a sequence X is obtained by utilizing its information content, that is, if there is less information stored by the sequence we can represent it in a shorter encoded sequence. ...
doi:10.1145/937503.937504
fatcat:pahy2dh2ojhtlg3b6x2pxvxwii
Bitmask-Based Code Compression for Embedded Systems
2008
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Embedded systems are constrained by the available memory. Code-compression techniques address this issue by reducing the code size of application programs. ...
It is a major challenge to develop an efficient code-compression technique that can generate substantial reduction in code size without affecting the overall system performance. ...
As shown by Lekatsas et al. [8] , 50% code compression can lead to 22%-80% energy reduction due to performance improvement and memory-size reduction. ...
doi:10.1109/tcad.2008.917563
fatcat:hutaohgxvbevvj5x6p2rhtndb4
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