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Code-generation for machines with multiregister operations

A. V. Aho, S. C. Johnson, J. D. Ullman
1977 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages - POPL '77  
With register-pair machines a new phenomenon arises that is not present in optimal code generation for single register machines: Inanoptimal evaluation ofan expression it may benecessarytooscillate back  ...  A linear-time optimal code generation algorithm is derived for a register-pair machine in which all registers are interchangeable.  ...  With register-pair machines a new phenomenon arises that is not present in optimal code generation for -singleregister machines.  ... 
doi:10.1145/512950.512953 dblp:conf/popl/AhoJU77 fatcat:nl72zoj5qnaurbsyoxlahwynqu

Code generation for expressions with common subexpressions (Extended Abstract)

A. V. Aho, S. C. Johnson, J. D. Ullman
1976 Proceedings of the 3rd ACM SIGACT-SIGPLAN symposium on Principles on programming languages - POPL '76  
Acknowledgements The authors wish to thank Brenda Baker, Brian Kernighan, Doug Mcllroy, and Elliot Pinson for their helpful comments on the manuscript.  ...  The Machine Model We assume the code generator is to produce code for a multiregister two-address machine. The instructions of the machine are of the form (1) r~ .  ...  Finally, after discussing code generation for commutative machines, we conclude with a list of open problems.  ... 
doi:10.1145/800168.811537 dblp:conf/popl/AhoJU76 fatcat:aw5mjhx5s5ecbjhuduynt4bygi

Page 1002 of Mathematical Reviews Vol. 56, Issue 3 [page]

1978 Mathematical Reviews  
Elements S of the operator algebra are referred to as operators which are generated by multiregister periodically defined transformations.  ...  The latter represents regular expressions of algorithmic algebras (described in terms of multiregister operators for two-way infinite registers) in the abstract model of the computing medium.  ... 

Page 659 of Mathematical Reviews Vol. 51, Issue 2 [page]

1976 Mathematical Reviews  
The generation of optimal code for stack machines. J. Assoc. Comput. Mach. 22 (1975), 382-396.  ...  It is well known that it is at best extremely difficult, and in general actually impossible, to produce, by an algorithm, that code for a given machine which calculates the value of some expression in  ... 

Page 1978 of Mathematical Reviews Vol. 56, Issue 5 [page]

1978 Mathematical Reviews  
The closedness of the uniform tag sequences with respect to mappings, defined by sequential machines, is proved.  ...  A universal algebra %=<A, Q) with the basic set A and signature of operations Q has an isolated subalgebra S=<B, Q), where BCA, if for any n-place operation w € Q the relation (a), az, - - -, a,) w € B  ... 

C compiler design for a network processor

J. Wagner, R. Leupers
2001 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
One important problem in code generation for embedded processors is the design of efficient compilers for target machines with application-specific architectures.  ...  It has been shown experimentally, that such highly machine-specific techniques are a promising approach to generate high-quality machine code, whose quality often comes close to handwritten assembly code  ...  The backend creates a single machine operation for this CKF.  ... 
doi:10.1109/43.959859 fatcat:c2atkponzndslcjlivwhvmosr4

A practical tool kit for making portable compilers

Andrew S. Tanenbaum, Hans van Staveren, E. G. Keizer, Johan W. Stevenson
1983 Communications of the ACM  
For a typical multiregister machine, instructions will exist to add constants to registers, but not to memory.  ...  THE BACK END The back end reads a stream of EM instructions and generates assembly code for the target machine.  ... 
doi:10.1145/358172.358182 fatcat:3r2wakrbgrhatjrrkjdgaj3w6q

A syntax-directed integrated programming environment for developing simd supercomputer software

R. H. Perrott, T. F. Lunney
1991 Software, Practice & Experience  
Actus is a high-level, Pascal-like language, with SIMD parallel processing features.  ...  The increasing availability and use of supercomputers has highlighted the need for better software development techniques and tools.  ...  Adeeb Zarea-Aliabadi of Griffiths University, Australia, for his help and advice during the implementation phase of the system.  ... 
doi:10.1002/spe.4380210304 fatcat:nsmjngirmjhbbpvbzvw2gfstxi

Embedded software in real-time signal processing systems: design technologies

G. Goossens, J. Van Praet, D. Lanneer, W. Geurts, A. Kifli, C. Liem, P.G. Paulin
1997 Proceedings of the IEEE  
This paper discusses design technology issues for embedded systems using processor cores, with a focus on software compilation tools.  ...  This situation has resulted in an increased research activity in the area of design tool support for embedded processors.  ...  In [51] a code selection algorithm was presented that can generate optimal vertical code for DAG's, on a processor with only a single register.  ... 
doi:10.1109/5.558718 fatcat:jtn2aeo4ybcwfgc67rdsdqjhei

Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor

R.A. Ravindran, R.M. Senger, E.D. Marsman, G.S. Dasika, M.R. Guthaus, S.A. Mahlke, R.B. Brown
2005 IEEE transactions on computers  
Low-power embedded processors utilize compact instruction encodings to achieve small code size.  ...  Manjunath for their comments and suggestions. Fabrication of this work at TSMC was supported by the MOSIS Educational Program.  ...  A machine description file (MDES) is used to describe the architecture of the target machine for generating machine-specific assembly code.  ... 
doi:10.1109/tc.2005.132 fatcat:ow4igm53l5h45lyj3osm7thrma

Hardware-supported virtualization on ARM

Prashant Varanasi, Gernot Heiser
2011 Proceedings of the Second Asia-Pacific Workshop on Systems - APSys '11  
Late last year ARM announced architectural support for virtualization, which will allow execution of unmodified guest operating system binaries.  ...  We describe our approach and report our initial experience with the architecture.  ...  Acknowledgements We would like to thank the OK Labs engineering team for their support, especially Carl van Schaik for sharing his thorough knowledge of the ARM architecture.  ... 
doi:10.1145/2103799.2103813 dblp:conf/apsys/VaranasiH11 fatcat:mxgdnhsskvbqlidl3ov4sqdmou

Graph coloring register allocation for processors with multi-register operands

Brian R. Nickerson
1990 Proceedings of the ACM SIGPLAN 1990 conference on Programming language design and implementation - PLDI '90  
Though graph coloring algorithms have been shown to work well when applied to register allocation problems, the technique has not been generalized for processor architectures in which some instructions  ...  This paper presents a suitable generalization.  ...  These instruction sequences might be slower in their own right, and the loss of code density can slow the operation further.  ... 
doi:10.1145/93542.93552 dblp:conf/pldi/Nickerson90 fatcat:fom7dc45xrad5p77dcklfsopwm

High-throughput ovarian follicle counting by an innovative deep learning approach

Charlotte Sonigo, Stéphane Jankowski, Olivier Yoo, Olivier Trassard, Nicolas Bousquet, Michael Grynberg, Isabelle Beau, Nadine Binart
2018 Scientific Reports  
Its ability to correct label errors enables conducting an active learning process with the operator, improving the overall counting iteratively.  ...  This counting, usually performed by specialized operators, is a tedious, time-consuming but indispensable procedure.The development and increasing use of deep machine learning algorithms promise to speed  ...  Acknowledgements We thank N.Ba for performing tissue sections (Institut Biomedical de Bicêtre, University Paris Sud). For Charlotte Sonigo, funding was from Plan Cancer 2014-2019/INSERM.  ... 
doi:10.1038/s41598-018-31883-8 pmid:30202115 pmcid:PMC6131397 fatcat:mmge4fuvjjcadobq7jrgtb32fm

Structured Programming with go to Statements

Donald E. Knuth
1974 ACM Computing Surveys  
readable code.  ...  ) a methodology of program design, beginning with readable and correct, but possibly inefficient programs that are systematically transformed if necessary into efficient and correct, but possibly less  ...  As with Example 1, it seems best to make two comparisons, one with the assembly code that a decent pro-grammer would write for the examples, and the other with the object code produced by a typical compiler  ... 
doi:10.1145/356635.356640 fatcat:2qyy6zszzvenpk3s5gsdkjupoy

Research on Security Detection Technology for Internet of Things Terminal Based on Firmware Code Genes

Xinbing Zhu, Qingbao Li, Zhifeng Chen, Guimin Zhang, Peng Shan
2020 IEEE Access  
Therefore, the validity and robustness of this method for codes with confusion, encryption and other techniques remain to be studied.  ...  representation [20] [21] , on graph (or tree) structures [22] [23] [24] [27] , and on machine learning [4] [23] [24] .  ... 
doi:10.1109/access.2020.3017088 fatcat:snhcxxg7rvhollnt4rt2orhwam
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