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Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology

Paul Devoge, Hassen Aziza, Philippe Lorenzini, Franck Julien, Abderrezak Marzaki, Alexandre Malherbe, Marc Mantelli, Thomas Sardin, Sebastien Haendler, Arnaud Regnier, Stephan Niel
2021 2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)  
HAL is a multi-disciplinary open access archive for the deposit and dissemination of scientific research documents, whether they are published or not.  ...  L'archive ouverte pluridisciplinaire HAL, est destinée au dépôt et à la diffusion de documents scientifiques de niveau recherche, publiés ou non, émanant des établissements d'enseignement et de recherche  ...  Compared to the existing HV device, our new MV device uses a thinner oxide, that already exist in the technology and serves as the tunnel oxide for the embedded non-volatile memory.  ... 
doi:10.1109/dtis53253.2021.9505137 fatcat:sg2darpmwvh7pj5zmv3yceysae

A ReRAM-based non-volatile flip-flop with sub-VT read and CMOS voltage-compatible write

Ibrahim Kazi, Pascal Meinerzhagen, Pierre-Emmanuel Gaillardon, Davide Sacchetto, Andreas Burg, Giovanni De Micheli
2013 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)  
On the other hand, emerging CMOS-compatible device technologies such as Resistive Memories (ReRAMs) enable non-volatile, on-chip data storage and zero-leakage sleep periods.  ...  For the first time, we present a ReRAM-based non-volatile flipflop which is optimized for sub-VT operation. Writing to the ReRAM devices works with a CMOS-compatible supply voltage.  ...  Among many technological options, Oxide Memories (OxRAMs) [5] are a promising candidate for next generation, CMOS-compatible, non-volatile memory applications.  ... 
doi:10.1109/newcas.2013.6573586 dblp:conf/newcas/KaziMGSBM13 fatcat:kdrjzy25mfe5vchelgeqftxmda

A 100% Stable Sense-Amplifier Based Physically Unclonable Function with Individually Embedded Non-Volatile Memory

Kang-Un Choi, Seungbum Baek, Jino Heo, Jong-Phil Hong
2019 IEEE Access  
In this paper is presented a sense-amplifier-based physically unclonable function (PUF) with individually embedded non-volatile memory (eNVM) that offers 100% stable random bits.  ...  INDEX TERMS CMOS, information security, IoT device, non-volatile memory, physically unclonable function.  ...  In this paper, a sense-amplifier-based PUF (SA-PUF) with individually embedded non-volatile memory (eNVM) is proposed and it has both 100% stability and good inter-chip hamming distance (HD).  ... 
doi:10.1109/access.2019.2961967 fatcat:zdbavodbovh33a5l5htq7eaufu

Design and Simulation of a 128 kb Embedded Nonvolatile Memory Based on a Hybrid RRAM (HfO2 )/28 nm FDSOI CMOS Technology

Jean-Michel Portal, Marc Bocquet, Santhosh Onkaraiah, Mathieu Moreau, Hassen Aziza, Damien Deleruyelle, Kholdoun Torki, Elisa Vianello, Alexandre Levisse, Bastien Giraud, Olivier Thomas, Fabien Clermidy
2017 IEEE transactions on nanotechnology  
Index Terms-Embedded non-volatile memory, memory architecture, resistive switching memory, RRAM,  ...  The 128kb memory architecture based on RRAM technology and 28nm FDSOI CMOS core process is presented with a bottom-up approach, starting from the bit-cell definition up to the complete memory architecture  ...  In this section, the 128kb Non Volatile Memory circuit is validated through transistor-level simulations.  ... 
doi:10.1109/tnano.2017.2703985 fatcat:hlkufwn4ubfbvjxt7ldjis3zcm

Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design

Ibrahim Kazi, Pascal Meinerzhagen, Pierre-Emmanuel Gaillardon, Davide Sacchetto, Yusuf Leblebici, Andreas Burg, Giovanni De Micheli
2014 IEEE Transactions on Circuits and Systems Part 1: Regular Papers  
On the other hand, emerging CMOS-compatible device technologies such as Resistive Memories (ReRAMs) enable non-volatile, on-chip data storage and zero-leakage sleep periods.  ...  Three low-voltage NVFF circuit topologies are proposed and evaluated in terms of energy dissipation and reliability.  ...  While nearand sub-operation enables extremely low leakage power, emerging device technologies allowing the integration of non-volatile memory devices on top of CMOS chips bear the potential of zero-leakage  ... 
doi:10.1109/tcsi.2014.2334891 fatcat:yrp3qeqnfbccbbvs6k2wseh33q

High-performance low-power magnetic tunnel junction based non-volatile flip-flop

Taehui Na, Kyungho Ryu, Jisu Kim, Seong-Ook Jung, Jung Pill Kim, Seung H. Kang
2014 2014 IEEE International Symposium on Circuits and Systems (ISCAS)  
Power has becoming a burning issue in modern VLSI design. Non volatile memories like MRAM, FeRAM , ReRAM etc can save power by allowing the system power off in standby state.  ...  Some mechanisms like checkpointing/power gating has been undergone in this NVM(non-volatile memories). There are numerous methods proposed to control leakage power dissipation.  ...  memory in servers or with the embedded or distributed emerging non-volatile memory in IoT objects [4] ReRAM-based non-volatile flipflop which is optimized for sub-VT operation.  ... 
doi:10.1109/iscas.2014.6865544 dblp:conf/iscas/NaRKJKK14 fatcat:waae42gxfbe47cfafixkv6eclu

Embedded systems to high performance computing using STT-MRAM

Sophiane Senni, Thibaud Delobelle, Odilia Coi, Pierre-Yves Peneau, Lionel Torres, Abdoulaye Gamatie, Pascal Benoit, Gilles Sassatelli
2017 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017  
The scaling limits of CMOS have pushed many researchers to explore alternative technologies for beyond CMOS circuits.  ...  For beyond CMOS systems, the emerging memory technology STT-MRAM is seen as a promising alternative solution.  ...  ACKNOWLEDGMENT This work has received funding from the European Union's Horizon 2020 research and innovation programme under grant agreement No 687973 -GREAT (heteroGeneous integRated magnetic tEchnology  ... 
doi:10.23919/date.2017.7927046 dblp:conf/date/SenniDCPTGBS17 fatcat:a6gzqipgvjfxji4swhkibb6s44

Spintronics for low-power computing

Yue Zhang, Weisheng Zhao, Jacques-Olivier Klein, Wang Kang, Damien Querlioz, Youguang Zhang, Dafine Ravelosona, Claude Chappert
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014  
However this trend tends to run out of steam in recent technology nodes.  ...  The continuous improvements in the size of the transistors and in the operating frequencies result in serious power consumption, heat dissipation and reliability issues.  ...  ACKNOWLEDGMENTS The authors would like to thank the financial support of G3N-NVCPU, ANR-MARS and ANR-DIPMEM projects.  ... 
doi:10.7873/date.2014.316 dblp:conf/date/ZhangZKKQZRC14 fatcat:vfqxucz2fjgglkw3ieebaymfsa

Non-Volatile Processor Based on MRAM for Ultra-Low-Power IoT Devices

Sophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatie
2016 ACM Journal on Emerging Technologies in Computing Systems  
Integration of non-volatility as a new feature of memories has the great potential to allow full data retention after a complete shutdown with a fast wake-up time.  ...  Emerging non-volatile memory technologies are seen as a very attractive solution to design ultra-low-power systems.  ...  An alternative solution to perform a checkpoint at memory level is the use of a double context non-volatile SRAM cell as proposed in Jovanovic et al. [2015] .  ... 
doi:10.1145/3001936 fatcat:7w7nga6ysvg3lptcvd7izkwj64

IRC: Cross-layer design exploration of Intermittent Robust Computation units for IoTs [article]

Arman Roohi, Ronald F DeMara
2019 arXiv   pre-print
leveraging the non-volatility inherent in spin-based switching devices.  ...  Then a Logic-Embedded Flip-Flop (LE-FF) is developed to realize rudimentary Boolean logic functions along with an inherent state-holding capability within a compact footprint.  ...  Circuit-level Approach to Intermittent Computation To achieve RO#2 spans the design and evaluation of Boolean logic gates realized by the modeled non-volatile spintronic devices.  ... 
arXiv:1904.10564v1 fatcat:jel6q4prhbgalc2helludtjkre

Energy Efficient Mobile Service Computing with Differential Spintronic-C-elements: A Logic-in-Memory Asynchronous Computing Paradigm

Ashkan Samiee, Yunchuan Sun, Ronald DeMara, Yoonsuk Choi, Yu Bai
2019 IEEE Access  
INDEX TERMS Mobile service computing, in-memory computing, spintronic C-element, image processing, asynchronous circuit, post-CMOS devices.  ...  The results indicate that the proposed design achieves 38% leakage reduction and 30% accuracy improvement compared to the state-of-the-art non-volatile asynchronous circuits.  ...  Also, stacking MRAM technology over the CMOS circuit, can desirably reduce chip area and fabrication costs.  ... 
doi:10.1109/access.2019.2911098 fatcat:fs5xujbdxvhz5biggjm6qmi7yy

MagCiM: A Flexible and Non-Volatile Computing-in-Memory Processor for Energy-Efficient Logic Computation

Vahid Jamshidi, Ahmad Patooghy, Mahdi Fazeli
2022 IEEE Access  
The mCell memory is characterized by almost zero leakage power, high integration density, high level of reliability, and compatibility with the CMOS VLSI fabrication process.  ...  on operands stored in a memory array.  ...  III) CMOL is a hybrid CMOS-Nano circuit proposed in [38] for the implementation of the AES algorithm. To evaluate CMOL circuit, HSPICE simulations were conducted using a CMOS 45nm technology.  ... 
doi:10.1109/access.2022.3159967 fatcat:abinw2wuqzcahckmyog27ua3ye

Fault Modeling of Graphene Nanoribbon FET Logic Circuits

Gil-Tomàs, Gracia-Morán, Saiz-Adalid, Gil-Vicente
2019 Electronics  
In addition, it can help in the design and evaluation of defect- and fault-tolerant nanoarchitectures based on graphene circuits.  ...  The graphene nanoribbon field-effect transistor (GNR FET) has revealed itself as a promising technology to design emerging research logic circuits, because of its outstanding potential speed and power  ...  Conflicts of Interest: The authors declare no conflict of interest.  ... 
doi:10.3390/electronics8080851 fatcat:fsjfkksxevbbbbogmlqbffqtgi

Power efficient Thermally Assisted Switching Magnetic memory based memory systems

Sophiane Senni, Lionel Torres, Gilles Sassatelli, Anastasiia Bukto, Bruno Mussard
2014 2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)  
With the increasing size of the memory system inside today's chips, memories are becoming a critical part of the design of modern embedded systems.  ...  Magnetic RAM (MRAM) technology is a very attractive alternative offering simultaneously reasonable performance and power consumption efficiency, high density and non-volatility.  ...  Because intrinsically non-volatile, TAS-MRAM cell has zero standby power, and the CMOS access transistor does not need to be power supplied.  ... 
doi:10.1109/recosoc.2014.6861357 dblp:conf/recosoc/SenniTSBM14 fatcat:wbp5odipnnax3illqp3rofab6e

Hybrid STT-CMOS designs for reverse-engineering prevention

Theodore Winograd, Hassan Salmani, Hamid Mahmoodi, Kris Gaj, Houman Homayoun
2016 Proceedings of the 53rd Annual Design Automation Conference on - DAC '16  
Based on the non-volatile spin transfer torque (STT) magnetic technology, we introduce a basic set of non-volatile reconfigurable Look-Up- Table ( LUT) logic components (NV-STT-based LUTs).  ...  Our study conducted on a large number of standard circuit benchmarks concludes significant resiliency of hybrid STT-CMOS circuits against various types of attacks.  ...  an external non-volatile memory which becomes the source of vulnerability.  ... 
doi:10.1145/2897937.2898099 dblp:conf/dac/WinogradSMGH16 fatcat:u66vmttpvzb7vmrsd7vzpvq7nq
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