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Photonic networks-on-chip: Opportunities and challenges

Michele Petracca, Keren Bergman, Luca P. Carloni
2008 2008 IEEE International Symposium on Circuits and Systems  
In future high-performance CMPs, however, the high bandwidth requirements for both intrachip and off-chip communication are severely challenging the electronic communications infrastructure to meet these  ...  we discuss the pros and cons of using two different network topologies to implement it.  ...  Fabrication capabilities and integration with commercial CMOS chip manufacturing that are now available open new exciting opportunities [6] .  ... 
doi:10.1109/iscas.2008.4542036 dblp:conf/iscas/PetraccaBC08 fatcat:wbikdtpvaze7fitezdvhhub6zi

Evaluating OpenMP on Chip MultiThreading Platforms [chapter]

Chunhua Liao, Zhenying Liu, Lei Huang, Barbara Chapman
2008 Lecture Notes in Computer Science  
Index Terms OpenMP, Chip MultiThreading, Chip Multiprocessing, Simultaneous MultiThreading, Multicore I.  ...  CHIP MULTITHREADING AND ITS IMPLICATIONS FOR OPENMP CMT is emerging as the dominant trend in general-purpose processor design [23] .  ...  Chandler Wilkerson from UH coordinated the loan and provided timely installation and technical support with the help of Tony Curtis in the High Performance Computing Center of UH.  ... 
doi:10.1007/978-3-540-68555-5_15 fatcat:g6r6utog7ndchd6tjm2m4vinka

The Coming Wave of Multithreaded Chip Multiprocessors

James Laudon, Lawrence Spracklen
2007 International journal of parallel programming  
However, process technology challenges, chip power constraints, and difficulty in extracting instruction-level parallelism are conspiring to limit the performance of future individual processors.  ...  cores can provide better performance and performance/Watt on many commercial workloads.  ...  Conclusion Process technology challenges, chip power constraints, and difficulty in extracting ILP are conspiring to limit the performance of future individual processors.  ... 
doi:10.1007/s10766-007-0033-6 fatcat:4gzhbtdumvablcjfy62osfb2g4

A chip multithreaded processor for network-facing workloads

S. Kapil, H. McGhan, J. Lawrendra
2004 IEEE Micro  
thus enable radically higher levels of performance scaling. 1 Throughput computing is based on chip multithreading processor design technology.  ...  Systems of this type tend to favor compute dense form factors, such as racks and blades. 2 The processor's dual-thread execution capability, compact die size, and minimal power consumption combine to produce  ...  Son, Jeffrey Su, Ken Swanson, Toshinari Takayanagi, Muthukumar Vairavan, and Dan Vo.  ... 
doi:10.1109/mm.2004.1289288 fatcat:6qryksp4nbd4fdk7ermbtdaumy

Exploiting inter-thread temporal locality for chip multithreading

Jiayuan Meng, Jeremy W Sheaffer, Kevin Skadron
2010 2010 IEEE International Symposium on Parallel & Distributed Processing (IPDPS)  
., the number of caches), and these partitions are then subdivided and scheduled among each core's available thread contexts so that threads sharing a core operate on neighboring elements to maximize cache  ...  Simulations on M5 achieve an average speedup of 1.69× and 36% energy savings over conventional scheduling techniques that are oblivious to whether threads share a cache.  ...  IIS-0612049 and CNS-0615277, and a grant from Intel Research.  ... 
doi:10.1109/ipdps.2010.5470465 dblp:conf/ipps/MengSS10 fatcat:6b33ba2lmzcnzjo24mlogswgza

Chip Multithreading: Opportunities and Challenges

L. Spracklen, S.G. Abraham
11th International Symposium on High-Performance Computer Architecture  
Chip Multi-Threaded (CMT) processors provide support for many simultaneous hardware threads of execution in various ways, including Simultaneous Multithreading (SMT) and Chip Multiprocessing (CMP).  ...  This paper describes some of these challenges including, hot sets, hot banks, speculative prefetching strategies, request prioritization and off-chip bandwidth reduction.  ...  Another interesting opportunity for CMT processors is support for on-chip hardware accelerators.  ... 
doi:10.1109/hpca.2005.10 dblp:conf/hpca/SpracklenA05 fatcat:fk7eov6b3rdptjle23qg5kubvq

Reliable performance analysis of a multicore multithreaded system-on-chip

Simon Schliecker, Mircea Negrean, Gabriela Nicolescu, Pierre Paulin, Rolf Ernst
2008 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis - CODES/ISSS '08  
Paulin, and R. Ernst. Reliable Performance Analysis of a Multicore Multithreaded System-On-Chip, in Proc. CODES+ISSS, c ACM 978-1-60558-470-  ...  In this paper we present a multithreaded multiprocessors platform and multimedia application.  ...  In this paper, we combine two techniques to solve the performance analysis challenge of a realistic multicore multithreaded system.  ... 
doi:10.1145/1450135.1450172 dblp:conf/codes/SchlieckerNNPE08 fatcat:yv5hezxobvh5dmrypgnztjj75i

Improving energy efficiency of asymmetric chip multithreaded multiprocessors through reduced OS noise scheduling

Ryan E. Grant, Ahmad Afsahi
2009 Concurrency and Computation  
The performance of the emerging chip multithreaded symmetric multiprocessors (SMPs) is of great importance to the high performance computing community.  ...  The emerging CMT-based symmetric multiprocessor (SMP) servers present new challenges as well as new opportunities to maximize performance provided the resources available could be shared efficiently.  ...  Conclusions and Future Research Chip multithreaded multi-core systems have become the mainstream in processor design.  ... 
doi:10.1002/cpe.1454 fatcat:hw64e7tybjhzlfpcvl3nmusi4i

Multithreaded Processors

T. Ungerer
2002 Computer journal  
This survey paper explains and classifies the various multithreading techniques in research and in commercial microprocessors and compares multithreaded processors with chip multiprocessors.  ...  The chip multiprocessor integrates two or more complete processors on a single chip. Every unit of a processor is duplicated and used independently of its copies on the chip.  ...  speculative multithreading) and chip multiprocessors.  ... 
doi:10.1093/comjnl/45.3.320 fatcat:hlkkabuhrzhkrmuyqomzfmc6zm

Reconfigurable Hardware Accelerators: Opportunities, Trends, and Challenges [article]

Chao Wang, Wenqi Lou, Lei Gong, Lihui Jin, Luchao Tan, Yahui Hu, Xi Li, Xuehai Zhou
2017 arXiv   pre-print
In this survey, we compare hot research issues and concern domains, furthermore, analyze and illuminate advantages, disadvantages, and challenges of reconfigurable accelerators.  ...  Second, the reconfigurable architectures of employing FPGA performs prototype systems rapidly and features excellent customizability and reconfigurability.  ...  bring new challenges and opportunities to the computer industry.  ... 
arXiv:1712.04771v1 fatcat:3lxv45qb4zaqpagtn3eghrmroe

Computer Architecture: Challenges and Opportunities for the Next Decade

T. Agerwala, S. Chatterjee
2005 IEEE Micro  
Key levers are the development of power-optimized building blocks, deployment of chip-level multiprocessors, increasing use of accelerators and offload engines, widespread use of scale-out systems, and  ...  We can address this challenge by focusing on power optimization at all levels.  ...  Acknowledgments The work cited here came from multiple individuals and groups at IBM Research.  ... 
doi:10.1109/mm.2005.45 fatcat:vn4hruzdx5cz7kza7263gbo4pe

Resource-Aware Replication on Heterogeneous Multicores: Challenges and Opportunities [article]

Björn Döbel, Robert Muschner, Hermann Härtig
2014 arXiv   pre-print
In this paper we review challenges and opportunities for ROMAIN to adapt to such multicore platforms in order to decrease execution overhead, resource requirements, and vulnerability against faults.  ...  We implemented ROMAIN, an OS service providing redundant multithreading on top of the FIASCO.OC microkernel to address the increasing unreliability of hardware.  ...  We determined challenges that system developers face when applying replication on these platforms and showed opportunities that arise for improving overall system reliability by explicitly leveraging the  ... 
arXiv:1405.2913v1 fatcat:ha7rsuy6rjaxroppvkwi6alzqu

Speculative Multithreaded Processors [chapter]

Gurindar S. Sohi, Amir Roth
2000 Lecture Notes in Computer Science  
Multithreaded architectures provide new opportunities for extracting parallelism from a single program via thread level speculation.  ...  Monolithic designs occupying many tens or hundreds of millions of transistors will be very difficult to design, debug, and verify, and increasing wire delays will make intra-chip communication and clock  ...  and by an Intel Foundation Graduate Fellowship.  ... 
doi:10.1007/3-540-44467-x_23 fatcat:2ecvlteawzb57ek3hz57axiejy

Speculative multithreaded processors

G.S. Sohi, A. Roth
2001 Computer  
With this trend comes a renewed and increasing interest in multithreaded architectures.  ...  during the past decade, culminating ultimately in the hundreds of millions of transistors used to build increasingly fast on-chip devices.  ...  School, and by an Intel Foundation Graduate Fellowship.  ... 
doi:10.1109/2.917542 fatcat:fsdtjvtfsnheljrwckngvqg73m

Socio-Technological Challenges and Opportunities: Paths Forward [article]

Carole-Jean Wu, Srilatha Manne, Parthasarathy Ranganathan, Sarah Bird, Shane Greenstein
2021 arXiv   pre-print
Consequently, computing technologies have fueled significant economic growth, creating education opportunities, enabling access to a wider and more diverse spectrum of information, and, at the same time  ...  previously possible -- stimulating novel application domains and increasing uses and deployments at an ever-faster pace.  ...  Acknowledgement We would like to thank Doug Carmean, David Brooks, and Lizy John for their insightful feedback on this work.  ... 
arXiv:2108.06738v1 fatcat:istk7du3vvcnpcmwznl53ui73i
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