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Side-Channel Attacks on RISC-V Processors: Current Progress, Challenges, and Opportunities [article]

Mahya Morid Ahmadi, Faiq Khalid, Muhammad Shafique
2021 arXiv   pre-print
Towards this, we perform an in-depth analysis of the applicability and practical implications of cache attacks on RISC-V microprocessors and their associated challenges.  ...  Side-channel attacks on microprocessors, like the RISC-V, exhibit security vulnerabilities that lead to several design challenges.  ...  ACKNOWLEDGMENT This work was partially supported by Doctoral College Resilient Embedded Systems which is run jointly by TU Wien's Faculty of Informatics and FH-Technikum Wien.  ... 
arXiv:2106.08877v1 fatcat:zdalqpzvajatjhvu4ik7ccvwky

Microprocessors in the Era of Terascale Integration

Shekhar Borkar, Norman P. Jouppi, Per Stenstrom
2007 2007 Design, Automation & Test in Europe Conference & Exhibition  
Power, variability, reliability, aging, and testing will pose as barriers and challenges to harness this integration capacity.  ...  Advances in microarchitecture and programming systems discussed in this paper are potential solutions.  ...  We will discuss these challenges, opportunities, and potential solutions in microarchitecture and programming systems.  ... 
doi:10.1109/date.2007.364597 dblp:conf/date/BorkarJS07 fatcat:bmd4yi4hz5d3dkcelij5rtbhfu

From single core to multi-core

Jeff Parkhurst, John Darringer, Bill Grundmann
2006 Computer-Aided Design (ICCAD), IEEE International Conference on  
This paper discusses this trend towards multi-core processor designs, the design challenges that accompany it and a view of the research required to support it.  ...  However, the demand for increasing performance continues which has fueled the move to integrated multiple processor (multi-core) designs.  ...  THE MIGRATION TO MULTI-CORE The first microprocessor had only 2200 transistors. Through the 1980s and 1990s and on to today, increasing performance has been the driver.  ... 
doi:10.1145/1233501.1233516 dblp:conf/iccad/ParkhurstDG06 fatcat:atbqnprgqnhjvl4xarna2kswuq

From Single Core to Multi-Core: Preparing for a new exponential

Jeff Parkhurst, John Darringer, Bill Grundmann
2006 Computer-Aided Design (ICCAD), IEEE International Conference on  
This paper discusses this trend towards multi-core processor designs, the design challenges that accompany it and a view of the research required to support it.  ...  However, the demand for increasing performance continues which has fueled the move to integrated multiple processor (multi-core) designs.  ...  THE MIGRATION TO MULTI-CORE The first microprocessor had only 2200 transistors. Through the 1980s and 1990s and on to today, increasing performance has been the driver.  ... 
doi:10.1109/iccad.2006.320067 fatcat:yn3hs2fuxze4zketzvsykrvlk4

Architecture of DFC-1 computer with data driven computation model

Liberios Vokorokos, Branislav Mados, Jan Perhac, Martin Chovanec
2008 2008 6th International Symposium on Applied Machine Intelligence and Informatics  
Article introduces architecture of computer with data driven computation model based on principles of tile computing which is the modern approach to multi-core design of microprocessors, with basic principle  ...  of cores layout in bi-directional mesh of cores with interconnecting communication network.  ...  Mainstream multi-core designs of superscalar processors are trying to address those challenges and commercially available microprocessors are integrating two or four cores into single chip.  ... 
doi:10.1109/sami.2008.4469194 fatcat:52k2k3v2ezayxg45y3bnvirju4

COOL interconnect low power interconnection technology for scalable 3D LSI design

Marco Chacin, Hiroyuki Uchida, Michiya Hagimoto, Takashi Miyazaki, Takeshi Ohkawa, Rimon Ikeno, Yukoh Matsumoto, Fumito Imura, Motohiro Suzuki, Katsuya Kikuchi, Hiroshi Nakagawa, Masahiro Aoyagi
2011 2011 IEEE Cool Chips XIV  
3D multi-chip stacking is a promising technology poised to help combat the "memory wall" and the "power wall" in future multi-core processors.  ...  However, as technology scales and the chip sizes increase due to the number of transistors, interconnects have become a major performance bottleneck and a major source of power consumption for microprocessors  ...  As a result of these developments, multi-core processors have emerged as the prime solution to the power and scalability concerns of processor design.  ... 
doi:10.1109/coolchips.2011.5890921 dblp:conf/coolchips/ChacinUHMOIMISK11 fatcat:yazwwhkd4ff73fah6kf34ld7x4

International workshop on multicore software engineering (IWMSE 2009)

Adam Porter, Victor Pankratius, Lawrence G. Votta
2009 2009 31st International Conference on Software Engineering - Companion Volume  
As multi/manycore processors with multiple CPUs on a chip become standard and affordable for everyone, software engineers face the challenge of parallelizing applications of all sorts.  ...  This is the second in a series of workshops specifically focusing on software engineering challenges of multi/manycore.  ...  The members of the program committee hope that this workshop will continue to raise and address the many software challenges raised by multi/manycore chips.  ... 
doi:10.1109/icse-companion.2009.5071067 dblp:conf/icse/PorterPV09 fatcat:bbp2ibmhg5cvtgzxuxltxsqu3m

Programming Models and Development Software for a Space-Based Many-Core Processor

Stephen P. Crago, Dong-In Kang, Mikyung Kang, Robert Kost, Karandeep Singh, Joseph Suh, John Paul Walters
2011 2011 IEEE Fourth International Conference on Space Mission Challenges for Information Technology  
While this work was done on the Maestro chip, the principles discussed can be applied to any multi-core or many-core processor. Multi-core programming; space-based processing; parallel software I.  ...  The Maestro processor is a 49-core many-core processor for space based on the TILE64 architecture and implemented in rad-hard-by-design technology by Boeing.  ...  FLIGHT SOFTWARE CONSIDERATIONS While multi-core provides potential performance opportunities and programming challenges, it also provides some unique opportunities for flight software.  ... 
doi:10.1109/smc-it.2011.29 fatcat:twmw3cqyozfblipi5gvkadz7ki

Study of Various Factors Affecting Performance of Multi-Core Processors

Nitin Chaturvedi, Gurunarayanan S
2013 International Journal of Distributed and Parallel systems  
This Paper presents analysis of various parameters affecting the performance of Multi-core Architectures like varying the number of cores, changes L2 cache size, further we have varied directory size from  ...  As Chip Multiprocessor system (CMP) become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single chip.  ...  or multi-core processors.  ... 
doi:10.5121/ijdps.2013.4404 fatcat:ipcaejvdybaipejw5ehavdham4

Exploring New Architectures in Accelerating CFD for Air Force Applications

Jack Dongarra, Gregory Peterson, Stanimir Tomov, Jeff Allred, Vincent Natoli, David Richie
2008 2008 DoD HPCMP Users Group Conference  
But recent microprocessor design trends including the introduction of multi/many-core designs and the increasingly popular use in HPC of accelerators such as General Purpose Graphics Processing Units (  ...  We consider not only multi/many-core but also special purpose (e.g. GPUs) and reconfigurable computing (e.g. FPGAs) architectures.  ...  National Science Foundation, and the U.S. Department of Energy. We thank NVIDIA and NVIDIA's Professor Partnership Program for their hardware donations.  ... 
doi:10.1109/dod.hpcmp.ugc.2008.12 fatcat:2egelqj2hrhohehuctte3hsq7u

Multi-core: Adding a New Dimension to Computing [article]

Md. Tanvir Al Amin
2010 arXiv   pre-print
Such processors are commonly known as multi-core processors.  ...  In this paper, we explore state of the art technologies for multi-core processors and existing software tools to support parallelism.  ...  To exploit the processing power offered by multi-core, potential opportunity for multithreading and load balancing must be recognized by the programmer.  ... 
arXiv:1011.3382v1 fatcat:lytsvogjibgkvjr5ty5abtecae

10x10: A General-purpose Architectural Approach to Heterogeneity and Energy Efficiency

Andrew A. Chien, Allan Snavely, Mark Gahagan
2011 Procedia Computer Science  
These changes create major new challenges in architecture and software. As a result, the performance and energy-efficiency advantages of heterogeneous architectures are increasingly attractive.  ...  Two decades of microprocessor architecture driven by quantitative 90/10 optimization has delivered an extraordinary 1000-fold improvement in microprocessor performance, enabled by transistor scaling which  ...  Acknowledgements This work was supported in part by NSF Grant OCI-1057921 and inspired by the Exascale studies chartered by Dr. Bill Harrod of DARPA.  ... 
doi:10.1016/j.procs.2011.04.217 fatcat:mh5tb2orn5a63plojeebdfdeky

CEDA Currents

2014 IEEE design & test  
Variability in device and circuit parameters is one of the primary challenges in the semiconductor industry today.  ...  Parameter variations adversely affect the performance and energy efficiency of microprocessors across all market segments, ranging from small embedded cores in SoCs to large multicore servers.  ...  Yang et al. h ''High Communication Throughput on Low Scan Cycle Time with Multi/Many-Core Programmable Logic Controllers, '' by A. Canedo, H. Ludwig, and M.A. Al Faruque.  ... 
doi:10.1109/mdat.2014.2349276 fatcat:dizsilgpiverlngpl4p5dv3wry

Integration of nanophotonic devices for on-chip optical interconnects

Solomon Assefa, Fengnian Xia, S. W. Bedell, Ying Zhang, Teya Topuria, Philip M. Rice, Yurii A. Vlasov
2009 2009 14th OptoElectronics and Communications Conference  
Compact germanium waveguide photodetector with 40Gbps bandwidth and 0.4A/W responsivity is demonstrated.  ...  High-quality Ge-on-insulator single-crystalline layer was monolithically integrated into front-end CMOS process by lateral seeded crystallization.  ...  Optical interconnects are attractive solutions for achieving communication bandwidth well beyond terabit-per-second for highperformance multi-core microprocessors.  ... 
doi:10.1109/oecc.2009.5214256 fatcat:chnr6nm6xvgiloaueqofraf5iq

Survey on microprocessor architecture and development trends

YaoYingbiao, Zhang Jianwu, Zhao Danying
2008 2008 11th IEEE International Conference on Communication Technology  
To improve the performance of microprocessor, many kinds of novel architecture, such as multi-thread processor, CMP, PIM, and reconfigurable computing processor, have been proposed.  ...  This paper summarizes characteristic of these kinds of architecture, and predicts the development trends of microprocessor in the future.  ...  INTRODUCTION At present, the microprocessor architecture is facing new challenges and new opportunities.  ... 
doi:10.1109/icct.2008.4716247 fatcat:3mrfuvgwcrcyjbcm2an6nuymri
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