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An Enhanced Differential Cache Attack on CLEFIA for Large Cache Lines
[chapter]
2011
Lecture Notes in Computer Science
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Reported results on cache trace attacks on CLEFIA do not work with increased cache line size. ...
The efficacy of the attack is theoretically justified by showing the effect of cache line size on the time and space complexity of the attack. ...
a Feistel Structure from Cache Traces Attack on Feistel ciphers such as CLEFIA requires keys from more than one round to be obtained. ...
doi:10.1007/978-3-642-25578-6_6
fatcat:6jqibpr4zzhhhkg2a4q3k6ta7m
Hardware Prefetchers Leak: A Revisit of SVF for Cache-Timing Attacks
2012
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture Workshops
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We use the modified metric denoted Timing-SVF, to show that standard prefetchers based on sequential algorithms can leak information in cache timing attacks. ...
Micro-architectural features have an influence on security against cache attacks. ...
Depending on the side-channel used, cache-attacks are classified into three: trace, access, and timing. ...
doi:10.1109/microw.2012.13
dblp:conf/micro/BhattacharyaRM12
fatcat:tgxxy2apdzai7apwokygsn2rde
On the Optimality of Differential Fault Analyses on CLEFIA
[chapter]
2016
Lecture Notes in Computer Science
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An Enhanced Differential Cache Attack on
CLEFIA for Large Cache Lines. ...
For the attacks analyzed in this work, the
follows: in Section II, we explain the theory of Differen- attacker is assumed to have full control on the timing
tial Fault Analyses and present the CLEFIA ...
doi:10.1007/978-3-319-32859-1_15
fatcat:lxx5cmkygrgxzjw47lnmuxauwi
A Cache Trace Attack on CAMELLIA
[chapter]
2011
Lecture Notes in Computer Science
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In this paper we present an attack on CAMELLIA, which utilizes cache access patterns along with the differential properties of CAMELLIA's s-boxes. ...
The attack, when implemented on a PowerPC microprocessor having a 32 byte cache line size requires power traces from 2 16 different encryptions. ...
In this paper we propose a cache trace attack on the 128-bit block cipher CAMELLIA [2] . CAMELLIA like CLEFIA is based on the Feistel structure. ...
doi:10.1007/978-3-642-24586-2_13
fatcat:b2triqu6uvebxdhrlarbnxp4uu
Lightweight Password Hashing Scheme for Embedded Systems
[chapter]
2015
Lecture Notes in Computer Science
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A fair comparison with similar proposals on mainstream computer is presented. ...
Also, scrypt is vulnerable to new types of attacks, like cache-timing [5] and garbage-collector attacks [6] . ...
Unfortunately, it is vulnerable to other attacks, like cache-timing [5] and garbage-collector [6] . ...
doi:10.1007/978-3-319-24018-3_17
fatcat:njwna6vt4vdrxi4z633tahrjlq
Lightweight Cryptography for IoT: A State-of-the-Art
[article]
2020
arXiv
pre-print
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Some of the emerging applications are listed in Table 5 Camellia Cache timing attacks [20] , Impossible differential attack [95] 19 SIMON Differential and impossible differential attacks [25] , ...
Cache timing attacks in software implementations were presented in [20] . SIMON [96] , designed by National Security Agency (NSA), is known for its optimal performance in hardware. ...
arXiv:2006.13813v1
fatcat:tydoekhuvrhjtek64z77zw34ti
Attacking AES Using Bernstein's Attack on Modern Processors
[chapter]
2013
Lecture Notes in Computer Science
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In 2005, Bernstein [6] has successfully attacked the OpenSSL AES implementation on a Pentium III processor and completely retrieved the full AES key using his cache timing side-channel attack. ...
Even after the appearance of the modern side-channel attacks like timing and power consumption side-channel attacks, NIST claimed that AES is not vulnerable to timing attacks. ...
Conclusion We succeeded to attack the latest OpenSSL implementation of AES using Bernstein's cache timing attack on a different testing environment from those used earlier. ...
doi:10.1007/978-3-642-38553-7_7
fatcat:bz5vten4mnbe7ktmlhi2g54zem
A Survey of Microarchitectural Side-channel Vulnerabilities, Attacks and Defenses in Cryptography
[article]
2021
arXiv
pre-print
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In this paper, we systematize microarchitectural side channels with a focus on attacks and defenses in cryptographic applications. ...
One popular type of such attacks is the microarchitectural attack, where the adversary exploits the hardware features to break the protection enforced by the operating system and steal the secrets from ...
[20] discovered that the prefetching state of the cache lines can result in non-constant time encryption, which leaks timing information for the attacker to reveal the key from CLEFIA. Cache bank. ...
arXiv:2103.14244v1
fatcat:u35eyivqbngplfa4qrswfsqqti
Guest Editorial SPACE 2017 Special Issue in the Journal of Hardware and Systems Security (HaSS)
2019
Journal of Hardware and Systems Security
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The proposed attack analysis is performed on AES and Clefia. ...
The results acquired from Intel as well as from AMD machines show that the proposed attack is more potent than the the state-of-the-art cache timing attacks. ...
doi:10.1007/s41635-019-00067-9
fatcat:2si25i2ekzcenlx4rzyjollxgy
Foundations of Secure Scaling (Dagstuhl Seminar 16342)
2017
Dagstuhl Reports
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We consider two cases: 1. cache attacks ,2. fault injection attacks. Cache memory leaks information based on a cache hit. ...
As a result, the attacker can launch a cache attack by measuring the total time for the encryption. This technique has been used to attack a remote server. ...
FST are further reduced, to make FST a promising fault attack countermeasure. The talk also shows an example of cache timing attack on a 128 bit cipher, known as Clefia. ...
doi:10.4230/dagrep.6.8.65
dblp:journals/dagstuhl-reports/BatinaBSS16
fatcat:qya6rznvonbi7pfic7ocbxwkea
A Study on Light Weight Cryptography Algorithms for Data Security in IOT
2018
International Journal of Engineering & Technology
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s
Energy
Efficient due to
less no. of
rounds
in
cryptography
2
CAMELLIA 1.54 290.1
Cache
timing
attacks
Resistance to
Brute
Force
attack on keys ...
CLEFIA: This algorithm is built on Feistel network that was standardized in 2007 by NIST [13, 14] . This is other type of light weight algorithm which showed good performance in security. ...
doi:10.14419/ijet.v7i2.7.11088
fatcat:t4c2ktxtkfa6hmqjqzkbho5zmq
Hybrid Lightweight and Robust Encryption Design for Security in IoT
2015
International Journal of Security and Its Applications
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The use of Bit slicing technique in this hybrid design results in good differential and linear properties, which provide resistance to cache and timing attacks. ...
With the help of a hybrid design, we have improved the key scheduling aspect of LED and related key attacks which were neglected in the LED cipher. ...
It also helps in providing resistance to cache and timing attacks [22] . Bit slicing technique results in efficient hardware and software implementation. ...
doi:10.14257/ijsia.2015.9.12.10
fatcat:eedlw7xhmbadjkay7k3bkfi37a
A comprehensive study of multiple deductions-based algebraic trace driven cache attacks on AES
2013
Computers & security
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For the first time, we show that TDCAs on AES-192 and AES-256 become possible with the MDATDCA technique. ...
Existing trace driven cache attacks (TDCAs) can only analyze the cache events in the first two rounds or the last round of AES, which limits the efficiency of the attacks. ...
attacks [1] , and millions of cache traces in timing driven cache attacks [2, 3] . ...
doi:10.1016/j.cose.2013.07.002
fatcat:bnsdmkz3ubclri43lw6htmi4oe
Meet the Sherlock Holmes' of Side Channel Leakage: A Survey of Cache SCA Detection Techniques
2020
IEEE Access
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Cache Side Channel Attacks (SCAs) have gained a lot of attention in the recent past. Since, these attacks exploit the caching hardware vulnerabilities, they are fast and dangerous. ...
Researchers have already proposed different techniques to detect cache side channel attacks. ...
Time-driven attacks are further categorized into active time-driven cache attacks and passive time-driven cache attacks. ...
doi:10.1109/access.2020.2980522
fatcat:m56pih7ntbdubci2slah7hlkci
Cache Storage Channels: Alias-Driven Attacks and Verified Countermeasures
2016
2016 IEEE Symposium on Security and Privacy (SP)
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This paper reveals a novel attack vector, exposing a low-noise cache storage channel that can be exploited by adapting well-known timing channel analysis techniques. ...
We design and implement three different attacks using the new vector on trusted services and report on the discovery of an 128-bit key from an AES encryption service running in TrustZone on Raspberry Pi ...
Acıiçmez showed a trace-driven cache attack on the first two rounds of AES [2] , which has been later improved and extended by X. Zhao [56] to compromise a CLEFIA block cipher. ...
doi:10.1109/sp.2016.11
dblp:conf/sp/GuancialeNBD16
fatcat:bz4taektybgsrdykg7tqgq3jaq
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