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CableS : Thread Control and Memory System Extensions for Shared Virtual Memory Clusters
[chapter]
2001
Lecture Notes in Computer Science
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In this work we address this problem by providing a single cluster image with respect to thread and memory management to programmers. ...
Finally, we show that the overhead introduced by the extra functionality of CableS affects the parallel section of applications that have been tuned for the shared memory abstraction only in cases where ...
Also, we would like to thank Anna Thelin for her OpenMP SPLASH-2 code, and Mats Brorsson for his help in obtaining OdinMP and OpenMP SPLASH-2 resources. ...
doi:10.1007/3-540-44587-0_15
fatcat:eau3afoxebg2bdubp67bihnogm
RAMP Blue: A Message-Passing Manycore System in FPGAs
2007
2007 International Conference on Field Programmable Logic and Applications
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We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. ...
A control network with a tree topology provides management and debugging capabilities. ...
We would also like to thank Chen Chang, Henry Chen, and Dan Burke for all their work in creating the BEE2. This work was funded in part by the National Science ...
doi:10.1109/fpl.2007.4380625
dblp:conf/fpl/KrasnovSWGD07
fatcat:2xuhslh3ajb5fmdoktmh4l2yja
Parallel, distributed and GPU computing technologies in single-particle electron microscopy
2009
Acta Crystallographica Section D: Biological Crystallography
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In this article, state-of-the-art paradigms are introduced, the tools and infrastructure needed to apply these paradigms are presented and a state-of-the-art infrastructure and solution strategy for moving ...
In particular, graphics processing units (GPUs), which were originally developed for rendering real-time effects in computer games, are now ubiquitous and provide unprecedented computational power for ...
Special thanks go to Irene Boettcher-Gajewski and Peter Goldmann for invaluable Photoshop experience and photo shooting. ...
doi:10.1107/s0907444909011433
pmid:19564686
pmcid:PMC2703572
fatcat:puw6niofz5au3fzybp7fn7tjxa
A Guided Tour through Data-center Networking
2012
Queue
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HPC systems rely on fast (low-latency) and efficient interconnection networks capable of providing both high bandwidth and efficient messaging for fine-grained (e.g., cache-line size) communication. ...
He has numerous technical publications and patents in the areas of interconnection networks, data-center networking, cache-coherence protocols, high-bandwidth memory systems, and supercomputing. ...
As a result, a datacenter cluster may use virtualization for both performance and fault isolation, and Web applications are programmed with this sharing in mind. ...
doi:10.1145/2208917.2208919
fatcat:6qdyiq7kufckrh5tmfuxvoirwm
A guided tour of data-center networking
2012
Communications of the ACM
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As a result, a data-center cluster may use virtualization for both performance and fault isolation, and Web applications are programmed with this sharing in mind. ...
network Performance Here, we discuss the etiquette for sharing the network resources-specifically, the physical links and buffer spaces are resources that require flow control to share them efficiently ...
He has numerous technical publications and patents in areas of interconnection networks, data-center networking, cache-coherence protocols, high-bandwidth memory systems, and supercomputing. ...
doi:10.1145/2184319.2184335
fatcat:lqw2xn2dcrd3vpcrcb3bmceghq
Cluster computing: the commodity supercomputer
1999
Software, Practice & Experience
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The availability of high-speed networks and increasingly powerful commodity microprocessors is making the usage of clusters, or networks, of computers an appealing vehicle for cost effective parallel computing ...
Finally, we summarise our findings and draw a number of conclusions relating to the usefulness and likely future of cluster computing. ...
ACKNOWLEDGEMENTS We would like to thank Rose Rayner, John Rosbottom, Toni Cortes and Lars Rzymianowicz for their efforts proof reading this paper. ...
doi:10.1002/(sici)1097-024x(199905)29:6<551::aid-spe248>3.0.co;2-c
fatcat:sxxtvtczcrb75fxl4olnbljiqi
Server I/O networks past, present, and future
2003
Proceedings of the ACM SIGCOMM workshop on Network-I/O convergence experience, lessons, implications - NICELI '03
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enabling network convergence; and how these new technologies are being deployed on various network families. ...
As a result several fabric types evolved and several interconnects emerged to satisfy a subset of the requirements. ...
Virtual
Adapter
Virtual
Adapter
uP, $
uP, $
uP, $
uP , $
Memory
Memory
Controller
Memory
Memory
Controller
I/O Expansion
Network
Virtual
Adapter
Virtual
Adapter
Virtual
Adapter ...
doi:10.1145/944748.944749
fatcat:mpsgonhiw5d6tiqvr7pzbytuvi
Server I/O networks past, present, and future
2003
Proceedings of the ACM SIGCOMM workshop on Network-I/O convergence experience, lessons, implications - NICELI '03
Preserved Fulltext
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enabling network convergence; and how these new technologies are being deployed on various network families. ...
As a result several fabric types evolved and several interconnects emerged to satisfy a subset of the requirements. ...
Virtual
Adapter
Virtual
Adapter
uP, $
uP, $
uP, $
uP , $
Memory
Memory
Controller
Memory
Memory
Controller
I/O Expansion
Network
Virtual
Adapter
Virtual
Adapter
Virtual
Adapter ...
doi:10.1145/944747.944749
fatcat:4ytmiuwahba6jgf4y2d7kq2pey
Comparing Windows NT, Linux, and QNX as the basis for cluster systems
2001
Concurrency and Computation
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The central controller is responsible for configuration management, resource allocation, and job control. ...
At a high level of abstraction, many cluster systems use a similar architecture: There is a single system-wide control process, and an additional process on each node of the cluster (Fig. 1) . ...
Acknowledgements This work was supported in part by the Israel Science Foundation and by the Ministry of Science. ...
doi:10.1002/cpe.613
fatcat:e4yh6wu6bjct3jhtqmezilxpbm
Cluster Computing in the Classroom and Integration With Computing Curricula 2001
2004
IEEE Transactions on Education
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The authors share their experiences in teaching cluster computing and the topics chosen, depending on course objectives. ...
The course material is described in relation to the knowledge units of the Joint IEEE Computer Society and ACM Computing Curricula 2001 and includes system architecture, parallel programming, algorithms ...
systems support for shared memory programming and
basic networking concepts. ...
doi:10.1109/te.2004.824842
fatcat:jl5wbr7zlzddvfr54jlxylhst4
The QCDOC Project
2005
Nuclear Physics B - Proceedings Supplements
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Thus very large systems delivering over 5 TFlop/s of performance on the evolution of a single lattice is possible. Large prototypes have been built and are functioning correctly. ...
The QCDOC project has developed a supercomputer optimised for the needs of Lattice QCD simulations. ...
The PowerPC virtual memory hardware is used to protect the kernel space, but not no non-trivial virtual memory translation is used. ...
doi:10.1016/j.nuclphysbps.2004.11.179
fatcat:uaucqtqx7zhqlgusp5bu33vqyu
The AXIOM platform for next-generation cyber physical systems
2017
Microprocessors and microsystems
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These systems usually integrate a set of hardware-software components for optimal application execution in terms of performance and energy consumption. ...
The AXIOM project (Agile, eXtensible, fast I/O Module), presented in this paper, proposes a hardware-software platform for CPS coupled with an easy parallel programming model and sufficient connectivity ...
In 2011, he joined the Computer Architecture and VLSI Systems group at the Foundation for Research and Technology -Hellas (FORTH) in Greece, where he is working as a post-doc researcher for national and ...
doi:10.1016/j.micpro.2017.05.018
fatcat:kry4k47ovzckhe26tvqvfucriq
TCCluster: A Cluster Architecture Utilizing the Processor Host Interface as a Network Interconnect
2010
2010 IEEE International Conference on Cluster Computing
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In this paper, we explain the addressing of nodes in such a cluster, the routing within such a system and the programming model that can be applied. ...
This approach offers higher bandwidth and much lower communication latencies than the traditional approaches by virtually integrating the network interface adapter into the processor. ...
The shared memory approach performs well for small scale systems of up to 8 or 16 nodes, however, as the coherency overhead grows with the number of nodes it cannot be applied to large clusters. ...
doi:10.1109/cluster.2010.37
dblp:conf/cluster/LitzTB10
fatcat:maplidchczfxhhfnfdv2cjnzpe
FOSS-Based Grid Computing
[article]
2015
arXiv
pre-print
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In this expository paper we will be primarily concerned with core aspects of Grids and Grid computing using free and open-source software with some emphasis on utility computing. ...
This article was written in 2006 and should be of historical interest. ...
These constructs may involve multi-threading, support for distributed computing, message passing, shared resources (including shared memory) or promises (= futures). ...
arXiv:cs/0608122v4
fatcat:3r2ahqfo7na5tiiysgxsw77hva
Effective communication for a system of cluster-on-a-chip processors
2015
Proceedings of the Sixth International Workshop on Programming Models and Applications for Multicores and Manycores - PMAM '15
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Our new research system virtually extends the on-chip network of multiple SCC systems and provides new communication functionality for direct on-chip memory access. ...
For this study, we build a multi-chip processor with 240 tightly connected cores and demonstrate its scalability. ...
We thank Intel Labs for physical access to multiple SCC systems. We would also like to thank the anonymous reviewers for their constructive feedback that helped to improve this paper. ...
doi:10.1145/2712386.2712393
dblp:conf/ppopp/RebleLFM15
fatcat:kj4vj5j6gnfh3jyskvdhmrbiku
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