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Brief announcement

Joseph Izraelevitz, Michael L. Scott
2014 Proceedings of the 2014 ACM symposium on Principles of distributed computing - PODC '14  
In this paper we introduce a new nonblocking construction that allows any nonblocking container for data to be paired with almost any nonblocking container for antidata.  ...  A dual container has the property that when it is empty, the remove method will insert an explicit reservation ("antidata") into the container, rather than returning an error flag.  ...  If both subcontainers of the generic dual container are correct and nonblocking, then the generic dual container itself is obstruction free. THEOREM 3 (IMMEDIATE WAKEUP).  ... 
doi:10.1145/2611462.2611510 dblp:conf/podc/IzraelevitzS14 fatcat:p7ucn2gpt5euzg7pv5ybhelw2y

Generality and Speed in Nonblocking Dual Containers

Joseph Izraelevitz, Michael L. Scott
2017 ACM Transactions on Parallel Computing  
We present the first general-purpose construction for nonblocking dual containers, allowing any nonblocking container for data to be paired with almost any nonblocking container for requests.  ...  Section 3 (earlier versions of which appeared as a brief announcement [Izraelevitz and Scott 2014a] and a technical report [Izraelevitz and Scott 2014c]) introduces a generic construction for building  ...  APPENDIXES A. GENERIC DUAL CONTAINERS PSEUDOCODE Pseudocode for the generic dual container construction appeared in Figures 2 and 3 .  ... 
doi:10.1145/3040220 fatcat:mlgs6rvma5e6rfx43ghntdrk5u

Programming and Validation Techniques for Reliable Goal-driven Autonomic Software [chapter]

Damian Dechev, Nicolas Rouquette, Peter Pirkelbauer, Bjarne Stroustrup
2009 Autonomic Communication  
In this work we present the design and implementation of a first concurrency and time centered framework for verification and semantic parallelization of real-time C++ within the JPL Mission Data System  ...  As a case study we demonstrate the verification and semantic parallelization of the MDS Goal Networks.  ...  Overview of the Lock-free Operations In this section we present a brief overview of the most critical vector's lock-free algorithms (see [5] for the full set of the nonblocking algorithms).  ... 
doi:10.1007/978-0-387-09753-4_9 fatcat:2enncpailrdozc5yigu4fk64y4

Trends in multicore DSP platforms

Lina Karam, Ismail Alkamal, Alan Gatherer, Gene Frantz, David Anderson, Brian Evans
2009 IEEE Signal Processing Magazine  
He is a Fellow of the IEEE.  ...  Each tile contains a processor, L1 and L2 cache memory, and a nonblocking switch that connects each tile to the mesh.  ...  A brief discussion on performance analysis is also included. [FIG3] Typical multicore DSP platform.  ... 
doi:10.1109/msp.2009.934113 fatcat:2hsjudqn7nfclbjhm5lkivi2ee

Quantifiability: Concurrent Correctness from First Principles [article]

Victor Cook, Christina Peterson, Zachary Painter, Damian Dechev
2019 arXiv   pre-print
worst case verification complexity of generating sequential histories motivate a new approach to concurrent correctness.  ...  The vector space model is suitable for a wide range of concurrent systems and their associated data structures.  ...  Consider a reader method such as a read operation for a vector or a contains operation for a set.  ... 
arXiv:1905.06421v3 fatcat:577jyhhhgbewxf437mjplb7mj4

Go! for multi-threaded deliberative agents

Keith L. Clark, Francis G. McCabe
2003 Proceedings of the second international joint conference on Autonomous agents and multiagent systems - AAMAS '03  
We believe such a multithreaded agent architecture represents a powerful and natural style of agent implementation, for which Go! is well suited.  ...  The dancer agents negotiate to enter into joint commitments to dance a particular dance (e.g. polka) they both desire. When the dance is announced, they dance together.  ...  Acknowledgments The first named author wishes to thank Fujitsu Labs of America for a research contract that supported the collaboration between the authors on the design of Go!  ... 
doi:10.1145/860575.860747 dblp:conf/atal/ClarkM03 fatcat:xbxwqnq2j5csbce7zrhlqmv6uu

Go! for Multi-threaded Deliberative Agents [chapter]

Keith L. Clark, Frank G. McCabe
2004 Lecture Notes in Computer Science  
We believe such a multithreaded agent architecture represents a powerful and natural style of agent implementation, for which Go! is well suited.  ...  The dancer agents negotiate to enter into joint commitments to dance a particular dance (e.g. polka) they both desire. When the dance is announced, they dance together.  ...  Acknowledgments The first named author wishes to thank Fujitsu Labs of America for a research contract that supported the collaboration between the authors on the design of Go!  ... 
doi:10.1007/978-3-540-25932-9_4 fatcat:de45pio6yrguxh4qxxip5bnrnm

Go! for multi-threaded deliberative agents

Keith L. Clark, Francis G. McCabe
2003 Proceedings of the second international joint conference on Autonomous agents and multiagent systems - AAMAS '03  
We believe such a multithreaded agent architecture represents a powerful and natural style of agent implementation, for which Go! is well suited.  ...  The dancer agents negotiate to enter into joint commitments to dance a particular dance (e.g. polka) they both desire. When the dance is announced, they dance together.  ...  Acknowledgments The first named author wishes to thank Fujitsu Labs of America for a research contract that supported the collaboration between the authors on the design of Go!  ... 
doi:10.1145/860722.860747 fatcat:g7zsrspbvzhixowb3lksq65mwi

Designing a Crossbar Scheduler for HPC Applications

C. Minkenberg, F. Abel, P. Muller, R. Krishnamurthy, M. Gusat, P. Dill, I. Iliadis, R. Luijten, B.R. Hemenway, R. Grzybowski, E. Schiattarella
2006 IEEE Micro  
Here, we provide a brief overview of this scheme.  ...  The board contains 13,000 wires, of which 4,000 are differential pairs, for a total trace length of 2.6 km.  ... 
doi:10.1109/mm.2006.51 fatcat:fqbn5kow45gvhd4ketbh4rxb3i

D7.2.1 A Report on the Survey of HPC Tools and Techniques

Michael Lysaght, Bjorn Lindi, Vit Vondrak, John Donners, Marc Tajchman
2013 Zenodo  
This deliverable contains a comprehensive survey of the research activity undertaken within PRACE to date so as to better understand what HPC tools and techniques have been developed that could be successfully  ...  he objective of PRACE-3IP Work Package 7 (WP7) 'Application Enabling and Support' is to provide applications enabling support for HPC applications codes which are important for European researchers to  ...  many beneficial distributed graph handling tools such as dual graphs constructing routines.  ... 
doi:10.5281/zenodo.6575492 fatcat:grwigpxd7naifbzo6w67w4glrm

Transactional Memory, 2nd edition

Tim Harris, James Larus, Ravi Rajwar
2010 Synthesis Lectures on Computer Architecture  
In a dual data structure, blocking operations are expressed by adding explicit reservations to the structure, and arranging for updates that satisfy a reservation to wake the reserver-e.g., a dual stack  ...  Suppose that a list contains the elements 1..10 and a thread searches for 4 and then searches for 8. Early release during the search for 8 would remove the read-set entries for 4.  ...  Authors' Biographies TIM HARRIS Tim Harris is a Senior Researcher at MSR Cambridge where he works on abstractions for using multi-core computers.  ... 
doi:10.2200/s00272ed1v01y201006cac011 fatcat:25d3gvp5zrfqlgpzdzknqouofi

Process Integration [chapter]

Lachlan Aldred
2009 Modern Business Process Automation  
ESBs, however, generally forced modellers to choose a particular underlying middleware and to stick to it, despite their ability to connect with many forms of middleware.  ...  Technologies and languages for process integration generally lack formality. This has led to arbitrariness in the underlying language building blocks.  ...  could easily generate such queries for conversation from a "conversation" construct.  ... 
doi:10.1007/978-3-642-03121-2_19 fatcat:4m7pco7va5awtpoia2fb7b3qau

High-Level Language Tools for Reconfigurable Computing

Skyler Windh, Xiaoyin Ma, Robert J. Halstead, Prerna Budhkar, Zabdiel Luna, Omar Hussaini, Walid A. Najjar
2015 Proceedings of the IEEE  
For half a century, layers of abstractions have been developed that simplify the software development process: languages, compilers, dynamically linked libraries, operating systems, APIs, etc.  ...  provide, and a qualitative analysis of their hardware implementations of high level code.  ...  For BRAMs, Xilinx Virtex-7 uses FIFO36E1 blocks, which are true dual-port 36 Kb BRAMs.  ... 
doi:10.1109/jproc.2015.2399275 fatcat:oqofolqr4zh7llxpriw6jmseqq

Engineering with Logic

Steve Bishop, Matthew Fairbairn, Hannes Mehnert, Michael Norrish, Tom Ridge, Peter Sewell, Michael Smith, Keith Wansbrough
2018 Journal of the ACM  
But prose specifications cannot be used in test-and-debug development in any automated way, and prose is a poor medium for expressing complex (and loose) specifications.  ...  The TCP/IP protocols and Sockets API are a good example of this: they play a vital role in modern communication and computation, and interoperability between implementations is essential.  ...  Brooks, for making compute resource available, and Adam Biltcliffe for his work on testing infrastructure.  ... 
doi:10.1145/3243650 fatcat:757h4fuegvclbm4qjpxuckaofe

Antibody Engineering and Therapeutics

Juan Carlos Almagro, Gary L Gilliland, Felix Breden, Jamie K Scott, Devin Sok, Matthias Pauthner, Janice M Reichert, Gustavo Helguera, Raiees Andrabi, Robert Mabry, Mathieu Bléry, James E Voss (+12 others)
2014 mAbs  
These studies enabled clear parameter generation for human Ab genetic lineage classification. Dr.  ...  ) conducted two years ago. 1 For AMA-II, modelers tackled eleven antibody Fv regions mabs Volume 6 issue 3 Thomas Kepler (Boston University) delivered a talk entitled, "Statistical Methods for Immunoglobulin  ...  There is a strong demand for the generation of stable constructs that recapitulate the structure and function of transmembrane receptors for drug discovery.  ... 
doi:10.4161/mabs.28421 pmid:24589717 pmcid:PMC4011904 fatcat:ga63frfoina7jh2ekkzoo4xunm
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