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Billion transistor chips in mainstream enterprise platforms of the future

D. Bhandarkar
The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings.  
This indicates that a Billion transistor chip is possible in the 65 nm technology within the next 3 to 4 years. Such chips can be used in mainstream enterprise server platforms.  ...  Future microprocessors will offer higher levels of multiprocessor capability on chip as the transistor density increases.  ...  This talk will cover anticipated advances in semiconductor technology and relate those to trends in microprocessor design that will drive higher levels of parallelism in mainstream server platforms.  ... 
doi:10.1109/hpca.2003.1183519 dblp:conf/hpca/Bhandarkar03 fatcat:3s2n3efpa5bc7nqysk733df72q

Current Status of the Integrated Circuit Industry in China ― EDA Industry Review

Litho World
2019 Journal of Microelectronic Manufacturing  
Introduction Hangzhou Xingxin is a high-tech start-up enterprise specializing in the design software and IP development of integrated circuit chips.  ...  test chip design platform -TCMagic® Provides a complete solution for the design of scribe-line, short-flow and MPW test chips.  ... 
doi:10.33079/jomm.19020305 fatcat:whomlgrm4jejnp4pyegw7p3dhu

The Complete Makeover of Cloud Computing in the Next Decade, Will You Survive?: A Prophetic Approach

Duncan WAGA, Kefa RABAH
2013 World Journal of Computer Application and Technology  
Despite the young age of Cloud Computing (CC), there is already tremendous pressure to metamorph its structure due to the dynamic nature of technology in the virtualization environment.  ...  Solution to the numerous technical and otherwise challenges affecting CC currently will compel a total overhaul of the CC architecture.  ...  Advances in the areas of chip design and architecture have allowed semiconductor industries to reduce the size, density and cost of production of transistors.  ... 
doi:10.13189/wjcat.2013.010305 fatcat:vhwyrvfie5fchoaffek35fuxw4

Second Generation Quad-Core Intel Xeon Processors Bring 45 nm Technology and a New Level of Performance to HPC Applications [chapter]

Paweł Gepner, David L. Fraser, Michał F. Kowalik
2008 Lecture Notes in Computer Science  
We measure both CPU generations operating in dual socket platforms in typical HPC benchmark scenario using some common HPC benchmarks.  ...  The second generation of Quad-Core Intel R Xeon R processors was launched on November 12th 2007.  ...  Reducing the transistor size, because smaller transistors can operate on lower voltages, allows the chip to produce less heat this does not however solve the all of the issues and in fact generates another  ... 
doi:10.1007/978-3-540-69384-0_47 fatcat:sdflnvoggraoxdshx6pkaoiz44

Photonic Integrated Circuits for Communication Systems

J. Chovan, F. Uherek
2018 Radioengineering  
This paper reviews several material platform of photonic integrated circuits and compares their performance.  ...  He was personally involved in establishing of the International Laser Centre (ILC) in Bratislava; he is actually the director of ILC.  ...  0005 from the Slovak Research and Development Agency of the Ministry of Education, Science, Research and Sport of the Slovak Republic.  ... 
doi:10.13164/re.2018.0357 fatcat:5hxge5o5wbdxxoqkkg3bj7h3he

Fully depleted SOI (FDSOI) technology

Kangguo Cheng, Ali Khakifirooz
2016 Science China Information Sciences  
In this paper, we provide an overview of FDSOI technology, including the benefits and challenges in FDSOI design, manufacturing, and ecosystem.  ...  Fully depleted SOI (FDSOI) has become a viable technology not only for continued CMOS scaling to 22 nm node and beyond but also for improving the performances of legacy technology when retrofitting to  ...  Conflict of interest The authors declare that they have no conflict of interest.  ... 
doi:10.1007/s11432-016-5561-5 fatcat:kk2waag2wrat5gc7ia22onpvsi

Robust System Design

Subhasish Mitra, Hyungmin Cho, Ted Hong, Young Moon Kim, Hsiao-Heng Kelin Lee, Larkhoon Leem, Yanjing Li, David Lin, Evelyn Mintarno, Diana Mui, Sung-Boem Park, Nishant Patil (+2 others)
2011 IPSJ Transactions on System LSI Design Methodology  
In contrast, today's mainstream systems typically assume that transistors and interconnects operate correctly over their useful lifetime.  ...  For coming generations of silicon technologies, several causes of hardware failures, largely benign in the past, are becoming significant at the system-level. 3.  ...  Consider the effect of a particle striking in the vicinity of a MOS transistor.  ... 
doi:10.2197/ipsjtsldm.4.2 fatcat:jwoqglwa4fds7gzyhjnixvs7bq

Robust System Design

Subhasish Mitra
2010 2010 23rd International Conference on VLSI Design  
In contrast, today's mainstream systems typically assume that transistors and interconnects operate correctly over their useful lifetime.  ...  For coming generations of silicon technologies, several causes of hardware failures, largely benign in the past, are becoming significant at the system-level. 3.  ...  Consider the effect of a particle striking in the vicinity of a MOS transistor.  ... 
doi:10.1109/vlsi.design.2010.77 dblp:conf/vlsid/Mitra10 fatcat:5vkftdsnejg5fbylfuhtf62wzu

Proof-of-PUF Enabled Blockchain: Concurrent Data and Device Security for Internet-of-Energy

Rameez Asif, Kinan Ghanem, James Irvine
2020 Sensors  
A detailed review on the technological aspects of Blockchain and Physical Unclonable Functions (PUFs) is presented in this article.  ...  future research challenges.  ...  ) and use-cases in the energy utilities.  ... 
doi:10.3390/s21010028 pmid:33374599 pmcid:PMC7793093 fatcat:h2b4djvqojdehjxrku4nkjl2dq

Overview of emerging nonvolatile memory technologies

Jagan Meena, Simon Sze, Umesh Chand, Tseung-Yuen Tseng
2014 Nanoscale Research Letters  
They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems.  ...  Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times.  ...  Acknowledgements First of all, the authors would like to thank and gratefully acknowledge all corresponding publishers for the kind permission to reproduce their figures and related description, used in  ... 
doi:10.1186/1556-276x-9-526 pmid:25278820 pmcid:PMC4182445 fatcat:dhetgjf6qfhidhb5nmya3vj6na

Digital Technology and Agriculture: Foresight for Rural Enterprises and Rural Lives in New Zealand

2017 Journal of Agriculture and Environmental Sciences  
agricultural enterprises and rural communities in the next 20 years.  ...  The sustainability and resilience of rural communities in New Zealand in the face of changing circumstances and conditions is gaining increasing media and academic attention with trends towards, and prediction  ...  Acknowledgements This paper was funded through Ag Research Ltd core funding via the Resilient Rural Communities programme and the Digital Agriculture programme.  ... 
doi:10.15640/jaes.v6n2a7 fatcat:xlfa3hgn5fbutjhasrio3fiptm

Eurolab-4-HPC Long-Term Vision on High-Performance Computing [article]

Theo Ungerer, Paul Carpenter
2018 arXiv   pre-print
Because of the long-term perspective and its speculative nature, the authors started with an assessment of future computing technologies that could influence HPC hardware and software.  ...  Radical changes in computing are foreseen for the next decade.  ...  The chip with about 5.4 billion transistors is fabricated in a 28 nm CMOS process (4.3 cm 2 die size, 240 µm × 390 µm per core).  ... 
arXiv:1807.04521v1 fatcat:5neetrgubjhnvcajcktpkohrzq

COREnect D3.3. Initial COREnect industry roadmap [article]

AUSTRALO
2021 Zenodo  
$125 billion chip market in 2019.  ...  RAN compute platform The compute platform likely is to comprise multiple System-on-Chips (SoC).  ...  Some of the current members of the COREnect expert groups, as described in Section 4, are listed below. Experts from within the consortium (non-exhaustive list):  ... 
doi:10.5281/zenodo.5075317 fatcat:ww7icphzfjcdjlxbsbo2qekghy

Convergence Platforms: Foundational Science and Technology Tools [chapter]

Mark Lundstrom, H.-S. Philip Wong
2013 Science Policy Reports  
Semiconductor nanoelectronics seems destined to play an even more important role in addressing the challenges of the 21 st century by serving as the foundation that enables continuing advances in the convergence  ...  Semiconductor microelectronics was one of the great technologies of the 20 th century.  ...  At that time, multi-billion-transistor chips will provide a power platform for applications that involve converging technologies.  ... 
doi:10.1007/978-3-319-02204-8_1 fatcat:t55qy6axezfaxnjmfbhurqfuda

Computational Power and the Social Impact of Artificial Intelligence [article]

Tim Hwang
2018 arXiv   pre-print
Characteristics such as the power consumption of chips also define where and how machine learning can be used in the real world.  ...  Specifically, it examines how changes in computing architectures, machine learning methodologies, and supply chains might influence the future of AI.  ...  power also continued to increase in the 2000s, rising from 37 million transistors per chip in 2000 to 2.3 billion transistors per chip by 2009. 9 This was augmented by the finding that a particular  ... 
arXiv:1803.08971v1 fatcat:pk2axnmpvnbzfbcdcxg7a7bqne
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