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BHive: A Benchmark Suite and Measurement Framework for Validating x86-64 Basic Block Performance Models

Yishen Chen, Ajay Brahmakshatriya, Charith Mendis, Alex Renda, Eric Atkinson, Ondrej Sykora, Saman Amarasinghe, Michael Carbin
2019 2019 IEEE International Symposium on Workload Characterization (IISWC)  
We used this profiler to build BHive, a benchmark for systematic validation of performance models of x86-64 basic blocks.  ...  We automatically cluster basic blocks in the benchmark suite based on their utilization of CPU resources.  ...  CONCLUSION We present a benchmark for validating performance models of x86-64 basic blocks.  ... 
doi:10.1109/iiswc47752.2019.9042166 dblp:conf/iiswc/ChenBMRASAC19 fatcat:xlyiy2vgefbdxiq3yh2vigfsoa

A Parametric Microarchitecture Model for Accurate Basic Block Throughput Prediction on Recent Intel CPUs [article]

Andreas Abel, Jan Reineke
2022 arXiv   pre-print
We evaluate our predictor on an improved version of the BHive benchmark suite and show that its predictions are usually within 1% of measurement results, improving upon prior models by roughly an order  ...  Performance models that statically predict the steady-state throughput of basic blocks on particular microarchitectures, such as IACA, Ithemal, llvm-mca, OSACA, or DiffTune, can guide optimizing compilers  ...  [12] proposed the BHive benchmark suite, which is designed specifically to evaluate basic block throughput predictors on x86 systems.  ... 
arXiv:2107.14210v2 fatcat:agnmtmwlr5fithzhyaofi56fce

nanoBench: A Low-Overhead Tool for Running Microbenchmarks on x86 Systems [article]

Andreas Abel, Jan Reineke
2020 arXiv   pre-print
We present nanoBench, a tool for evaluating small microbenchmarks using hardware performance counters on Intel and AMD x86 systems.  ...  This allows to benchmark privileged instructions, and it enables more accurate measurements.  ...  Chen et al. also propose a benchmark suite, called BHive, that consists of more than 300, 000 basic blocks, and they use their tool to obtain throughput measurements for these basic blocks on CPUs with  ... 
arXiv:1911.03282v2 fatcat:jcejyzjlwrhgpgfzwimr5sbeji

uiCA: Accurate Throughput Prediction of Basic Blocks on Recent Intel Microarchitectures [article]

Andreas Abel, Jan Reineke, Universität Des Saarlandes
2022
We evaluate our predictor on an improved version of the BHive benchmark suite and show that its predictions are usually within 1% of measurement results, improving upon prior models by roughly an order  ...  Performance models that statically predict the steady-state throughput of basic blocks on particular microarchitectures, such as IACA, Ithemal, llvm-mca, OSACA, or CQA, can guide optimizing compilers and  ...  ACKNOWLEDGMENTS This project has received funding from the European Research Council under the European Union's Horizon 2020 research and innovation programme (grant agreement No. 101020415).  ... 
doi:10.22028/d291-36639 fatcat:ooash6e7czdwdkuxxloigccuqa

Automatic Generation of Models of Microarchitectures [article]

Andreas Abel, Universität Des Saarlandes, Universität Des Saarlandes
2020
The goal of this thesis is to develop techniques for generating microarchitectural models automatically.  ...  Detailed microarchitectural models are necessary to predict, explain, or optimize the performance of software running on modern microprocessors.  ...  We disabled dynamic frequency scaling, and copied all executables and benchmark files to a RAM disk, to minimize timing variations due to hard drive accesses.  ... 
doi:10.22028/d291-31299 fatcat:n4nyaabvhjdczpn4gcfuzenpbi

Efficient utilization of vector extensions in microprocessors

Angela Pohl, Technische Universität Berlin, Ben Juurlink, Sabine Glesner
2020
Our first contribution is a different vector packing strategy for nested loops whose inner loops only perform few iterations.  ...  We offer an alternative implementation for architectures that do not support masked store instructions, and introduce a technique to remove predicates from masked load instructions.  ...  Acknowledgements First and foremost, I would like to thank Prof. Dr. Ben Juurlink for giving me the opportunity to join his group and pursue a PhD at TU Berlin.  ... 
doi:10.14279/depositonce-10820 fatcat:ne3k4nbr4zbl7ik255aui2qoi4