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Bounded LTL model checking with stable models

KEIJO HELJANKO, ILKKA NIEMELÄ
2003 Theory and Practice of Logic Programming  
It is shown how a 1-safe Petri net and a requirement on the behavior of the net can be translated into a logic program such that the bounded model checking problem for the net can be solved by computing  ...  As the model of asynchronous systems a generalization of communicating automata, 1-safe Petri nets, are used.  ...  Petri nets and bounded model checking We will now introduce P/T-nets. They are one of the simplest forms of Petri nets. We will use as a running example the P/T-net presented in Fig. 1 .  ... 
doi:10.1017/s1471068403001790 fatcat:urpk7dnaazc3lmicp4grjn73cq

Bounded LTL Model Checking with Stable Models [chapter]

Keijo Heljanko, Ilkka Niemelä
2001 Lecture Notes in Computer Science  
It is shown how a 1-safe Petri net and a requirement on the behavior of the net can be translated into a logic program such that the bounded model checking problem for the net can be solved by computing  ...  As the model of asynchronous systems a generalization of communicating automata, 1-safe Petri nets, are used.  ...  Petri nets and bounded model checking We will now introduce P/T-nets. They are one of the simplest forms of Petri nets. We will use as a running example the P/T-net presented in Fig. 1 .  ... 
doi:10.1007/3-540-45402-0_15 fatcat:kl3sbhtflfcx5koj5vcut6syhi

SAT-Based Verification of Safe Petri Nets [chapter]

Shougo Ogata, Tatsuhiro Tsuchiya, Tohru Kikuno
2004 Lecture Notes in Computer Science  
In this paper, we propose a new SAT-based verification method for safe Petri nets. This method can reduce verification time by representing the behavior by very succinct formulas.  ...  Bounded model checking has received recent attention as an efficient verification method.  ...  The authors wish to thank anonymous referees for their useful comments.  ... 
doi:10.1007/978-3-540-30476-0_11 fatcat:36smt2vt6fajnmc26rxiocxkgq

Verification of asynchronous circuits by BDD-based model checking of Petri nets [chapter]

Oriol Roig, Jordi Cortadella, Enric Pastor
1995 Lecture Notes in Computer Science  
Verification of asynchronous circuits by BDD-based model checking of  ...  This paper presents a methodology for the veri cation of speed-independent asynchronous circuits against a Petri net speci cation.  ...  Conclusions The paper has presented an approach t o v erify speed-independent circuits based on symbolic checking of Petri nets. Petri nets are e ciently represented by using boolean functions.  ... 
doi:10.1007/3-540-60029-9_50 fatcat:yfh2tnovrzhcviy3ubcpgbrtoy

Validation Of Automation Systems Using Temporal Logic Model Checking And Groebner Bases

Quoc-Nam Tran, Anjib Mulepati
2009 Zenodo  
In this paper, we show how computational methods such as temporal logic model checking and Groebner bases can be used to verify the correctness of the design of an automation system.  ...  Validation of an automation system is an important issue. The goal is to check if the system under investigation, modeled by a Petri net, never enters the undesired states.  ...  Formally, the reachability problem for a Petri net is given two markings, M 1 and M 2 of the same Petri net M, to answer if M 2 is reachable from M 1 .  ... 
doi:10.5281/zenodo.1058389 fatcat:h6yiphlflrb53i43sv5ju7fuxa

Bounded LTL Model Checking with Stable Models [article]

Keijo Heljanko, Ilkka Niemelä
2003 arXiv   pre-print
It is shown how a 1-safe Petri net and a requirement on the behaviour of the net can be translated into a logic program such that the bounded model checking problem for the net can be solved by computing  ...  As the model of asynchronous systems a generalisation of communicating automata, 1-safe Petri nets, are used.  ...  Thus properties of finite state systems composed of finite state machine components can be verified using model checkers for 1-safe Petri nets.  ... 
arXiv:cs/0305040v1 fatcat:7bk7sj4mxjbfxao5pvsqbh3kbu

Symbolic model checking of Dual Transition Petri Nets

Mauricio Varea, Bashir M. Al-Hashimi, Luis A. Cortés, Petru Eles, Zebo Peng
2002 Proceedings of the tenth international symposium on Hardware/software codesign - CODES '02  
This paper describes the formal verification of the recently introduced Dual Transition Petri Net (DTPN) models [12], using model checking techniques.  ...  The methodology presented addresses the symbolic model checking of embedded systems behavioural properties, expressed in either computation tree logics (CTL) or linear temporal logics (LTL).  ...  ACKNOWLEDGMENTS The authors wish to thank Gethin Norman (University of Birmingham, UK), for many fruitful discussions related to this investigation.  ... 
doi:10.1145/774796.774799 fatcat:hshw62gwzbgsdar7t6nf6nhcem

Symbolic model checking of Dual Transition Petri Nets

Mauricio Varea, Bashir M. Al-Hashimi, Luis A. Cortés, Petru Eles, Zebo Peng
2002 Proceedings of the tenth international symposium on Hardware/software codesign - CODES '02  
This paper describes the formal verification of the recently introduced Dual Transition Petri Net (DTPN) models [12], using model checking techniques.  ...  The methodology presented addresses the symbolic model checking of embedded systems behavioural properties, expressed in either computation tree logics (CTL) or linear temporal logics (LTL).  ...  ACKNOWLEDGMENTS The authors wish to thank Gethin Norman (University of Birmingham, UK), for many fruitful discussions related to this investigation.  ... 
doi:10.1145/774789.774799 dblp:conf/codes/VareaACEP02 fatcat:xomvgqw7zzcufawsrpsxzlla2i

Efficient Model Checking of Safety Properties [chapter]

Timo Latvala
2003 Lecture Notes in Computer Science  
Our first contribution is a theorem relating abstraction for Coloured Petri nets as defined by Lakos [36] and preservation of safety properties.  ...  Safety properties are an interesting subset of general temporal properties for systems.  ...  The financial support of Helsinki Graduate School in Computer Science and Engineering, the Academy of Finland (project 47754), the Wihuri Foundation and Tekniikan Edistämissäätiö (Foundation for Technology  ... 
doi:10.1007/3-540-44829-2_5 fatcat:zlkczcjjdfeijoekb66ohrtpe4

Specification and Model Checking of Temporal Properties in Time Petri Nets and Timed Automata [chapter]

Wojciech Penczek, Agata Półrola
2004 Lecture Notes in Computer Science  
Next, SAT-based verification techniques, like bounded and unbounded model checking, are discussed. The main focus is on bounded model checking for TCTL and for reachability properties.  ...  The paper surveys some of the most recent approaches to verification of properties, expressible in some timed and untimed temporal logics (LTL, CTL, TCTL), for real-time systems represented by time Petri  ...  no longer than the upper bound of the corresponding interval. (1-safe) time Petri nets can be seen as a subclass of these nets.  ... 
doi:10.1007/978-3-540-27793-4_4 fatcat:eg4rwr4oujhzfkhqd4mleowrhm

Presentation of the 9th Edition of the Model Checking Contest [chapter]

Elvio Amparore, Bernard Berthomieu, Gianfranco Ciardo, Silvano Dal Zilio, Francesco Gallà, Lom Messan Hillah, Francis Hulin-Hubard, Peter Gjøl Jensen, Loïg Jezequel, Fabrice Kordon, Didier Le Botlan, Torsten Liebke (+7 others)
2019 Msphere  
The Model Checking Contest (MCC) is an annual competition of software tools for model checking.  ...  bounds in the model, evaluation of reachability formulas, evaluation of CTL formulas, and evaluation of LTL formulas.  ...  At the moment, we provide access to a BDD library for safe nets as well as to the pnmc tool [23] . Main Strength of TINA.tedd.  ... 
doi:10.1007/978-3-030-17502-3_4 fatcat:i63wf7m4fzggxpl54xxwpv3jei

Introducing the modeling and verification process in SysML

Marcos V Linhares, Romulo S. de Oliveira, Jean-Marie Farines, Francois Vernadat
2007 2007 IEEE Conference on Emerging Technologies & Factory Automation (EFTA 2007)  
Petri nets and temporal logic LTL are used respectively to formalize the system behavior and requirements. The benefit of such formalization is to allow an automatic formal verification.  ...  In order to demonstrate this methodology, it will be used a factory automation system, modeled by SysML and Petri nets, and verified by the TINA toolbox.  ...  Model checking Time Petri nets first requires to produce finite abstractions for their state spaces.  ... 
doi:10.1109/efta.2007.4416788 dblp:conf/etfa/LinharesOFV07 fatcat:7alhz6y6h5fi3p7nkeabsk665q

Ten Years of Saturation: A Petri Net Perspective [chapter]

Gianfranco Ciardo, Yang Zhao, Xiaoqing Jin
2012 Lecture Notes in Computer Science  
Due to their appealing conceptual simplicity and availability of computer tools for their analysis, Petri nets are widely used to model discrete-event systems in many areas of engineering.  ...  answer important Petri net questions, from reachability to CTL model checking and counterexample generation, from p-semiflow computation to the solution of timed or Markovian nets.  ...  CTL model checking of Petri nets The generation of the reachability set for a Petri net is usually just a first step.  ... 
doi:10.1007/978-3-642-29072-5_3 fatcat:yp5cioldwrhi3hmy6iieoeujea

A Case Study in Design and Verification of Manufacturing System Control Software with Hierarchical Petri Nets

M. Heiner, P. Deussen, J. Spranger
1999 The International Journal of Advanced Manufacturing Technology  
The application of Petri nets is one of the well-known approaches for developing provably error-free control software for manufacturing systems.  ...  Petri nets, supporting reuse as well as stepwise validation.  ...  Starke, Bernd Grahlmann, Kimmo Varpaaniemi, and especially Guido Wimmel for their assistance in using their tools.  ... 
doi:10.1007/s001700050051 fatcat:a44vof3djng7la3t67fm7idmcy

Exploiting interleaving semantics in symbolic state-space generation

Gianfranco Ciardo, Gerald Lüttgen, Andrew S. Miner
2007 Formal methods in system design  
Symbolic techniques based on Binary Decision Diagrams (BDDs) are widely employed for reasoning about temporal properties of hardware circuits and synchronous controllers.  ...  component-based system models.  ...  We are also grateful to the anonymous referees for their constructive comments, and especially for suggesting further experimental research whose results are now included in Sec. 6.  ... 
doi:10.1007/s10703-006-0033-y fatcat:57jp2co2ljbmhfd5szwujhtzi4
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