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Automating the Verification of Floating-Point Algorithms
2014
International Workshop on Satisfiability Modulo Theories
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These methods will be exemplified using Gappa, a tool dedicated to proving the logical formulas that arise during the verification of small yet complicated floating-point algorithms. ...
This talk will show some issues specific to the verification of the floating-point functions of a mathematical library, and some methods for solving them automatically. ...
dblp:conf/smt/Melquiond14
fatcat:qcf2egjfffg4zb77c4ji5eqnnq
A Formal Model and Efficient Traversal Algorithm for Generating Testbenches for Verification of IEEE Standard Floating Point Division
2006
Proceedings of the Design Automation & Test in Europe Conference
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for verifying any division algorithm design and implementation. ...
We introduce an efficient method of generating these testbenches. We also describe applications of these testbenches at the design simulation stage and the product evaluation stage. iii. ...
Acknowledgments We thank Jason Moore for his assistance in the development of this paper. This work was supported in part by the Semiconductor Research Corporation under contract RID 1289. ...
doi:10.1109/date.2006.243998
dblp:conf/date/MatulaM06
fatcat:mtiqyndtg5fj7coq25nbngr6xi
Floating-Point Verification
[chapter]
2005
Lecture Notes in Computer Science
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Floating-point algorithms have proven themselves difficult to get right. ...
The role of theorem proving In many other areas of verification, significant success has been achieved using highly automated techniques, usually based on a Boolean model of the state of the system. ...
doi:10.1007/11526841_35
fatcat:lg5ossoiijbblf2ojgwlkqm3p4
Floating Point Verification
[chapter]
1998
Theorem Proving with the Real Numbers
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Floating-point algorithms have proven themselves difficult to get right. ...
The role of theorem proving In many other areas of verification, significant success has been achieved using highly automated techniques, usually based on a Boolean model of the state of the system. ...
doi:10.1007/978-1-4471-1591-5_7
fatcat:6owbmyxx6zevjju47bqj72pl3i
Machine Learning for Automated Synthesis of Complex Software
2012
Journal of Information Technology & Software Engineering
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Another challenging problem is the ability to port IEEE floating-point compliant numerical software from traditional x86 architecture to modern SoC platforms, GPGPU hardware, or fixed-point ECUs. ...
On the other hand, formal verification methods can algorithmically decide if a candidate program satisfies the specifications that constraint the set of behaviors expected from the program. ...
doi:10.4172/2165-7866.1000e113
fatcat:rk3mlaizmngtniljo2f2nsnltq
Matlab extensions for the development, testing and verification of real-time DSP software
2005
Proceedings. 42nd Design Automation Conference, 2005.
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The purpose of this paper is to present the required tools for the development, testing and verification of DSP software in Matlab. ...
Programming guidelines and optimization results are also provided to demonstrate the effectiveness of the intrinsics software development approach. ...
From a verification perspective, the fixed-point implementation of each algorithm must be compared to its floating-point equivalent. ...
doi:10.1109/dac.2005.193881
fatcat:xgtx2ux46rel5loxajihagtvdi
Matlab extensions for the development, testing and verification of real-time DSP software
2005
Proceedings of the 42nd annual conference on Design automation - DAC '05
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The purpose of this paper is to present the required tools for the development, testing and verification of DSP software in Matlab. ...
Programming guidelines and optimization results are also provided to demonstrate the effectiveness of the intrinsics software development approach. ...
From a verification perspective, the fixed-point implementation of each algorithm must be compared to its floating-point equivalent. ...
doi:10.1145/1065579.1065736
dblp:conf/dac/Magee05
fatcat:mshnxyje7ncytlnqtkdb3b7un4
Formal verification of iterative algorithms in microprocessors
2000
Proceedings of the 37th conference on Design automation - DAC '00
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For example, the front-end of a microprocessor repeatedly fetches and decodes instructions while updating internal state such as the program counter; floating-point circuits perform divide and square root ...
In this paper we discuss the verification of four iterative circuits from Intel microprocessor designs. ...
Acknowledgments We thank John Harrison for mechanizing the hand proof of FDIV and FSQRT and Bob Brennan for providing the opportunity to carry out these case studies. ...
doi:10.1145/337292.337388
dblp:conf/dac/AagaardJKKS00
fatcat:jxpl4lydundhxi2lubjixorr5q
Model-Based Design of Fixed-Point Filters for Embedded Systems
2009
SAE International Journal of Passenger Cars - Electronic and Electrical Systems
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In this workflow, the algorithm specification begins in floating point. Simulation test benches are then created to explore and verify the behavior. ...
The test benches are reused to verify correct behavior is maintained throughout the elaboration of the algorithm specification to fixed point. ...
At each design stage, from floating point through fixed point, we reuse a verification test to rigorously assess behavior of the candidate algorithm against requirements. ...
doi:10.4271/2009-01-0150
fatcat:wjiafdfvknh5hflf3tssoz727e
Formal verification using parametric representations of Boolean constraints
1999
Proceedings of the 36th ACM/IEEE conference on Design automation conference - DAC '99
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We describe the use of parametric representations of Boolean predicates to encode data-space constraints and significantly extend the capacity of formal verification. ...
The constraints are used to decompose verifications by sets of case splits and to restrict verifications by validity conditions. Our technique is applicable to any symbolic simulator. ...
procedures to justify the floating-point case splits, and Mike Jones for his comments on a draft of the paper. ...
doi:10.1145/309847.309968
dblp:conf/dac/AagaardJS99
fatcat:szvd5ykjgzd3nn4gp4xejvhlbu
Verification of all circuits in a floating-point unit using word-level model checking
[chapter]
1996
Lecture Notes in Computer Science
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This paper presents the formal verification of all sub-circuits in a floating-point arithmetic unit (FPU) from an Intel microprocessor using a wordlevel model checker. ...
We will illustrate our verification techniques using the Weitek WTL3170/3171 Sparc floating point coprocessor as an example. ...
Division In this section, we discuss the verification of floating-point division. Weitek WTL3170/3171 uses a radix-4 SRT division algorithm. ...
doi:10.1007/bfb0031797
fatcat:jyyviziqhbh7hmdgzs2cw2mp3m
Verifying a Synthesized Implementation of IEEE-754 Floating-Point Exponential Function using HOL
2009
Computer journal
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Deep datapath and algorithm complexity have made the verification of floating-point units a very hard task. ...
In this paper, we have hierarchically formalized and verified a hardware implementation of the IEEE-754 table-driven floating-point exponential function algorithm using the HOL theorem prover. ...
Verification of RTL to Algorithmic Level In this section we describe the algorithmic level to RTL verification of the floating-point exponential function. ...
doi:10.1093/comjnl/bxp023
fatcat:wvf6ehqqefaqtj6yhois52grmy
Building Better Bit-Blasting for Floating-Point Problems
[chapter]
2019
Lecture Notes in Computer Science
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Implementing the required encodings is complex, error prone and requires a deep understanding of floating-point hardware. ...
As well as a significantly improved performance and correctness, it is hoped this will give a simple route to add support for the theory of floating-point. ...
Automated reasoning systems for floating-point numbers need an efficient way of controlling the number of side conditions and edge cases. ...
doi:10.1007/978-3-030-17462-0_5
fatcat:j3xvahui2fgltobml66nwuttaa
Algebraic Techniques in Software Verification : Challenges and Opportunities
2016
Symposium on Symbolic and Numeric Algorithms for Scientific Computing
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The requirements of software verification are somewhat different to other applications of automated reasoning, posing a number of challenges but also providing some interesting opportunities. ...
One of the main application areas and driving forces behind the development of Satisfiability Modulo Theory (SMT) solvers is software verification. ...
Fixed-Points and Approximation Current algorithms and verification systems are often built "on top of" SMT solvers. ...
dblp:conf/synasc/BrainKM16
fatcat:w4o6jetf2nacpesqvmjuywf7xe
Satisfaction Meets Practice and Confidence
2016
Symposium on Symbolic and Numeric Algorithms for Scientific Computing
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IEEE-754-based floating-point models and 2) enhancing confidence of software verification tools by means of generating certificates for their computed analysis results. ...
In this position paper, we raise two challenges in the domain of software verification: 1) enhancing the field of application of software verification tools in practice by means of efficient support of ...
ACKNOWLEDGMENT This work was supported by the H2020-FETOPEN-2016-2017-CSA project SC² (712689). ...
dblp:conf/synasc/BienmullerT16
fatcat:gcvp6xvkavhcfdbsqu5okcn2de
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