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Automatic data partitioning for the agere payload plus network processor

Steve Carr, Philip Sweany
2004 Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems - CASES '04  
In this paper, we describe a code generation technique designed for the Agere Payload Plus network processor.  ...  This processor utilizes a multi-block pipeline containing a Fast Pattern Processor (FPP) for classification, a Routing Switch Processor (RSP) for traffic management and a third block, the Agere Systems  ...  CONCLUSIONS In this paper, we have presented an algorithm called TPPS to automatically partition data for code run on the compute engines of the Routing Switch Processor for the Agere Payload Plus network  ... 
doi:10.1145/1023833.1023867 dblp:conf/cases/CarrS04 fatcat:cg667uzyjnftxhdktq2mykhpym

Exploring Trade-Offs in Performance and Programmability of Processing Element Topologies for Network Processors [chapter]

Matthias Gries, Chidamber Kulkarni, Christian Sauer, Kurt Keutzer
2004 Network Processor Design  
One of the main differences among network processors is the inter-connection topology between processing elements.  ...  Design space exploration using Y-Chart. anced for our application scenario since, for instance, in the pure pipeline case, up to 18 packets per flow could be in the network processor concurrently (as opposed  ...  Acknowledgment This work was supported, in part, by the Microelectronics Advanced Research Consortium (MARCO) and Infineon Technologies, and is part of the efforts of the Gigascale Silicon Research Center  ... 
doi:10.1016/b978-012198157-0/50009-x fatcat:7dkmymrfbfgdhoahewbylztmhq

Programming challenges in network processor deployment

Chidamber Kulkarni, Matthias Gries, Christian Sauer, Kurt Keutzer
2003 Proceedings of the international conference on Compilers, architectures and synthesis for embedded systems - CASES '03  
Programming multi-processor ASIPs, such as network processors, remains an art due to the wide variety of architectures and due to little support for exploring different implementation alternatives.  ...  The main observation of our study is that there is a critical lack of tools and methods that support an integrated approach to partitioning, scheduling and arbitration, and data transfer management for  ...  This work was supported, in part, by the Microelectronics Advanced Research Consortium (MARCO) and Infineon Technologies, and is part of the efforts of the Gigascale Silicon Research Center (GSRC).  ... 
doi:10.1145/951732.951735 fatcat:a4avdoclkjdmtcdjut2kwt3uru

Programming challenges in network processor deployment

Chidamber Kulkarni, Matthias Gries, Christian Sauer, Kurt Keutzer
2003 Proceedings of the international conference on Compilers, architectures and synthesis for embedded systems - CASES '03  
Programming multi-processor ASIPs, such as network processors, remains an art due to the wide variety of architectures and due to little support for exploring different implementation alternatives.  ...  The main observation of our study is that there is a critical lack of tools and methods that support an integrated approach to partitioning, scheduling and arbitration, and data transfer management for  ...  This work was supported, in part, by the Microelectronics Advanced Research Consortium (MARCO) and Infineon Technologies, and is part of the efforts of the Gigascale Silicon Research Center (GSRC).  ... 
doi:10.1145/951710.951735 dblp:conf/cases/KulkarniGSK03 fatcat:6tvautuiifgxzn6ubxszec5sja

Overview of the NBBS architecture

G. A. Marin, C. P. Immanuel, P. F. Chimento, I. S. Gopal
1995 IBM Systems Journal  
When a fail- ure causes a network to partition, a single CP span- ning tree will automatically split into two separate ones.  ...  man- ager rejects the new connection.  ... 
doi:10.1147/sj.344.0564 fatcat:3j6mreipr5c2hdurmdsdlnql5q

Off-chip communication architectures for high throughput network processors

Jacob Engel, Taskin Kocak
2009 Computer Communications  
By using our network simulator, we reveal the best processor-memory configuration, out of multiple configurations, that achieves optimal performance.  ...  As line-rate data and NPU processing power increase, memory access time becomes the main system bottleneck during data store/retrieve operations.  ...  For off-chip networks out-of-order data delivery is typical.  ... 
doi:10.1016/j.comcom.2008.12.043 fatcat:n44wcdfjgjhzji5tzqgx2abo3q

Opportunities and challenges of joint edge and Fog orchestration

Luca Cominardi, Osamah Ibrahiem Abdullaziz, Kiril Antevski, Shahzoob Bilal Chundrigar, Robert Gdowski, Ping-Heng Kuo, Alain Mourad, Li-Hsing Yen, Aitor Zabala
2018 2018 IEEE Wireless Communications and Networking Conference Workshops (WCNCW)  
It started in Madrid, Spain, as a PhD student at the IMDEA Networks Institute.  ...  During this whole time, regardless of the country where I was living and the company for which I was working, I have been involved in several international projects that materialised in a fruitful collaboration  ...  ITU G.709 [ITU16a] 20 , also known as OTN, and G.989/NG-PON2 [ITU15b] are optical transport network standards that define a common framing for transporting data payloads widely adopted in Wavelength  ... 
doi:10.1109/wcncw.2018.8369006 dblp:conf/wcnc/Comma-diAACGKMY18 fatcat:gknxhtmnkvh2djboynbwmvrh24

Network Organization and Governance [chapter]

2018 CRC Handbook of Modern Telecommunications  
Modification would probably be manual if the data collection method were manual and automatic if the data collection method were automatic.  ...  Again, when the length of MAC layer data field is less than 46 bytes, a PAD field is added to ensure a minimum data plus PAD field length of 46 bytes.  ...  For example, very few enterprises have a need to manage their own SDH network.  ... 
doi:10.1201/9781420078084-9 fatcat:eyixyd27nzbmthwoqybadgqz2e

On the Impact of the Cellular Modem on the Security of Mobile Phones

Collin Mulliner, Technische Universität Berlin, Technische Universität Berlin, Jean-Pierre Seifert
2012
For this, we develop a cellular botnet where the bots utilize the modem for stealthy communication.  ...  In our analysis step, we abused the cellular modem for vulnerability analysis.We discovered s [...]  ...  The tests were carried out on the networks of Vodafone, T-Mobile, O2 (Telefonica), and E-Plus. The initial delivery attempt is at minute 0.  ... 
doi:10.14279/depositonce-3126 fatcat:k6jq3pnjcnb4tpixxnfoeq45ru

IPStash: a power-efficient memory architecture for IP-lookup

S. Kaxiras, G. Keramidas
22nd Digital Avionics Systems Conference. Proceedings (Cat. No.03CH37449)  
The premise of our work is that full associativity is not necessary for IP-lookup. Rather, we show that the required associativity is simply a function of the routing table size.  ...  Specifically, IPStash devices -built in the same technology as TCAMs-can run at speeds in excess of 600 MHz, offer more than twice the search throughput (>200Msps), and consume up to 35% less power (for  ...  We Tables used technology integration of 0.15µ and we consider 6 bits of output port information as the data payload.  ... 
doi:10.1109/micro.2003.1253210 dblp:conf/micro/KaxirasK03 fatcat:uf4vtf3ujvhzxcgqghm3jinkse

Seventh Workshop and Tutorial on Practical Use of Coloured Petri Nets and the CPN Tools, Aarhus, Denmark, October 24-26, 2006

Kurt Jensen
2006 DAIMI Report Series  
The workshop is organised by the CPN group at the Department of Computer Science, University of Aarhus, Denmark.  ...  This booklet contains the proceedings of the Seventh Workshop on Practical Use of Coloured Petri Nets and the CPN Tools, October 24-26, 2006.  ...  Acknowledgements We thank Søren Lauesen for permission to use the task descriptions for the Fyn County EPR as basis for this paper.  ... 
doi:10.7146/dpb.v35i579.7322 fatcat:a7bsrdbwkfhvhmd2regosteude

GPU accelerated onboard data processing for downlink optimisation

Rebecca Davidson
2019
This data bottleneck must be alleviated in order for EO satellites to efficiently deliver the quality and quantity of payload data now expected by its reliant applications.  ...  The dimensionality and volume of raw payload data generated onboard Earth Observation (EO) satellites has increased beyond the capabilities of satellite downlink technologies, as a result a bottleneck  ...  In order to downlink the order of several TB of data captured each day, Planet have employed a network of 8 ground stations.  ... 
doi:10.15126/thesis.00852470 fatcat:napelwugefei7pmh3txxtg4rr4

Understanding benefits of different vantage points in today's Internet

Jan Böttger, Technische Universität Berlin, Technische Universität Berlin, Anja Feldmann
2017
Instead, combining our active and passive measurements helps us to improve the understanding of the data in the domain of Internet network operation.  ...  We describe our methodology of passively measuring large amounts of network traffic data at different vantage points, and discuss the challenges, solutions, and best practices that we experienced in the  ...  Self-organization implicates that the network itself is used for its own configuration by in-band signaling of control data inside payload data.  ... 
doi:10.14279/depositonce-5716 fatcat:mzasbpomnvflvcqyyxgl55rt7y

Mobility Data Mining and Privacy (Dagstuhl Seminar 12331) Verifying Reliability (Dagstuhl Seminar 12341) Engineering Multiagent Systems (Dagstuhl Seminar 122342)

Goetz Graefe, Wey Guy, Harumi Kuno, Glenn, Christopher Clifton, Bart Kuijpers, Katharina Morik, Yucel Saygin, Görschwin Fey, Masahiro Fujita, Natasa Miskov-Zivanov, Kaushik Roy (+5 others)
2012 unpublished
Acknowledgements We would like to thank all participants of the Dagstuhl Seminar on Mobility Data Mining and Privacy for stimulating discussions, valuable input, and feedback.  ...  We further extend our gratitude to the seminar organizers and the Dagstuhl staff for bringing us all together and making this seminar a very pleasant experience.  ...  Massimo Violante SRAM-based FPGAs are more and more attractive for applications like avionic subsystems and satellite payloads.  ... 
fatcat:na7mzpsxxfeqlberxsi5mgse4a

Design and Implementation of a Scalable Hardware Platform for High Speed Optical Tracking

Yuning Yang
2012
One of the greatest challenges in a multi-camera based optical tracking system is the huge amounts of image data that must be processed in real-time.  ...  In this thesis, the study on FPGA based high-speed image processing is performed. The FPGA implementation for a number of image processing operators is described.  ...  the entire payload data for calculating the length and checksum, and thus significantly reduces the transmission latency.  ... 
doi:10.11588/heidok.00013901 fatcat:k2mh4c66k5cubkflxb2i5hcjt4
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