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JackHammer: Efficient Rowhammer on Heterogeneous FPGA-CPU Platforms [article]

Zane Weissman, Thore Tiemann, Daniel Moghimi, Evan Custodio, Thomas Eisenbarth, Berk Sunar
<span title="2020-04-04">2020</span> <i > arXiv </i> &nbsp; <span class="release-stage" >pre-print</span>
In this work, we analyze the memory and cache subsystem and study Rowhammer and cache attacks enabled on two proposed heterogeneous FPGA-CPU platforms by Intel: the Arria 10 GX with an integrated FPGA-CPU  ...  These heterogeneous FPGA-CPU architectures break common assumptions about isolation and security boundaries.  ...  CACHE ATTACKS ON INTEL FPGA-CPU PLATFORMS In Section III-C1, we reverse-engineered the behavior of the memory subsystem on current Arria 10 based FPGA-CPU platforms.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1912.11523v3">arXiv:1912.11523v3</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/s4mm6dydlzfkvh4r3zuq4uyvca">fatcat:s4mm6dydlzfkvh4r3zuq4uyvca</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200824144906/https://arxiv.org/pdf/1912.11523v3.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/f3/cf/f3cfb48e3a5b50b10c1829fcad9c210e6291907d.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1912.11523v3" title="arxiv.org access"> <button class="ui compact blue labeled icon button serp-button"> <i class="file alternate outline icon"></i> arxiv.org </button> </a>

JackHammer: Efficient Rowhammer on Heterogeneous FPGA-CPU Platforms

Zane Weissman, Thore Tiemann, Daniel Moghimi, Evan Custodio, Thomas Eisenbarth, Berk Sunar
<span title="2020-06-19">2020</span> <i title="IACR Transactions on Cryptographic Hardware and Embedded Systems"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/yz7ssmvstjhsxiwixprnmyijnq" style="color: black;">Transactions on Cryptographic Hardware and Embedded Systems</a> </i> &nbsp;
In this work, we analyze the memory and cache subsystem and study Rowhammer and cache attacks enabled by two proposed heterogeneous FPGA-CPU platforms from Intel: the Arria 10 GX with an integrated FPGA-CPU  ...  Our results indicate that a malicious FPGA can perform twice as fast as a typical Rowhammer from the CPU on the same system and causes around four times as many bit flips as the CPU attack.  ...  Cache Attacks on Intel FPGA-CPU Platforms In Section 3.3.1, we reverse-engineered the behavior of the memory subsystem on current Arria 10 based FPGA-CPU platforms.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.13154/tches.v2020.i3.169-195">doi:10.13154/tches.v2020.i3.169-195</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/journals/tches/WeissmanTMCES20.html">dblp:journals/tches/WeissmanTMCES20</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/scv3i3zbwfgcrd34dtqmqpbwz4">fatcat:scv3i3zbwfgcrd34dtqmqpbwz4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200620054725/https://tches.iacr.org/index.php/TCHES/article/download/8587/8154" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/9a/3d/9a3d1cc15f354e4d8a73e7b1fc5fdc8bb7af91c6.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.13154/tches.v2020.i3.169-195"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="unlock alternate icon" style="background-color: #fb971f;"></i> Publisher / doi.org </button> </a>

Adding Tightly-Integrated Task Scheduling Acceleration to a RISC-V Multi-core Processor

Lucas Morais, Vitor Silva, Alfredo Goldman, Carlos Alvarez, Jaume Bosch, Michael Frank, Guido Araujo
<span title="">2019</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/sbn7zssnbfcjpjzmgy24brukwi" style="color: black;">Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture - MICRO &#39;52</a> </i> &nbsp;
Overhead related to automatic dependence inference and to the scheduling of ready-to-run tasks is a major performance limiting factor of Task Parallel systems.  ...  Our experiments show that task parallel programs using Nanos-RV -the Nanos version ported to our system -are on average 2.13 times faster than those being serviced by baseline Nanos, while programs running  ...  ACKNOWLEDGEMENTS We would also like to thank Xubin Tan for her work on Picos.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3352460.3358271">doi:10.1145/3352460.3358271</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/micro/MoraisSG0BFA19.html">dblp:conf/micro/MoraisSG0BFA19</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/scasnoa57rbidlgmqnhe5psu6i">fatcat:scasnoa57rbidlgmqnhe5psu6i</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20201104005612/https://upcommons.upc.edu/bitstream/handle/2117/191010/micro2019-final178.pdf;jsessionid=A43E438B239A4071B9C0155121F2195E?sequence=1" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/07/75/0775dc717b1c0684205b5963b9c22d723d8811a5.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3352460.3358271"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

Subframe multiplexing for FPGA manufacturing test configuration

Erik Chmelar
<span title="">2004</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/onq43wd7gna3zbic6lchssp6ke" style="color: black;">Proceeding of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays - FPGA &#39;04</a> </i> &nbsp;
This realization can give us speed-up by factor ~2 for hybrid FPGA/CPU realization in comparison with CPU-only implementation.  ...  By having this FPGA co-simulation option, some of the IP cores in an FPGA system can be co-simulated, there by freeing up processing power on the host-PC for further developments in a system.  ...  We propose a new low energy FPGA interconnect architecture that is based on low energy switch blocks using Dynamic Threshold CMOS (DTMOS) based switches and an encoded-low swing (EL) technique.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/968280.968315">doi:10.1145/968280.968315</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/fpga/Chmelar04.html">dblp:conf/fpga/Chmelar04</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/bkkwooxvszbvlfrg4b7h5svtvi">fatcat:bkkwooxvszbvlfrg4b7h5svtvi</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170809230611/https://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/fpga04/pdffiles/p245.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/81/4d/814dae0429049f59cb6ba069952a58750368057c.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/968280.968315"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

A Survey of Methods For Analyzing and Improving GPU Energy Efficiency [article]

Sparsh Mittal, Jeffrey S. Vetter
<span title="2014-04-18">2014</span> <i > arXiv </i> &nbsp; <span class="release-stage" >pre-print</span>
This paper surveys research works on analyzing and improving energy efficiency of GPUs. It also provides a classification of these techniques on the basis of their main research idea.  ...  Further, it attempts to synthesize research works which compare energy efficiency of GPUs with other computing systems, e.g. FPGAs and CPUs.  ...  This program finds applications in financial domains. The hybrid FPGA-CPU implementation divides the work between FPGA and CPU, such that computationintensive kernels are executed on FPGAs.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1404.4629v2">arXiv:1404.4629v2</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/gzl774kfkrbtpcs6f6gx6vifey">fatcat:gzl774kfkrbtpcs6f6gx6vifey</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200901050343/https://arxiv.org/pdf/1404.4629v2.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/43/d4/43d40b51791b9f5a5725d47ca5f1d39592c4cf6d.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1404.4629v2" title="arxiv.org access"> <button class="ui compact blue labeled icon button serp-button"> <i class="file alternate outline icon"></i> arxiv.org </button> </a>

Pushing the Level of Abstraction of Digital System Design: a Survey on How to Program FPGAs

Emanuele Del Sozzo, Davide Conficconi, Alberto Zeni, Mirko Salaris, Donatella Sciuto, Marco D. Santambrogio
<span title="2022-04-27">2022</span> <i title="Association for Computing Machinery (ACM)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/eiea26iqqjcatatlgxdpzt637y" style="color: black;">ACM Computing Surveys</a> </i> &nbsp;
We review these abstraction solutions, provide a timeline, and propose a taxonomy for each abstraction trend: programming models for HDLs; IP-based or System-based toolchains for HLS; application, architecture  ...  Therefore, researchers focused on FPGA abstractions and automation tools.  ...  Section 2.1, Table 1 Scala-FPGA runtime The VeriScala software that handles the FPGA-CPU communication.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3532989">doi:10.1145/3532989</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/nsk5lwvt3vba5fbxmaj7sgpwru">fatcat:nsk5lwvt3vba5fbxmaj7sgpwru</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20220505125606/https://dl.acm.org/doi/pdf/10.1145/3532989" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/ba/38/ba38385857b5e1d910c63afc2c6b06f23ffe96a0.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3532989"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

A dynamically reconfigurable architecture for emergency and disaster management in ITS

Smail Niar, Arda Yurdakul, Osman Unsal, Tuna Tugcu, Aziz Yuceturk
<span title="">2014</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/aui4452pmzfqnlexv3jtm5kp5e" style="color: black;">2014 International Conference on Connected Vehicles and Expo (ICCVE)</a> </i> &nbsp;
For example in [3] , the authors propose a GPU-FPGA-CPU platform for data fusion as an RSU.  ...  In [7] , a Geospatial Information System (GIS) is used in conjunction with a relational database for a location based service and resource distribution in a EDM.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/iccve.2014.7297593">doi:10.1109/iccve.2014.7297593</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/iccve/NiarYUTY14.html">dblp:conf/iccve/NiarYUTY14</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/2laofv6ckvarthjxtoscyd4lli">fatcat:2laofv6ckvarthjxtoscyd4lli</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20201107023633/https://www.cmpe.boun.edu.tr/~yurdakul/publications/NiarICCVE14.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/3d/75/3d7508894088e37b664a304221040990c4c15da2.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/iccve.2014.7297593"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

2021 Index IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Vol. 40

<span title="">2021</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/rl7xk4fwazdrred2difr6v3lii" style="color: black;">IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</a> </i> &nbsp;
., +, TCAD March 2021 479-493 Sparse Tucker Tensor Decomposition on a Hybrid FPGA-CPU Platform.  ...  ., +, TCAD July 2021 1367-1380 Sparse Tucker Tensor Decomposition on a Hybrid FPGA-CPU Platform.  ...  + Check author entry for coauthors File organization Improving the Forward Progress of Transient Systems. Daulby, T., +, TCAD  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/tcad.2021.3136047">doi:10.1109/tcad.2021.3136047</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ppooj4g65nc2zonj7szclerc2y">fatcat:ppooj4g65nc2zonj7szclerc2y</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20211217094609/https://ieeexplore.ieee.org/ielx7/43/9620731/09653739.pdf?tp=&amp;arnumber=9653739&amp;isnumber=9620731&amp;ref=" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/09/3e/093e27bf4ef2fd4a3f6d659ac1801d21166e37f3.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/tcad.2021.3136047"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Energy efficient mapping on manycore with dynamic and partial reconfiguration: Application to a smart camera

Robin Bonamy, Sébastien Bilavarn, Fabrice Muller, François Duhem, Simon Heywood, Philippe Millet, Fabrice Lemonnier
<span title="2018-06-21">2018</span> <i title="Wiley"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/fxzyscw7kbbrnftdz4txqtwl4a" style="color: black;">International journal of circuit theory and applications</a> </i> &nbsp;
This paper describes a methodology to improve the energy efficiency of high-performance multiprocessor architectures with Dynamic and Partial Reconfiguration (DPR), based on a thorough application study  ...  Energy efficient mapping on manycore with dynamic and partial reconfiguration: Application to a smart camera.  ...  ACKNOWLEDGMENTS This work was carried out under the BENEFIC project (CA505), a project labeled within the framework of CATRENE, the EUREKA cluster for Application and Technology Research in Europe on NanoElectronics  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1002/cta.2508">doi:10.1002/cta.2508</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/edswp7sf3bh5pmzwtc5pvq2pqy">fatcat:edswp7sf3bh5pmzwtc5pvq2pqy</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20190503181849/https://hal.archives-ouvertes.fr/hal-01821809/document" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/76/a9/76a9ed981d37e56f0d47fd86f24858ffc6726c38.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1002/cta.2508"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> wiley.com </button> </a>

Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS)

Roberto Giorgi, Farnam Khalili, Marco Procaccini
<span title="2019-11-03">2019</span> <i title="Hindawi Limited"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/yumlw7fbzbevvi2nz62kksdpwu" style="color: black;">International Journal of Reconfigurable Computing</a> </i> &nbsp;
Translating a system requirement into a low-level representation (e.g., register transfer level or RTL) is the typical goal of the design of FPGA-based systems.  ...  Our motivating problem was to deploy a novel execution model called data-flow threads (DF-Threads) running on yet-to-be-designed hardware.  ...  ., FPGA, CPU, and caches) and validate them through the functional execution; however, the actual architecture has to be specified by a separate "timing model" (see Section 2 for more details).  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1155/2019/2624938">doi:10.1155/2019/2624938</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ag3g25ynvrceljdgrisvj3gekm">fatcat:ag3g25ynvrceljdgrisvj3gekm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200508132520/https://usiena-air.unisi.it/retrieve/handle/11365/1081837/243607/hindawi19_fromCotson_toHLS.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/fc/71/fc719e3471e0861b052c932d9954100d1b27d384.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1155/2019/2624938"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="unlock alternate icon" style="background-color: #fb971f;"></i> hindawi.com </button> </a>

XLynx—An FPGA-based XML filter for hybrid XQuery processing

Jens Teubner, Louis Woods, Chongling Nie
<span title="2013-11-01">2013</span> <i title="Association for Computing Machinery (ACM)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/ahla23r2jva2bp2hlkt5rtbx4y" style="color: black;">ACM Transactions on Database Systems</a> </i> &nbsp;
We showcase skeleton automata based on XML projection [Marian and Siméon 2003], a filtering technique that illustrates the feasibility of our strategy for a real-world and challenging task.  ...  While offering unique performance and energy saving advantages, the use of field-programmable gate arrays (FPGAs) for database acceleration has demanded major concessions from system designers.  ...  software only XLynx FPGA/CPU hybrid Query CPU FPGA CPU total saving the software system sends projection path information to the FPGA (1), then requests the XML data from the server (2).  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/2536800">doi:10.1145/2536800</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/3zlqnjgdhndg3ecc2vd2ksnotq">fatcat:3zlqnjgdhndg3ecc2vd2ksnotq</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170706020542/http://dbis.cs.tu-dortmund.de/cms/en/publications/2013/xml-projection-tods/xml-projection-tods.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/de/67/de67e0ba3c670496d813bb4ef344b1db5d206635.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/2536800"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

Bio-inspired heterogeneous architecture for real-time pedestrian detection applications

Luca Maggiani, Cédric Bourrasset, Jean-Charles Quinton, François Berry, Jocelyn Sérot
<span title="2016-03-29">2016</span> <i title="Springer Nature"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/ihxuyfsqpjeoxn5hsmj4p7gmpy" style="color: black;">Journal of Real-Time Image Processing</a> </i> &nbsp;
The paper presents the implemented algorithm and details the proposed architecture for executing it, exposing in particular the partitioning decisions made to meet the required performance.  ...  In this paper we propose a novel heterogeneous architecture for reliable pedestrian detection applications.  ...  This approach has the advantage of being able to automatically detect new objects in images, whereas ROI-based approach can only focus on predefined targets and need some kind of tracking system to adjust  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/s11554-016-0581-3">doi:10.1007/s11554-016-0581-3</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/7gmamchchres3m6qzdehreloqm">fatcat:7gmamchchres3m6qzdehreloqm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170928002505/https://hal.archives-ouvertes.fr/hal-01298676/document" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/9e/f0/9ef0bacc127213e9bf9a83f0e3f7db7e2d9284e3.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/s11554-016-0581-3"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> springer.com </button> </a>

A survey of power and energy efficient techniques for high performance numerical linear algebra operations

Li Tan, Shashank Kothapalli, Longxiang Chen, Omar Hussaini, Ryan Bissiri, Zizhong Chen
<span title="">2014</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/sv4mpg7lmfaqdp24ohp5qqiobm" style="color: black;">Parallel Computing</a> </i> &nbsp;
We summarize commonly deployed power management techniques for reducing power and energy consumption in high performance computing systems by presenting power and energy models and two fundamental types  ...  This paper surveys the research on saving power and energy for numerical linear algebra algorithms in high performance scientific computing on supercomputers around the world.  ...  /energy ratio " overall Financial applications on clusters w/FPGA, CPU, and GPU [81]/[82]/ [83] Dynamic Reducing frequency for tasks off the critical path to lower power w/o performance loss up to 2.5%  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.parco.2014.09.001">doi:10.1016/j.parco.2014.09.001</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/twdkr2hrizebvglto6dwd7jqem">fatcat:twdkr2hrizebvglto6dwd7jqem</a> </span>
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Performance analysis challenges and framework for high-performance reconfigurable computing

Seth Koehler, John Curreri, Alan D. George
<span title="">2008</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/sv4mpg7lmfaqdp24ohp5qqiobm" style="color: black;">Parallel Computing</a> </i> &nbsp;
However, this potential is marred by the additional complexity of these dual-paradigm systems, making it difficult to identify performance bottlenecks and achieve desired performance.  ...  Reconfigurable computing (RC) applications employing both microprocessors and FPGAs have potential for large speedup when compared with traditional (software) parallel applications.  ...  In an FPGA, communication includes off-board (e.g., to another FPGA, CPU, main memory, etc.), on-board (e.g., to on-board DDR memory or other FPGAs connected to the FPGA on the same board), or on-chip  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.parco.2008.01.008">doi:10.1016/j.parco.2008.01.008</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ovommqu25ndzzdw4j33btbetn4">fatcat:ovommqu25ndzzdw4j33btbetn4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20100624045911/http://www.hcs.ufl.edu/~curreri/docs/Parallel_Computing-Performance_Analysis_Challenges_and_Framework_for_High-Performance_Reconfigurable_Computing.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/99/eb/99ebc82bd7c5848b3642ad005704f7fa3d31899f.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.parco.2008.01.008"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> elsevier.com </button> </a>

In-memory database acceleration on FPGAs: a survey

Jian Fang, Yvo T. B. Mulder, Jan Hidders, Jinho Lee, H. Peter Hofstee
<span title="2019-10-26">2019</span> <i title="Springer Science and Business Media LLC"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/bj2uhzcrunglzmjsyjjm3qh4hm" style="color: black;">The VLDB journal</a> </i> &nbsp;
Third, programming FPGAs required developers to have full-stack skills, from high-level algorithm design to low-level circuit implementations.  ...  automatically.  ...  However, the downside is that acceleration, or the offloading of queries, becomes more difficult due to the low FPGA-CPU interconnect bandwidth.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/s00778-019-00581-w">doi:10.1007/s00778-019-00581-w</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/32edtb7frfh3xhpziks75lys3y">fatcat:32edtb7frfh3xhpziks75lys3y</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200309174551/https://link.springer.com/content/pdf/10.1007%2Fs00778-019-00581-w.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/3c/22/3c2280ecd14a21f69914ee3208d4af27ecefb142.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/s00778-019-00581-w"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> springer.com </button> </a>
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