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Infrared Laser Confocal Microscopy: Fast, Flexible, Cost-Effective Inspection and Metrology Tool for Microelectronic Manufacturing

David Rideout
2007 Microscopy Today  
The adaptation of automated detection tools led to the systematic control of increasingly smaller defects.  ...  in the early 1980's, semiconductor inspection was performed primarily by brightfield optical microscopes and with automated detection tools.  ...  While any compromise of the exterior resin coating can be observed visually, the only way to inspect the internal condition of the IC is to take a non-destructive look inside the package.  ... 
doi:10.1017/s155192950005118x fatcat:uthguqkg2fdbrfjwuhs3bxqk5i

Combining Focused Ion Beam and Scanning Electron Microscopy for IC Fab Support and Defect Review

Janet Tashima, Jay Lindquist
1996 Microscopy Today  
The cutting-edge tool for IC fab support and defect review brings together the Focused Ion Beam (FIB) technology with the Scanning Electron Microscope (SEM) into a single workstation.  ...  of a Schottky field emission scanning electron microscope (FE SEM).  ...  In a typical defect review sequence, an optical wafer inspection system (Tencor, KLA, etc.) scans a wafer for defects and records their locations.  ... 
doi:10.1017/s1551929500067961 fatcat:6co47q4x55dw5k3thm4u5d26em

Automated X-ray inspection of chip-to-chip interconnections of Si-on-Si MCM's

Z. Tong, W. Liao, C.A. Strittmatter
1995 IEEE Transactions on Components, Packaging, and Manufacturing Technology, Part B  
Over a test set of 54 sample images of wafer tiles, 100% inspection accuracy was obtained.  ...  This paper presents an automated inspection system that is capable of detecting defects such as "swollen" solders, misaligned solders, missing solders, solder robbing, and solder bridging in a semifinished  ...  Over a small test set of 54 sample images of wafer tiles, 100% inspection accuracy was obtained. The system eventually generates a report of inspection results.  ... 
doi:10.1109/96.475273 fatcat:u236l55olbaulnry3ksohotlae

Nondestructive acoustic microimaging (AMI) analysis of MEMS materials, manufacturing, and packaging

Steven R. Martell, Janet E. Semmens, Lawrence W. Kessler, Rajeshuni Ramesham
2001 Reliability, Testing, and Characterization of MEMS/MOEMS  
Acoustic Micro Imaging (AMI) has demonstrated utility for the nondestructive analysis of materials, bonded wafers and electronic packaging.  ...  Any particles or contaminates present during the bonding process can result in voids at that interface. Voids located in the wrong areas could cause a catastrophic failure of the MEMS/MEOMS device.  ...  of parts on an automated basis.  ... 
doi:10.1117/12.443000 fatcat:2kwb7uvy4zbmfd2slhkw5gji2i

A study of imprint-specific defects in the step and flash imprint lithography process

J. Perez, K. Selinidis, S. Johnson, B. Fletcher, F. Xu, J. Maltabes, I. McMackin, D. Resnick, S. V. Sreenivasan, Michael J. Lercel
2007 Emerging Lithographic Technologies XI  
The defect data presented here is based on a large number of shortloop experiments based on optical inspection of templates and wafers; these data are complemented by a modest number of high resolution  ...  However, it is one of the biggest challenges for S-FIL to be accepted in IC fabrication.  ...  A study of S-FIL process defects was performed by using two types of patterned wafer inspection, KLA2132 (250nm pixel inspection) and KLA ES32 (25nm pixel).  ... 
doi:10.1117/12.720673 fatcat:ja723o4yrrgsjgk4nk4pqkbnge

The Total Release Method for FIB In-Situ TEM Sample Preparation

T.M. Moore
2005 Microscopy Today  
Scaling below the 100nm node, combined with the implementation of copper and low dielectric constant insulators to increase the processor speed, has produced the situation in which SEM inspection no longer  ...  of semiconductor device non-planar barrier and seed layers  ...  The risk to the quality and reliability of the process wafer due to gallium contamination from the ion beam is considered manageable.  ... 
doi:10.1017/s1551929500053657 fatcat:buv44wzd3rhpdexrvp6fgg5kfq

2019 Index IEEE Transactions on Semiconductor Manufacturing Vol. 32

2019 IEEE transactions on semiconductor manufacturing  
an Embedded Real-Time Automated IC Marking Inspection System.  ...  Kang, S., +, TSM Nov. 2019 553-558 The Design and Implementation of an Embedded Real-Time Automated IC Marking Inspection System.  ...  Profitability A Productivity-Oriented Wafer Map Optimization Using Yield Model Based on Machine Learning.  ... 
doi:10.1109/tsm.2019.2958442 fatcat:e276xgw6gbbdlc4fy2ldbrd4py

Non-Visual Defect Monitoring with Surface Voltage Mapping

Andrew Findlay, Dmitriy Marinskiy, Piotr Edelman, Marshall Wilson, Alexandre Savtchouk, Jacek Lagowski
2015 ECS Journal of Solid State Science and Technology  
Non-Visual Defects (NVD) is a category of semiconductor material and process induced defects that cause electrical failures, but are not detected with visual wafer inspection tools.  ...  This paper gives an overview of our non-contact electrical NVD metrology that uses fast whole wafer inspection with standard mm resolution Kelvin probe surface voltage mapping.  ...  Wafer inspection based on surface voltage mapping is used in silicon IC processing for detection of a broad category of defects that are revealed on the surface as localized regions with different values  ... 
doi:10.1149/2.0161604jss fatcat:uypsjlebafc5hldfamxhumo7ly

Low-cost bump-bonding processes for high energy physics pixel detectors

M. Caselle, T. Blank, F. Colombo, A. Dierlamm, U. Husemann, S. Kudella, M. Weber
2016 Journal of Instrumentation  
The short setup time for the bumping process makes gold-stud bump-bonding highly attractive (and affordable) for the flip-chipping of single prototype ICs which is the main limitation of the current photolithography  ...  Thus large detector arrays of highly pixelated detectors with minimal dead area at reasonable costs are required. Bump-bonding of pixel detectors has been shown to be a major cost-driver.  ...  During the production workflow, the cleaned ROCs and the sensor die are optically inspected by an automated digital microscope.  ... 
doi:10.1088/1748-0221/11/01/c01050 fatcat:s77c4qeiqbbjlmzcodlbhhklw4

An integrated framework for yield management and defect/fault reduction

C. Weber, B. Moslehi, M. Dutta
1995 IEEE transactions on semiconductor manufacturing  
A 3-D space consisting of a quality axis, a process integration axis, and a scaling axis encompasses all process and manufacturing parameters.  ...  Crossfunctional teams of process, equipment, operations, and materials personnel proactively explore this space, and provide process engineers with a stable and capable environment for process development  ...  ACKNOWLEDGMENT The authors would like to thank all the employees at the IC manufacturing facility in Ft.  ... 
doi:10.1109/66.382274 fatcat:j4pa44jnu5fsdkznzsqdyjx2ny

Special Section on the 2014 SEMI Advanced Semiconductor Manufacturing Conference

Oliver D. Patterson, Paul Werbaneth, Jennifer Braggin, Stefan Radloff
2015 IEEE transactions on semiconductor manufacturing  
and materials, advanced process control, contamination-free manufacturing, cost reduction, equipment reliability and productivity, defect inspection, environmental, health and safety, factory automation  ...  He has expertise in factory integration, industry standards, automation and equipment interfaces, wafer carriers, and equipment performance. He is the Co-Chair of the SEMI Arizona Steering Committee.  ... 
doi:10.1109/tsm.2015.2488061 fatcat:hgef6mzcbzffngjyvpvbw7vu7y

Wafer inspection technology challenges for ULSI manufacturing

Stan Stokowski, Mehdi Vaez-Iravani
1998 The 1998 international conference on characterization and metrology for ULSI technology  
The use of wafer inspection systems in managing semiconductor manufacturing yields is described. These systems now detect defects of size as small as 40 nm.  ...  Some high-speed systems have achieved 200-mm diameter wafer throughputs of 150 wafers per hour. The particular technologies involved are presented.  ...  ACKNOWLEGMENTS We thank Mustafa Akbulut, Kurt Haller, Ning Yin, and Guoheng Zhao for providing us with data and data analyses of pits and particles on silicon wafers.  ... 
doi:10.1063/1.56824 fatcat:6cqa3kaarfbhfaesx325vytxo4

Front Matter: Volume 7122

Proceedings of SPIE, Hiroichi Kawahira, Larry S. Zurbrick
2008 Photomask Technology 2008  
Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 7/22/2018 Terms of Use: https://www.spiedigitallibrary.org/terms-of-use  ...  Publication of record for individual papers is online in the SPIE Digital Library.  ...  (Taiwan) 7122 3M Results of new mask contamination inspection capability STARlight2+ 72nm pixel with cell-to-cell HiRes5 for qualifying memory masks in wafer fabs [7122-131] R. Badoni, J.  ... 
doi:10.1117/12.817633 fatcat:i6bkf3fbi5acvoxusuhzhlpjzm

Efficient macromodeling of defect propagation/growth mechanisms in VLSI fabrication

X. Li, A.J. Strojwas, M. Reddy, L.S. Milor
1998 IEEE transactions on semiconductor manufacturing  
Particulate contamination deposited on silicon wafers is typically the dominant reason for yield loss in VLSI manufacturing.  ...  The transformation of contaminating particles into defects and then electrical faults is a very complex process which depends on the defect location, size, material, and the underlying IC topography.  ...  We start with the in-line defect inspection (e.g., by KLA-Tencor machines) of the same wafers at each inspection step.  ... 
doi:10.1109/66.728549 fatcat:y2vspvjvvramvnuvkm5wky2zqq

Process integration of single-wafer technology in a 300-mm fab, realizing drastic cycle time reduction with high yield and excellent reliability

S. Ikeda, K. Nemoto, M. Funabashi, T. Uchino, H. Yamamoto, N. Yabuoshi, Y. Sasaki, K. Komori, N. Suzuki, S. Nishihara, S. Sasabe, A. Koike
2003 IEEE transactions on semiconductor manufacturing  
The combination of fully automated systems and single-wafer processing significantly reduces queuing time.  ...  A new methodology for detecting parametric errors effectively in the early stages of production is implemented for quick yield ramp up.  ...  Fig. 16 shows particle inspection results just after cleaning compared with batch and single wet process. Particles are inspected on one wafer per lot.  ... 
doi:10.1109/tsm.2003.810935 fatcat:ndx7epecgfcdphmbp25ts4pzla
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