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Ascertaining Uncertainty for Efficient Exact Cache Analysis [chapter]

Valentin Touzeau, Claire Maïza, David Monniaux, Jan Reineke
2017 Lecture Notes in Computer Science  
able to ascertain that a particular instruction may definitely cause a hit and a miss on different paths, and (ii) an exact analysis, removing all remaining uncertainty, based on model checking, using  ...  It is equally possible that they do in fact always hit or always miss, but the cache analysis is too coarse to see it.Our approach to eliminate this uncertainty consists in (i) a novel abstract interpretation  ...  For efficient look up, each block can only be stored in a small number of cache lines known as a cache set.  ... 
doi:10.1007/978-3-319-63390-9_2 fatcat:43ecrfvmzrdcjhz5rqmesv6txy

Efficient Cache Attacks on AES, and Countermeasures

Eran Tromer, Dag Arne Osvik, Adi Shamir
2009 Journal of Cryptology  
This leakage reveals memory access patterns, which can be used for cryptanalysis of cryptographic primitives that employ data-dependent table lookups.  ...  We describe several software side-channel attacks based on inter-process leakage through the state of the CPU's memory cache.  ...  Bernstein for suggesting the investigation of remote attacks, and to Eli Biham, Paul Karger, Maxwell Krohn and the anonymous referees for their helpful pointers and comments.  ... 
doi:10.1007/s00145-009-9049-y fatcat:dmawwwc4ivdcpluq4yepiyegtq

CAIRO

Ramyad Hadidi, Lifeng Nai, Hyojong Kim, Hyesoon Kim
2017 ACM Transactions on Architecture and Code Optimization (TACO)  
Although industry prototypes have motivated studies for investigating efficient methods and architectures for PIM, researchers have not proposed a systematic way for identifying the benefits of instruction-level  ...  Our studies show that performance gain from bandwidth savings, the ratio of number of cache misses to total cache accesses, and the overhead of host atomic instructions are the key factors in selecting  ...  ACKNOWLEDGMENTS The authors thank the anonymous reviewers for their valuable comments. We also thank Sandia National Labs for providing the SST/VaultSim framework.  ... 
doi:10.1145/3155287 fatcat:ygfptqn265fgphtob733sorfvq

Cache Attacks and Countermeasures: The Case of AES [chapter]

Dag Arne Osvik, Adi Shamir, Eran Tromer
2006 Lecture Notes in Computer Science  
This leakage reveals memory access patterns, which can be used for cryptanalysis of cryptographic primitives that employ data-dependent table lookups.  ...  We describe several software side-channel attacks based on inter-process leakage through the state of the CPU's memory cache.  ...  Bernstein for suggesting the investigation of remote attacks, and to Eli Biham and Paul Karger for directing us to references [8] and [7] respectively.  ... 
doi:10.1007/11605805_1 fatcat:u3yllq7abfaqthhwfl6dbm3k5a

Scalable Bayesian inference for self-excitatory stochastic processes applied to big American gunfire data [article]

Andrew J. Holbrook, Charles E. Loeffler, Seth R. Flaxman, Marc A. Suchard
2020 arXiv   pre-print
2019, thereby extending a past analysis of the same data from under 10,000 to over 85,000 observations.  ...  within a host of economic sectors and scientific disciplines is undercut by the processes' computational burden: complexity of likelihood evaluations grows quadratically in the number of observations for  ...  We gratefully acknowledge support from NVIDIA Corporation with the donation of parallel computing resources used for this research.  ... 
arXiv:2005.10123v1 fatcat:tl5375ttvrey5kfyh7g5tmtwg4

Principles and applications of continual computation

Eric Horvitz
2001 Artificial Intelligence  
We explore policies for allocating idle time for several settings and present applications that highlight opportunities for harnessing continual computation in real-world tasks.   ...  This analysis indicates that the expected latencies are halved for this quantity of cached content.  ...  In an ongoing approximate knapsack analysis, ongoing EVP precomputation and caching analysis continue to update a result store.  ... 
doi:10.1016/s0004-3702(00)00082-5 fatcat:huwtjsw7wvda7ds7noeqrc6pwa

On the Limitations of Analyzing Worst-Case Dynamic Energy of Processing

Jeremy Morse, Steve Kerrison, Kerstin Eder
2018 ACM Transactions on Embedded Computing Systems  
Algorithms for safe and tight bounds would be desirable. We show that finding exact worst-case energy is NP-hard, and that tight bounds cannot be approximated with guaranteed safety.  ...  In worst-case energy consumption analysis, energy models are used to find the most costly execution path.  ...  Acknowledgements We would like to thank David May, Benjamin Sach, Kyriakos Georgiou and James Pallister for their insights into and motivation of this work.  ... 
doi:10.1145/3173042 fatcat:g4uezxg2nbb3bljbo3nt7pk5em

On assessing the viability of probabilistic scheduling with dependent tasks

Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla
2019 Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing - SAC '19  
Despite the significant interest, in the last years, in probabilistic scheduling and probabilistic timing analysis, the interrelation between them has been scarcely addressed.  ...  We conclude that independent pWCET distributions can be obtained, even if dependencies exist, by either controlling the measurement protocol, or by deriving distinct pWCET estimates for particular instances  ...  Hence, we can estimate separated pWCET distributions for odd and even jobs, and reach a more efficient use of resources, as illustrated in Figure 4d for insertsort (blue lines with cache reuse and black  ... 
doi:10.1145/3297280.3297339 dblp:conf/sac/AbellaMC19 fatcat:z63ntlza6bairetc6tb4xn2bvi

Sensing, tracking and reasoning with relations

L.J. Guibas
2002 IEEE Signal Processing Magazine  
This assertion cache design problem is addressed by the framework of Kinetic Data Structures [22, 8] (or KDS for short), which are data structures aimed for problems dealing with objects in motion.  ...  an ensemble of objects may be easier to ascertain than the motion of the individual objects.  ... 
doi:10.1109/79.985686 fatcat:e2lj24kj4nfidbdjplyh235idq

A Customized Processor for Energy Efficient Scientific Computing

Ankit Sethia, Ganesh Dasika, Trevor Mudge, Scott Mahlke
2012 IEEE transactions on computers  
To combat these challenges, this paper presents the PEPSC architecture-an architecture customized for the domain of data parallel dense matrix style scientific application where power efficiency is the  ...  First, GPUs are designed and optimized for graphics applications resulting in delivered performance that is far below peak for more general scientific and mathematical applications.  ...  We also thank Gaurav Chadha and Wade Walker for providing feedback on this work. This research was supported by the US National Science Foundation grant CNS-0964478 and ARM Ltd.  ... 
doi:10.1109/tc.2012.144 fatcat:6wb7y7femfftlh5geqsqbm37wy

PEPSC: A Power-Efficient Processor for Scientific Computing

Ganesh Dasika, Ankit Sethia, Trevor Mudge, Scott Mahlke
2011 2011 International Conference on Parallel Architectures and Compilation Techniques  
First, GPUs are designed and optimized for graphics applications resulting in delivered performance that is far below peak for more general scientific and mathematical applications.  ...  A single PEPSC core has a peak performance of 120 GFLOPs while consuming 2W of power when executing modern scientific applications, which represents an increase in computation efficiency of more than 10X  ...  We also thank Gaurav Chadha and Wade Walker for providing feedback on this work. This research was supported by National Science Foundation grant CNS-0964478 and ARM Ltd.  ... 
doi:10.1109/pact.2011.16 dblp:conf/IEEEpact/DasikaSMM11 fatcat:ip4k3iwv7rb35pjxk4h7woxrcm

A Survey of Cache Bypassing Techniques

Sparsh Mittal
2016 Journal of Low Power Electronics and Applications  
This paper presents a survey of cache bypassing techniques for CPUs, GPUs and CPU-GPU heterogeneous systems, and for caches designed with SRAM, non-volatile memory (NVM) and die-stacked DRAM.  ...  We hope that this paper will provide insights into cache bypassing techniques and associated tradeoffs and will be useful for computer architects, system designers and other researchers.  ...  Cache bypassing is a promising approach for striking a balance between cache capacity scaling and its efficient utilization.  ... 
doi:10.3390/jlpea6020005 fatcat:rkiqtcjbcvggde5utaqogg5xxa

Optimized Live Heap Bound Analysis [chapter]

Leena Unnikrishnan, Scott D. Stoller, Yanhong A. Liu
2002 Lecture Notes in Computer Science  
The optimization drastically improves the analysis efficiency. The analyses have been implemented and experimental results confirm their accuracy and efficiency.  ...  This paper describes a general approach for optimized live heap space and live heap space-bound analyses for garbage-collected languages.  ...  For example, space analysis can determine exact memory needs of embedded applications; it can help determine patterns of space usage and thus help analyze cache misses or page faults; and it can determine  ... 
doi:10.1007/3-540-36384-x_9 fatcat:lyjogi4br5akzn7xxma2ecmbam

Toward the neural implementation of structure learning

D Gowanlock R Tervo, Joshua B Tenenbaum, Samuel J Gershman
2016 Current Opinion in Neurobiology  
path for uncovering their neural implementation.  ...  Recent advances in developing computational frameworks that can support efficient structure learning and inductive inference may provide insight into the underlying component processes and help pave the  ...  Acknowledgements We thank Brenden Lake for contributing Figure 2 , Alla Karpova for significant contributions and Shaul Druckmann, Maksim Manakov, Mikhail Proskurin, Vivek Jayaraman and other colleagues  ... 
doi:10.1016/j.conb.2016.01.014 pmid:26874471 fatcat:z5jf2k4tc5aozkajjwgqe2twfm

From the apron into the pit: the deposition of the complete debris from the manufacture of a bifacial preform at the Middle Paleolithic site of Kabazi V, level III/4-2

Thorsten Uthmeier, Victor P. Chabai, Andrey P. Veselsky
2020 Archaeological and Anthropological Sciences  
The most evident interpretation is that they were caches of equipment stored as insurance for unforeseen circumstances, which is indicative of substantial planning depth and a recurrent use of logistical  ...  The only explanation for the presence of chips of very small size from the same nodule, alongside the larger ones, in the pit fill is the use of an apron to collect all detached items during the process  ...  Whereas the purpose of caches is their retrieval by the entire efficient group and/or a larger network, information on the exact position of a hideout is restricted to close social contacts to prevent  ... 
doi:10.1007/s12520-019-00968-4 fatcat:gmgone3g3fcfxbanqaxuahkj5a
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