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Evaluating compiler technology for control-flow optimizations for multimedia extension architectures
2009
Microprocessors and microsystems
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This paper addresses how to automatically generate code for multimedia extension architectures in the presence of conditionals. ...
This paper presents compiler analyses and techniques for generating efficient parallel code using BOSCC instructions. ...
ACKNOWLEDGEMENTS Authors would like to thank Samuel Larsen and Saman Amarasinghe at MIT for providing their SLP implementation. ...
doi:10.1016/j.micpro.2009.02.002
fatcat:phq3div56zd4hav2faitrf4f2e
Cost effective memory disambiguation for multimedia codes
2002
Proceedings of the international conference on Compilers, architecture, and synthesis for embedded systems - CASES '02
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MEMORY DISAMBIGUATION AND MUL-TIMEDIA
Rationale for Cost Effective Disambiguation Based on Dynamic Memory Intervals ¤ % ¢ ' ¢ ¢ $ ¢ £ § $ ¦ ¥ § ¦ ¢ 5 § ¤ ¤ ! ! ...
¢ ' ¦ ¤ $ ¢ ¢ £ ¥ £ ¥ ¢ ¢ ¤ & ¢ 5 % ¢ ( $ § # ¢ ¤ ¢ $ 6 £ § & $ § 9 ¤ $ ¥ % ¥ £ ¢ ( ¢ § 5 ¢ ¤ ¥
Code Size and Compilation Time 4 ( ¢ £ ¢ ' ( ¢ ! ! ...
doi:10.1145/581630.581649
dblp:conf/cases/SalamiCAV02
fatcat:sswvafqs3rccxmojifws6jlt34
Control-theoretic dynamic frequency and voltage scaling for multimedia workloads
2002
Proceedings of the international conference on Compilers, architecture, and synthesis for embedded systems - CASES '02
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This paper describes a formal feedback-control algorithm for dynamic voltage/frequency scaling (DVS) in a portable multimedia system to save power while maintaining a desired playback rate. ...
Our algorithm is similar in complexity to the previously-proposed change-point detection algorithm [19] but does a better job of maintaining stable throughput and is not dependent on the assumption of ...
CCR-0105626, CCR-0133634, and a grant from Intel MRL. We would also like to thank T. Simunic, J. Pouwelse, and the anonymous reviewers for their helpful comments. ...
doi:10.1145/581630.581654
dblp:conf/cases/LuHHSLS02
fatcat:fugxnz4uu5cwnatboogiek5tly
Mitigating soft error failures for multimedia applications by selective data protection
2006
Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems - CASES '06
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For example, for conventional configuration as in Intel XScale, our approach achieves the same failure rate, while improving performance by 28% and reducing energy consumption by 29% in comparison with ...
Since multimedia applications are increasingly being used in mission-critical embedded systems where both reliability and energy are a major concern, there is a definite need to improve reliability in ...
[27] presents compiler techniques with several approaches aimed at energy reduction for this architecture. ...
doi:10.1145/1176760.1176810
dblp:conf/cases/LeeSIDV06
fatcat:ji7r6isurbeozamagg3lqcj3ee
Control-theoretic dynamic frequency and voltage scaling for multimedia workloads
2002
Proceedings of the international conference on Compilers, architecture, and synthesis for embedded systems - CASES '02
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This paper describes a formal feedback-control algorithm for dynamic voltage/frequency scaling (DVS) in a portable multimedia system to save power while maintaining a desired playback rate. ...
Our algorithm is similar in complexity to the previously-proposed change-point detection algorithm [19] but does a better job of maintaining stable throughput and is not dependent on the assumption of ...
Recently, a new technique for saving energy in multimedia applications using architectural adaptation and frequency scaling was introduced in [7] . ...
doi:10.1145/581652.581654
fatcat:h2mr36m2bfgljc7tzwkjegc3f4
Compiler-controlled caching in superword register files for multimedia extension architectures
Proceedings.International Conference on Parallel Architectures and Compilation Techniques
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In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel's SSE and Motorola's AltiVec that support operations on superwords ...
We present a set of results derived automatically on 4 multimedia kernels and 2 scientific benchmarks. ...
We also wish to thank all the students in our research group for providing the underlying infrastructure for this work, including Yoon-Ju Lee, Byoungro So and Rommel Dongre. ...
doi:10.1109/pact.2002.1106003
dblp:conf/IEEEpact/ShinCH02
fatcat:tldjmpgku5bahbt5xyusixa2oy
Garbage collector re .nement for new dynamic multimedia applications on embedded systems
Eighth Workshop on Interaction between Compilers and Computer Architectures, 2004. INTERACT-8 2004.
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For these new embedded multimedia applications, the dynamic memory subsystem is currently one of the main sources of power consumption and its inattentive management can severely affect the performance ...
However, methodologies to explore and implement convenient garbage collector mechanisms for embedded devices have not been developed yet. ...
the Raytrace benchmark application
Proceedings of the Eighth Workshop on Interaction between Compilers and Computer Architectures (INTERACT'04) 0-7695-2061-8/04 $20.00 © 2004 IEEE ...
doi:10.1109/intera.2004.1299507
dblp:conf/IEEEinteract/VelascoACTOM04
fatcat:lb7kmolulreqblpnuljvzh2raq
Adaptive call admission control for multimedia wireless networks with QoS provisioning
Workshops on Mobile and Wireless Networking/High Performance Scientific, Engineering Computing/Network Design and Architecture/Optical Networks Control and Management/Ad Hoc and Sensor Networks/Compile and Run Time Techniques for Parallel Computing ICPP 2004
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This paper introduces a novel Quality of Service Adaptive Call Admission Control (QoS-AdCAC) framework for next generation broadband wireless cellular networks supporting wireless multimedia services with ...
In this work, each base station locally, independently of other base stations in the network, differentiates between new and handoff calls for each class of traffic by assigning a threshold to each class ...
networks will use micro/pico cellular architectures in order to provide higher capacity. ...
doi:10.1109/icppw.2004.1327569
dblp:conf/icppw/NasserH04
fatcat:hxevbybfsfgmzmovfrqut2ukpq
Page 1031 of IEEE Transactions on Computers Vol. 52, Issue 8
[page]
2003
IEEE Transactions on Computers
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The Internet Archive has digitized a microfilm copy of this work. It may be possible to borrow a copy for reading.
Bodin, “A Retargetable Prepro-
cessor for Multimedia Instructions,” Proc. Workshop Compilers for
Parallel Computers, June 2001.
[52] A. Bik, M. Girkar, P. Grey, and X. ...
Lam, “An Optimizer for Multimedia Instruction Sets,” Proc. SUIF Compiler Workshop, Aug. 1997.
[54] S.P. ...
Understanding multimedia application characteristics for designing programmable media processors
1998
Media Processors 1999
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Using an augmented version of the MediaBench multimedia benchmark suite, compiling and analysis of the applications are performed using the IMPACT compiler. ...
The tight integration of architecture and compiler in any programmable processor requires evaluation of both technologydriven hardware tradeoffs and application-driven architectural tradeoffs. ...
The authors would particularly like to thank all the members of the IMPACT group at Univ. of Illinois at Urbana-Champaign for the use of their compiler, and especially John Gyllenhaal and Brian Dietrich ...
doi:10.1117/12.334763
fatcat:k2vh3gjpl5a4feushy54biwkr4
A Preliminary Study on the Vectorization of Multimedia Applications for Multimedia Extensions
[chapter]
2004
Lecture Notes in Computer Science
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Because of the similarity between multimedia extensions and vector processors, it is believed that traditional vectorization can be used to compile multimedia extensions. ...
Based on a code study of the Berkeley Multimedia Workload, we identify several new challenges arise in vectorizing for multimedia extensions, and provide some solutions to these challenges. ...
Because of architectural similarities between vector processors and multimedia extensions, traditional vectorization was naturally considered to compile programs for multimedia extensions. ...
doi:10.1007/978-3-540-24644-2_27
fatcat:6kvh3jldr5e67bvjncgc3g5s2y
Challenges to combining general-purpose and multimedia processors
1997
Computer
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Andrew Wolfe is director of technology and an S3 fellow at S3 ...
He is a member of IEEE and ACM Mike Schlansker's biography appears on p. 69. Peter Song is a senior analyst at MicroDesign Resources and a senior editor of Microprocessor Report. ...
Limited compiler support for targeting subword instructions complicates the use of multimedia benchmarks, even when suitable benchmarks exist. ...
doi:10.1109/2.642799
fatcat:j2gnaqh77fagbgxqjy5hbolqiq
Leveraging Predicated Execution for Multimedia Processing
2007
2007 IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia
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We describe an effective if-conversion algorithm for the CHILI -a novel hardware architecture specifically designed for digital video processing and mobile multimedia consumer electronic. ...
Experimental results using a cycle accurate simulator for the well known benchmark suite MiBench and several multimedia codecs show a speed improvement of about 18% on average. ...
We describe an effective if-conversion algorithm for the CHILI -a novel hardware architecture specifically designed for digital video processing and mobile multimedia consumer electronic. ...
doi:10.1109/estmed.2007.4375809
dblp:conf/estimedia/EbnerBK07
fatcat:i6gmxmpjbfevxbjdyegwzd7ns4
Optimizing Bandwidth Constraint through Register Interconnection for Stream Processors
2007
Parallel Architecture and Compilation Techniques (PACT), Proceedings of the International Conference on
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However, when generating the executable codes for MLRM-SIMD architecture, the compiler must simultaneously allocate many interdependent resources: the SIMD units on which the operations take place, the ...
In recent years, multimedia and game applications have experienced rapid growth at an explosive rate both in quantity and complexity. ...
When writing programs for MLRM-SIMD architecture, it is better to maintain the original structure in the algorithms, which would be much easier for compilers to exploit the parallelism in the programs ...
doi:10.1109/pact.2007.4336262
fatcat:en23gutyyvfj3kf2kvc274p4ba
Model-Guided Empirical Optimization for Multimedia Extension Architectures: A Case Study
2007
2007 IEEE International Parallel and Distributed Processing Symposium
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architectural defaults and more than 4X faster than the native Intel compiler. ...
Compiler technology for multimedia extensions must effectively utilize not only the SIMD compute engines but also the various levels of the memory hierarchy: superword registers, multi-level caches and ...
specification Our approach for model-guided empirical optimization for multimedia extension architectures is based on Chen's [6] algorithm for optimizing for multiple levels of the memory hierarchy ...
doi:10.1109/ipdps.2007.370641
dblp:conf/ipps/ChenSKCH07
fatcat:awdgu3nk45dwdcvxoejdavsfey
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