A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2015; you can also visit the original URL.
The file type is application/pdf.
Filters
Energy-Optimized On-Chip Networks Using Reconfigurable Shortcut Paths
[chapter]
2011
Lecture Notes in Computer Science
Preserved Fulltext
Topology is an important network attribute that greatly affects the power, performance, cost, and design time/effort of NoCs. In this paper, we propose a novel NoC architecture that can exploit the benefits of both application-specific and regular NoC topologies. To this end, a subset of NoC links bypass the router pipeline stages and directly connect remotely located nodes. This results in an NoC which holds both fixed connections between adjacent nodes and long connections virtually
doi:10.1007/978-3-642-19137-4_20
fatcat:46q5bfplsrcrtnmjbisdyjcvr4
more »
... non-adjacent nodes. These shortcut paths are constructed at run-time by employing a simple and fast mechanism composed of two processes: on-chip traffic monitoring and path reconfiguration. The former keeps the track of the changes in the on-chip traffic pattern and detects high-volume communication flows. The latter then adapts the shortcut paths to the current on-chip traffic pattern by constructing shortcut paths between the source and destination nodes of the high-volume communication flows. Supporting the shortcut paths imposes a trivial overhead on the area of a conventional packet-switched router. Experimental results reveal the effectiveness of the proposed technique in reducing the energy consumption and improving the performance of NoCs.
Design for scalability in enterprise SSDs
2014
Proceedings of the 23rd international conference on Parallel architectures and compilation - PACT '14
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
To cope with this issue, Tavakkol et al. [50] suggested to leverage a network-based controller-to-flash communication structure. ...
Recently, Tavakkol et al. proposed a more generic and regular network-based design paradigm, namely Network-on-SSD (NoSSD) [50] , which showed significant performance over conventional designs. ...
doi:10.1145/2628071.2628098
dblp:conf/IEEEpact/TavakkolAS14
fatcat:sszdx6zo25ha5pbuycrcejwwhm
Enabling Efficient RDMA-based Synchronous Mirroring of Persistent Memory Transactions
[article]
2018
arXiv
pre-print
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit the original URL.
The file type is application/pdf.
Synchronous Mirroring (SM) is a standard approach to building highly-available and fault-tolerant enterprise storage systems. SM ensures strong data consistency by maintaining multiple exact data replicas and synchronously propagating every update to all of them. Such strong consistency provides fault tolerance guarantees and a simple programming model coveted by enterprise system designers. For current storage devices, SM comes at modest performance overheads. This is because performing both
arXiv:1810.09360v1
fatcat:l3u2vf7p5neufflz7cl6okq3q4
more »
... cal and remote updates simultaneously is only marginally slower than performing just local updates, due to the relatively slow performance of accesses to storage in today's systems. However, emerging persistent memory and ultra-low-latency network technologies necessitate a careful re-evaluation of the existing SM techniques, as these technologies present fundamentally different latency characteristics compared than their traditional counterparts. In addition to that, existing low-latency network technologies, such as Remote Direct Memory Access (RDMA), provide limited ordering guarantees and do not provide durability guarantees necessary for SM. To evaluate the performance implications of RDMA-based SM, we develop a rigorous testing framework that is based on emulated persistent memory. Our testing framework makes use of two different tools: (i) a configurable microbenchmark and (ii) a modified version of the WHISPER benchmark suite, which comprises a set of common cloud applications. Using this framework, we find that recently proposed RDMA primitives, such as remote commit, provide correctness guarantees, but do not take full advantage of the asynchronous nature of RDMA hardware. To this end, we propose new primitives enabling efficient and correct SM over RDMA, and use these primitives to develop two new techniques delivering high-performance SM of persistent memories.
The Effect of Network Topology and Channel Labels on the Performance of Label-Based Routing Algorithms
[chapter]
2008
Lecture Notes in Computer Science
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2018; you can also visit the original URL.
The file type is application/pdf.
Designing an efficient deadlock-free routing is a point of concern for irregular topologies. In this paper, we take a step toward the goal by developing three novel deadlock-free routing algorithms in the content of a new family of algorithms called label-based routing algorithms for irregular topologies. In addition, the newly proposed family covers three previously reported routing algorithms [2, 3] . Moreover, by simulating and comparing the newly and traditional proposed routing methods, it
doi:10.1007/978-3-540-69384-0_58
fatcat:6lsixmn4mzbxbibtmufqvxhfem
more »
... is shown that the performance of this family highly depends on the network topology and channel labeling process.
MQSim: A Framework for Enabling Realistic Studies of Modern Multi-Queue SSD Devices
2018
USENIX Conference on File and Storage Technologies
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2022; you can also visit the original URL.
The file type is application/pdf.
Solid-state drives (SSDs) are used in a wide array of computer systems today, including in datacenters and enterprise servers. As the I/O demands of these systems continue to increase, manufacturers are evolving SSD architectures to keep up with this demand. For example, manufacturers have introduced new high-bandwidth interfaces to replace the conventional SATA host-interface protocol. These new interfaces, such as the NVMe protocol, are designed specifically to enable the high amounts of
dblp:conf/fast/TavakkolGSGM18
fatcat:zcewyum2uracdgy2pvjbuxtewy
more »
... rrent I/O bandwidth that SSDs are capable of delivering. While modern SSDs with sophisticated features such as the NVMe protocol are already on the market, existing SSD simulation tools have fallen behind, as they do not capture these new features. We find that state-of-theart SSD simulators have three shortcomings that prevent them from accurately modeling the performance of real off-the-shelf SSDs. First, these simulators do not model critical features of new protocols (e.g., NVMe), such as their use of multiple application-level queues for requests and the elimination of OS intervention for I/O request processing. Second, these simulators often do not accurately capture the impact of advanced SSD maintenance algorithms (e.g., garbage collection), as they do not properly or quickly emulate steady-state conditions that can significantly change the behavior of these algorithms in real SSDs. Third, these simulators do not capture the full end-to-end latency of I/O requests, which can incorrectly skew the results reported for SSDs that make use of emerging non-volatile memory technologies. By not accurately modeling these three features, existing simulators report results that deviate significantly from real SSD performance. In this work, we introduce a new simulator, called MQSim, that accurately models the performance of both modern SSDs and conventional SATA-based SSDs. MQSim faithfully models new high-bandwidth protocol implementations, steady-state SSD conditions, and the full end-to-end latency of requests in modern SSDs. We validate MQSim, showing that it reports performance results that are only 6%-18% apart from the measured actual performance of four real state-of-the-art SSDs. We show that by modeling critical features of modern SSDs, MQSim uncovers several real and important issues that were not captured by existing simulators, such as the performance impact of inter-flow interference. We have released MQSim as an open-source tool, and we hope that it can enable researchers to explore directions in new and different areas.
Performance Evaluation of Dynamic Page Allocation Strategies in SSDs
2016
ACM Transactions on Modeling and Performance Evaluation of Computing Systems
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2018; you can also visit the original URL.
The file type is application/pdf.
Variations of this methodology were used in previous studies for IOPS calculation [Narayanan et al. 2009; Wu and He 2012; Grupp et al. 2013] , whereas exactly the same method was already used in Tavakkol ...
doi:10.1145/2829974
fatcat:3xf5nou7u5dcvesl6ozq4tvhky
Dataplant: Enhancing System Security with Low-Cost In-DRAM Value Generation Primitives
[article]
2019
arXiv
pre-print
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit the original URL.
The file type is application/pdf.
Other Versions
DRAM manufacturers have been prioritizing memory capacity, yield, and bandwidth for years, while trying to keep the design complexity as simple as possible. DRAM chips do not carry out any computation or other important functions, such as security. Processors implement most of the existing security mechanisms that protect the system against security threats, because 1) executing security mechanisms usually require non-trivial computational capabilities (e.g., encryption), and 2) commodity DRAM
arXiv:1902.07344v2
fatcat:rpfx6htqjfbhtjirzjy76rbbia
more »
... hips are not designed to perform computations or tasks other than data storage. In this work, we advocate for DRAM as a key component for providing security mechanisms to the system. To this end, we propose Dataplant, a new class of low-cost, high-performance, and reliable security primitives that can be integrated in commodity DRAM chips with minimal changes. The main idea of Dataplant is to slightly modify the internal DRAM timing signals to expose the inherent process variation found in all DRAM chips for generating unpredictable but reproducible values (e.g., keys) within DRAM. We use Dataplant to build two new security mechanisms. First, a new Dataplant-based physical unclonable function (PUF) with non-destructive read-out, low evaluation latency, robust responses, resiliency to temperature changes, and data-independent responses. Second, a new cold boot attack prevention mechanism that automatically destroys all data within DRAM on every power cycle with zero run-time energy and latency overheads. Using a combination of detailed simulations and experiments with 136 real commodity DRAM chips, we show that our Dataplant-based PUF has 1.8x higher throughput than the best state-of-the-art DRAM PUFs. We also demonstrate that our Dataplant-based cold boot attack protection mechanism is 19.5x faster and consumes 2.54x less energy when compared to existing mechanisms.
PDP 2020 Committees
2020
2020 28th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit the original URL.
The file type is application/pdf.
Zarandi
Amirali Baniasadi
Dara Rahmati
Hossein Asadi
Mehdi Modarressi
Pejman Lotfi-Kamran
Marjan Asadinia
Mohammad Arjomand
Saeid Gorgin
Diana Goehringer
Farshad Khunjush
Arash Tavakkol
Farhad ...
Tavakkol
Program Committee
Ahmad Khonsari
Mohammad Sadr
Hamid R. ...
doi:10.1109/pdp50117.2020.00007
fatcat:plmo7ph7iff55pylwt4oqqsqfm
Inhibition of Digestive α-Amylases from Chilo Suppressalis Walker (Lepidoptera: Crambidae) by a Proteinaceous Extract of Citrullus Colocynthis L. (Cucurbitaceae)
2013
Journal of Plant Protection Research
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2019; you can also visit the original URL.
The file type is application/pdf.
The extract has anti-virus as well as anti-cancer properties (Tavakkol-Afshari et al. 2005) . ...
(Cucurbitaceae), known as bitter apple, vine-of-Sodom, tumba or wild gourd (Tavakkol-Afshari et al. 2005) . ...
doi:10.2478/jppr-2013-0030
fatcat:3pwqzd3k4nbfxmhlxp7fr6ja4a
Tribulus terrestris
2013
Reactions weekly
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2018; you can also visit the original URL.
The file type is application/pdf.
Afshari 2* , Hamid Rahimian Mashhadi 3 and Arash Mamedi 4 1, 3, 4. ...
بیش بهینۀ و پایین) (مطلوب کم بهینۀ (پایه)، کمینه دماهای آن در که بود مانند دندان مدلCardinal temperatures for germination of Tribulus terrestrisAhmad Sarmadi 1 , Reza Tavakkol ...
doi:10.1007/s40278-013-7542-4
fatcat:tfq4rp4esjda3pdvlufdvvzwpe
Callus induction and plant regeneration of Valeriana officinalis are affected by different leaf explants and various concentrations of plant growth regulators
2016
BioTechnologia
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
and cell division were stimulated faster and better in rapeseed cultivars when 2,4-D was combined with a cytokinin (BA), NAA (with or without BA), however, stimulated root formation and rhizogenesis (Tavakkol ...
doi:10.5114/bta.2016.64543
fatcat:jmuxxj7eing7za34glgvgsznwu
Considering Pricing Problem in a Dynamic and Integrated Design of Sustainable Closed-loop Supply Chain Network
2016
International Journal of Industrial Engineering and Production Research
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit the original URL.
The file type is application/pdf.
.,
centers
dependen
Productio
(2008), P
20] Dehghan
sustainab
products
Resource
Vol. 53, (
21] Tuzkaya
methodol
reverse lo
in the
Internatio
Research
4543-457
22] Tavakkol
& Molla- ...
doaj:dd1bd5f883334a71990151092e12c6a7
fatcat:iuv6esujbjbbbe5ljvmqqnebum
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations
[article]
2021
arXiv
pre-print
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2021; you can also visit the original URL.
The file type is application/pdf.
We thank Uksong Kang, Vivek Seshadri, and Arash Tavakkol for their feedback and suggestions on earlier versions of this paper. ...
arXiv:2106.05632v1
fatcat:57kx6f3cibckzgcbuz3dcbnosa
Prediction and classification of sugar content of sugarcane based on skin scanning using visible and shortwave near infrared
2013
Biosystems Engineering
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
SEED DRYING CONDITIONS WITH RESPONSE SURFACE METHODOLOGY IN A CONSTANT-BED DRYER USING TWO CULTIVARS Reza Tavakkol Afshari Ali Abbasi Surki; Reza Tavakkol Afshari P-0124 EFFECT OF EDIBLE COATING ON THE ...
Joo Kim, Seong Il
Kang, Joonyong Kim
P-0844 OPTIMAL SELECTION OF FARM POWER
AND MACHINERY SIZE BY MIXED INTE-
GER LINEAR PROGRAMMING
Rajab Tondro
Rajab Tondro, Hasan Aghel, Mahdi Kho-
jastepour, Arash ...
doi:10.1016/j.biosystemseng.2013.03.005
fatcat:onnkzfpj3nghbam57r7mbmzs6e