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Opportunities in power distribution network system optimization

Gi-Joon Nam, Sani Nassif
2014 Proceedings of the 2014 on International symposium on physical design - ISPD '14  
ASPDAC 2014 paper titled "Applying VLSI EDA to Energy Distribution System Design" -Nassif, Nam, Hayes (IBM) and Fakhouri (UC Irvine) !  ...  Power Distribution Network & EDA ! Energy Analytics Planform (Our implementation) ! Energy Analytics Problem Example: Load Balancing 8 2 Power Distribution System !  ... 
doi:10.1145/2560519.2565875 dblp:conf/ispd/NamN14 fatcat:trfkuln2erbp3m72cyiczr7n3y

NSF Workshop on EDA: Past, Present, and Future (Part 1)

Robert Brayton, Jason Cong
2010 IEEE Design & Test of Computers  
The second and third aspects of EDA in this definition can be applied easily to application fields other than electronic system design.  ...  Their work led to the cultivation of VLSI education in universities and to the flourishing of research in VLSI system design and EDA, which, in turn, created automation tools for logic synthesis, layout  ... 
doi:10.1109/mdt.2010.51 fatcat:gbwz6brpjbac7jtuoyuagbusse

An Implementation of Integral Low Power Techniques for Modern Cell-Based VLSI Designs

A. R. Aswath, M. Puttaraju, A. B. Kalpana
2011 International Journal of Computer and Electrical Engineering  
The proposed low power design techniques can be cooperated with modern power management system to enable the power reduction in targeting circuitry with small implementation overheads.  ...  However, these techniques always involve custom layout design or novel Electronic Design Automation (EDA) flows.  ...  CONCLUSION To meet the power requirement of advanced VLSI design, several simple yet effective physical design flows using existent commercial APR EDA tool have been presented.  ... 
doi:10.7763/ijcee.2011.v3.348 fatcat:7imad6itzbdgniefd2mx5izaxe

An Implementation of Integrable Low Power Techniques for Modern Cell-Based VLSI Designs

Ming-Chung Lee, Herming Chiueh
2006 2006 13th IEEE International Conference on Electronics, Circuits and Systems  
Recent research has proposed several low-power design techniques for VLSI circuitry in nano-scale CMOS era. However, these techniques always involve custom layout design or novel EDA flows.  ...  The proposed low power design techniques can be cooperated with modern power management system to enable the power reduction in targeting circuitry with small implementation overheads.  ...  The authors would also like to acknowledge the process technology file provided by Chip Implementation Center (CIC), Taiwan.  ... 
doi:10.1109/icecs.2006.379932 dblp:conf/icecsys/LeeC06 fatcat:t3ni2du7tvhktgni7rz43st4te

Tutorial: Open-Source EDA and Machine Learning for IC Design: A Live Update

Abdelrahman Hosny, Andrew B. Kahng
2020 2020 33rd International Conference on VLSI Design and 2020 19th International Conference on Embedded Systems (VLSID)  
Whether you are a veteran in EDA / IC design or just starting a career, the tutorial will give a new perspective and a roadmap to use and contribute to open-source EDA. Speaker Bios: Andrew B.  ...  He mixes software industry experience with his research to reimagine the Electronic Design Automation (EDA) landscape.  ...  to boost the energy efficiency of deep learning inference processing.  ... 
doi:10.1109/vlsid49098.2020.00016 dblp:conf/vlsid/HosnyK20 fatcat:gsvvnrgbr5dpdjwkkx63jnf2f4

Synthesis of Predictable Global NoC by Abutment in Synchoros VLSI Design [article]

Jordi Altayó González and Dimitrios Stathis and Ahmed Hemani
2021 arXiv   pre-print
Like Lego system, synchoricity does need a finite number of SiLago block types to cater to different types of designs. Global NoCs are important system level design components.  ...  The synthesized global NoCs are not only valid VLSI designs, their cost metrics (area, latency, and energy) are known with post-layout accuracy in linear time.  ...  These solutions are abstract, the VLSI implementation and post-layout area, latency, and energy are not known. b) Implement the functionality mapped to synchronous islands as VLSI design and know their  ... 
arXiv:2108.12213v1 fatcat:h2dkrpyba5hchpdfvbuddubcby

Looking into the Crystal Ball: From Transistors to the Smart Earth

Alberto Vincentelli, Donatella Sciuto
2014 IEEE design & test  
Intelligent systems gather, synthesize and apply information, and can be applied to different areas, as for instance smart water, smart traffic and smart energy.  ...  When this methodology is applied to complex cyber--physical system it is necessary to make sure that your design is correct.  ... 
doi:10.1109/mdat.2014.2316209 fatcat:jiki2eqo3zda3f6y3cdrd3ebpe

Guest Editorial System-Level Interconnect Prediction

Joni Dambre, Mike Hutton
2007 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
The final paper on system-level interconnect solutions, "Energy/area/delay tradeoffs in the physical design of on-chip segmented bus architecture" by Guo et al., addresses physical design exploration of  ...  To keep the impact of these effects within acceptable bounds, a careful design of power and ground distribution is required.  ... 
doi:10.1109/tvlsi.2007.900756 fatcat:cjrhpal5mvhunfsj64rkyiaakm

Guest Editorial

P.C.-Y. Wu, M.E. Zaghloul, J.-Y. Jou
2004 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
His research interests include nanoelectronics and VLSI including circuits and systems in low-power/low-voltage mixed-signal design and systems, biochips, neural vision sensors, RF circuits, and CAD analysis  ...  to the analysis and design of interconnect, circuits, and architectures of nanoscale large-array systems.  ...  She has published over 200 technical papers and reports in the areas of circuits and systems theory, nonlinear system theory, micromachining MEMS, microsensors design, and micro-electronic VLSI analog,  ... 
doi:10.1109/tvlsi.2004.836278 fatcat:wmr4i7myarfyvaes57r6l6sl5e

Workshops on Extreme Scale Design Automation (ESDA) Challenges and Opportunities for 2025 and Beyond [article]

R. Iris Bahar, Alex K. Jones, Srinivas Katkoori, Patrick H. Madden, Diana Marculescu, Igor L. Markov
2020 arXiv   pre-print
In light of these changes in electronic design contexts and given EDA's significant dependence on such context, the EDA community must adapt to these changes and focus on the opportunities for research  ...  Integrated circuits and electronic systems, as well as design technologies, are evolving at a great rate -- both quantitatively and qualitatively.  ...  Systems: from electronics used in the oil and gas industry (e.g., equipment used in exploration and refining), smart energy distribution networks (i.e.  ... 
arXiv:2005.01588v1 fatcat:6lpcyrobhncdvkrt6g25itw2tu

Low Power Design Methodology [chapter]

Vithyalakshmi Natarajan, Ashok Kumar Nagarajan, Nagarajan Pandian, Vinoth Gopi Savithri
2018 Very-Large-Scale Integration  
In low power CMOS VLSI circuits, the energy dissipation is caused by charging and discharging of internal node capacitances due to transition activity, which is one of the major factors that also affect  ...  Here various design methodologies are discussed to achieve our required low power design concepts.  ...  To optimize power dissipation specifically with low power methodology in digital systems, the method should be applied all over the design from system to process level.  ... 
doi:10.5772/intechopen.73729 fatcat:6jeyngfuyzbt3orwxnx5cwejv4

Editorial TVLSI Positioning—Continuing and Accelerating an Upward Trajectory

Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho (+45 others)
2019 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
, and CAD for VLSI, MEMS, and silicon photonics.  ...  research interests include platform prototyping for the Internet-of-Things (IoT), energy-efficient edge and cloud computing, IoT communications, low-power, embedded digital-signal processing, 3-D integration  ...  (i.e., from energy-frugal to energy-intensive integrated systems).  ... 
doi:10.1109/tvlsi.2018.2886389 fatcat:pois7vp5fzgkhmopqolgjbwulm

Carbon Nanotube Based Delay Model for High Speed Energy Efficient on Chip Data Transmission Using: Current Mode Technique

Sunil Jadav, Munish Vashistah, Rajeevan Chandel
2014 Electrical and Electronics Engineering An International Journal  
In this model first order transfer function is designed using finite difference equation, and by applying the boundary conditions at the source and load termination.  ...  It superiority factor remains to 66.66% as compared to voltage mode signalling.  ...  Acknowledgement The authors acknowledge with gratitude the technical and financial support from YMCA University of Science & technology, Faridabad, Haryana, India, for providing EDA tool facilities in  ... 
doi:10.14810/elelij.2014.3404 fatcat:4xey7qf2lrccpg4aixqm52m33y

A Bayesian based EDA tool for accurate VLSI reliability evaluations

Walid Ibrahim, Azam Beg, Hoda Amer
2008 2008 International Conference on Innovations in Information Technology  
between the conflicting metrics of areapower-energy-delay versus reliability.  ...  This paper introduces a novel EDA tool (NANO-CR-EDA 2 ) for accurate calculation of future nano-circuits reliabilities.  ...  Moreover, the Nano-CR-EDA 2 tool allows users to select the fault model to be applied to the faulty gates.  ... 
doi:10.1109/innovations.2008.4781735 fatcat:l6ttxcj5l5asdmilgykhjmavyy

A Thermal Simulation Process Based on Electrical Modeling for Complex Interconnect, Packaging, and 3DI Structures

Lijun Jiang, Chuan Xu, Barry J. Rubin, Alan J. Weger, Alina Deutsch, Howard Smith, Alain Caron, Kaustav Banerjee
2010 IEEE Transactions on Advanced Packaging  
Using these techniques, this paper introduces the thermal modeling of practical complex VLSI structures to facilitate thermal guideline generation.  ...  To reduce the product development time and achieve first-pass silicon success, fast and accurate estimation of very-large-scale integration (VLSI) interconnect, packaging and 3DI (3D integrated circuits  ...  The authors also want to thank for IBM Research and the University of Hong Kong Seed Fund for their support of this work.  ... 
doi:10.1109/tadvp.2010.2090348 fatcat:yaflgpshi5g6haq7ht6pjl3a34
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