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A low-cost memory architecture with NAND XIP for mobile embedded systems

Chanik Park, Jaeyu Seo, Sunghwan Bae, Hyojun Kim, Shinhan Kim, Bumsoo Kim
2003 Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign & system synthesis - CODES+ISSS '03  
NAND flash memory has become an indispensable component in mobile embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cost and high density.  ...  In this paper, we present a new memory architecture which incorporates NAND flash memory into an existing memory hierarchy for code execution.  ...  In order to hide a long read access latency, we applied the priority-based caching mechanism geared for NAND specific features.  ... 
doi:10.1145/944645.944684 dblp:conf/codes/ParkSBKKK03 fatcat:crcme7giavh3zaiq3j2q3lvwki

A low-cost memory architecture with NAND XIP for mobile embedded systems

Chanik Park, Jaeyu Seo, Sunghwan Bae, Hyojun Kim, Shinhan Kim, Bumsoo Kim
2003 Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign & system synthesis - CODES+ISSS '03  
NAND flash memory has become an indispensable component in mobile embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cost and high density.  ...  In this paper, we present a new memory architecture which incorporates NAND flash memory into an existing memory hierarchy for code execution.  ...  In order to hide a long read access latency, we applied the priority-based caching mechanism geared for NAND specific features.  ... 
doi:10.1145/944682.944684 fatcat:6hr6snmsdndqrpczza5rwlds7m

Application specific non-volatile primary memory for embedded systems

Kwangyoon Lee, Alex Orailoglu
2008 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis - CODES/ISSS '08  
In this paper, we introduce a highly effective non-volatile primary memory architecture which incorporates application specific information to develop a NAND flash based primary memory.  ...  NAND flash memory has been widely adopted for data storage because of its outstanding benefits on cost, power, capacity and nonvolatility.  ...  Consequently, a fair amount of research to lessen or hide the latency of the NAND flash memory based embedded systems has been initiated.  ... 
doi:10.1145/1450135.1450144 dblp:conf/codes/LeeO08 fatcat:26onssjnvzaubmhjsxvn6m3oai

Demand code paging for NAND flash in MMU-less embedded systems

J A Baiocchi, B R Childers
2011 2011 Design, Automation & Test in Europe  
NAND Flash is preferred for code and data storage in embedded devices due to high density and low cost.  ...  However, NAND Flash requires code to be copied (shadowed) into a device's main memory for execution.  ...  INTRODUCTION In many embedded devices, application binaries are kept in NAND flash storage, which has relatively high access latency and energy compared to main memory.  ... 
doi:10.1109/date.2011.5763095 dblp:conf/date/BaiocchiC11 fatcat:ujfqramlvzgl3mclnusafqm7ve

Key-Study to Execute Code Using Demand Paging and NAND Flash at Smart Card Scale [chapter]

Geoffroy Cogniaux, Gilles Grimaud
2010 Lecture Notes in Computer Science  
One solution is to execute code from a secondary memory, cheaper, denser, but slower, as NAND Flash.  ...  Nowadays, the desire to embed more applications in systems as small as Smart Cards or sensors is growing.  ...  Conclusion We presented a new approach to parameterize the Demand Paging strategy to cache a slow secondary memory such as NAND flash in the context of Smart Card or embedded systems with the same size  ... 
doi:10.1007/978-3-642-12510-2_8 fatcat:uimxiq7lsbeq5fzxkedj4ma6pe

RecSSD: Near Data Processing for Solid State Drive Based Recommendation Inference [article]

Mark Wilkening, Udit Gupta, Samuel Hsia, Caroline Trippel, Carole-Jean Wu, David Brooks, Gu-Yeon Wei
2021 arXiv   pre-print
RecSSD is a near data processing based SSD memory system customized for neural recommendation inference that reduces end-to-end model inference latency by 2X compared to using COTS SSDs across eight industry-representative  ...  State-of-the-art models comprise large embedding tables that have billions of parameters requiring large memory capacities.  ...  Compared to traditional disk-based storage systems, NAND flash memories offer higher performance in terms of latency and bandwidth for reads and writes [12] .  ... 
arXiv:2102.00075v1 fatcat:6o3f4mdsqvgr3k76jx2vioewv4

The Implementation of a Hybrid-Execute-In-Place Architecture to Reduce the Embedded System Memory Footprint and Minimize Boot Time

Tony Benavides, Justin Treon, Jared Hulbert, Willie Chang
2007 2007 IEEE International Conference on Information Reuse and Integration  
The result is a system that combines a small RAM memory requirement with a performance increase for improved targeted application and boot time execution.  ...  The ability for an operating system to boot quickly combined with speedy application usage at runtime is important with regards to consumer unit adoption.  ...  While NAND Flash has very long read latency and less bandwidth than both NOR and RAM. NAND cannot be used for XIP because of these long latencies.  ... 
doi:10.1109/iri.2007.4296665 dblp:conf/iri/BenavidesTHC07 fatcat:7mk6kifqgfhflfso33bhm6hley

Compiler-assisted demand paging for embedded systems with flash memory

Chanik Park, Junghee Lim, Kiwon Kwon, Jaejin Lee, Sang Lyul Min
2004 Proceedings of the fourth ACM international conference on Embedded software - EMSOFT '04  
In this paper, we propose a novel, application specific demand paging mechanism for low-end embedded systems with flash memory as secondary storage.  ...  We show that our approach can reduce the code memory size by 33% on average with reasonable performance degradation (8-20%) and energy consumption (10% more on average) for low-end embedded systems.  ...  INTRODUCTION Flash memory is widening its user base in mobile embedded systems not only for data storage but also for code storage due to its non-volatility, solid-state reliability, and low power consumption  ... 
doi:10.1145/1017753.1017775 dblp:conf/emsoft/ParkLKLM04 fatcat:ui4o3lgoqfdjzobwprcyeoo3ry

The Enabling of an Execute-In-Place Architecture to Reduce the Embedded System Memory Footprint and Boot Time

Tony Benavides, Justin Treon, Jared Hulbert, Weide Chang
2008 Journal of Computers  
The result is a system that combines a small RAM memory requirement with a performance increase for improved targeted application and boot time execution.  ...  The ability for an operating system to boot quickly combined with speedy application usage at runtime is important to consumer unit adoption.  ...  Most normal code for executing applications does not need to be moved to RAM because of the high Instruction Cache (I$) and Data Cache (D$) hit rate [8] .  ... 
doi:10.4304/jcp.3.1.79-89 fatcat:b5hdsvouuzbujbgaql2hr24sva

The Apparatus and Enabling of a Code Balanced System

Tony Benavides, Justin Treon, Weide Chang
2007 Fourth International Conference on Information Technology (ITNG'07)  
The result is a system that combines a small RAM memory requirement with a performance increase for improved targeted application and boot time execution.  ...  The ability for an operating system to boot quickly combined with speedy application usage at runtime is important with regards to consumer unit adoption.  ...  Most normal code for executing applications does not need to be moved to RAM because of the high Instruction Cache (I$) and Data Cache (D$) hit rate [8] .  ... 
doi:10.1109/itng.2007.191 dblp:conf/itng/BenavidesTC07 fatcat:knkozlxjtbhfdbvzlvae6ujysy

SWL

Jihyun In, Ilhoon Shin, Hyojun Kim
2007 Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools - LCTES '07  
In this paper, we present a method that reduces the long latency of page faults by performing page fault handling in a parallelized manner, considering the characteristics of NAND-Type flash memory.  ...  Consequently, mobile phones require more hardware resources such as NOR/NAND flash memory and DRAM, and their production cost is accordingly becoming higher.  ...  For example, the price of NAND flash memory is about 38% that of NOR flash memory for 512 Mb (64Mbytes) memory, and about 27% that of DRAM for 1Gb (128Mbytes) memory. [5] , and EELRU [6] , etc.  ... 
doi:10.1145/1254766.1254806 dblp:conf/lctrts/InSK07 fatcat:bnkfspcmmfgfpgjphihq3nbazy

Advances in Emerging Memory Technologies: From Data Storage to Artificial Intelligence

Gabriel Molas, Etienne Nowak
2021 Applied Sciences  
It begins with the presentation of stand-alone and embedded memory technology evolution, since the appearance of Flash memory in the 1980s.  ...  computing tasks, and also enlarges the range of required specifications at the device level due to the exponential number of new systems and architectures.  ...  Embedded specifications depend on the market and applications [22] .  ... 
doi:10.3390/app112311254 fatcat:pg4iqzg4yfc2vb2lh2mgkyqafq

Cognitive SSD: A Deep Learning Engine for In-Storage Data Retrieval

Shengwen Liang, Ying Wang, Youyou Lu, Zhe Yang, Huawei Li, Xiaowei Li
2019 USENIX Annual Technical Conference  
In Cognitive SSD, a flash-accessing accelerator named DLG-x is placed by the side of flash memory to achieve near-data deep learning and graph search.  ...  This leads to high response latency and rising energy consumption. To address this issue, we propose Cognitive SSD, an energy-efficient engine for deep learning based unstructured data retrieval.  ...  Acknowledgments We thank our shepherd, Joseph Tucek, and the anonymous ATC reviewers for their valuable and constructive suggestions.  ... 
dblp:conf/usenix/LiangWLYLL19 fatcat:5jqqpef7bfbh5h36vioxevhbca

SWL

Jihyun In, Ilhoon Shin, Hyojun Kim
2007 SIGPLAN notices  
In this paper, we present a method that reduces the long latency of page faults by performing page fault handling in a parallelized manner, considering the characteristics of NAND-Type flash memory.  ...  Consequently, mobile phones require more hardware resources such as NOR/NAND flash memory and DRAM, and their production cost is accordingly becoming higher.  ...  For example, the price of NAND flash memory is about 38% that of NOR flash memory for 512 Mb (64Mbytes) memory, and about 27% that of DRAM for 1Gb (128Mbytes) memory. [5] , and EELRU [6] , etc.  ... 
doi:10.1145/1273444.1254806 fatcat:77krln3bxzb5lmpburvpuq6cue

Utilizing PCM for Energy Optimization in Embedded Systems

Zili Shao, Yongpan Liu, Yiran Chen, Tao Li
2012 2012 IEEE Computer Society Annual Symposium on VLSI  
Therefore, it becomes an interesting problem of utilizing PCM for energy optimization in embedded systems.  ...  Due to its high density, bit alterability, and low standby power, phase change memory (PCM) is considered as a promising DRAM alternative.  ...  Figure 3 . 3 The system architecture with the application-specific hybrid PCM/DRAM main memory in embedded systems. Table I A I COMPARISON OF PCM WITH DRAM AND NAND FLASH MEMORY [6] .  ... 
doi:10.1109/isvlsi.2012.81 dblp:conf/isvlsi/ShaoLCL12 fatcat:kd7tzfyhuvfe7bwzudwxfvf5f4
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