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A variable-radix digit-serial design methodology and its application to the discrete cosine transform

M.P. Leong, P.H.W. Leong
2003 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
The resulting hardware implementations have variables of different wordlengths and operators of different radices.  ...  A variable-radix digit-serial design methodology and its application to the implementation of a systolic structure for computing the discrete cosine transform is presented.  ...  The removal of multipliers with small coefficients (for the above case, multipliers with coefficients and ) does not affect the precision of output with respect to the error constraint, as the partial  ... 
doi:10.1109/tvlsi.2003.811099 fatcat:eijs7cpavre2phgorxkcl7c4vy

An Automated Fixed-Point Optimization Tool in MATLAB XSG/SynDSP Environment

Cheng C. Wang, Changchun Shi, Robert W. Brodersen, Dejan Marković
2011 ISRN Signal Processing  
The tool minimizes hardware cost subject to mean-squared quantization error (MSE) constraints.  ...  The use of the tool is first illustrated on an FIR filter to achieve over 50% area savings for MSE specification of 10−6 as compared to all 16-bit realization.  ...  The multiplier area shown in Figure 5 (b) indicates that increasing the wordlength of one input only impacts the total area by a small amount, but once the wordlength of the other input is also increased  ... 
doi:10.5402/2011/414293 fatcat:mrfrn2lxfvdujci2q25czied5a

Design and Performance Analysis of Fixed-point Jacobi SVD Algorithm on Reconfigurable System

Ramanarayan Mohanty, Gonnabhaktula Anirudh, Tapan Pradhan, Bibek Kabi, Aurobinda Routray
2014 Information Engineering Research Institute procedia  
Primary reasons for the evolution and accumulation of these errors in FPGA implementation are -( ) i Use of 16-bit multipliers as a correction factor and ( )ii Insufficient integer wordlength and fractional  ...  Ranges of different relative errors during various quantization modes are shown in Table 2 . q is quantization step and is equal to, q=2 -b , k is the number of bits eliminated from -bits during quantization  ... 
doi:10.1016/j.ieri.2014.08.005 fatcat:cvw7kcxhvrevlf3zer75wgmykm

Stability analysis of digital Kalman filters with floating-point computation

1991 Journal of Guidance Control and Dynamics  
In digital signal processing, a great deal of work has been devoted to the analysis of roundoff error.  ...  V., ‘‘Analysis of Coefficient Quantization Errors in State-Space Digital Filters,’ JEEE Transactions on Acoustics, Speech, and Signal Processing, Vol. ASSP-34, Feb. 1986, pp. 131-139. 7Stripad, A.  ... 
doi:10.2514/3.20685 fatcat:s5riv5ackbcqnj3amxvw4pk3ma

The digital implementation of control compensators: The coefficient wordlength issue

P. Moroney, A. Willsky, P. Houpt
1980 IEEE Transactions on Automatic Control  
A number of these involve the problems that arise in dealing with the fixed-point arithmetic and finite wordlengths ( limited storage) of small -scale digital systems.  ...  The concept of a (simpltz) statistical estimate of the wordlength originated in the study of digital filters with the work of Knowles and Olcayto [111.Avenhaus [121 applied this idea to the digital filter  ... 
doi:10.1109/tac.1980.1102397 fatcat:3rn7huyq2jgsxjywmvimv2gwky

Wordlength optimization for linear digital signal processing

G.A. Constantinides, P.Y.K. Cheung, W. Luk
2003 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
In addition, the heuristic reaches within 0.7% of the optimum multiple wordlength area over a range of benchmark problems.  ...  It is demonstrated that the proposed heuristic leads to area improvements of 6% to 45% combined with speed increases compared to the optimum uniform wordlength design.  ...  ACKNOWLEDGMENT The authors wish to acknowledge helpful proposals from the anonymous reviewers.  ... 
doi:10.1109/tcad.2003.818119 fatcat:3emkw4gonnd4vkvi4ofwuczaxa

Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for high-performance vector rotational DSP applications

Chih-Hsiu Lin, An-Yeu Wu
2005 IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications  
At the VLSI architecture level, we proposed a generalized MSR-CORDIC engine for the tradeoff between hardware complexity and quantization error performance.  ...  Moreover, most CORDIC algorithms generally suffer from the roundoff noise in the fixed-wordlength implementations. We also propose two schemes to control and reduce the impairment.  ...  When the signal is expressed in signed-digital representation with a fixed wordlength , the quantization levels are , where is the number of fractional digits.  ... 
doi:10.1109/tcsi.2005.853908 fatcat:fy7tf7m7ubamhciikydlax6mry

Quantization effects in the polyphase N -path IIR structure

A. Krukowski, R. Spicer Morling, I. Kale
2002 IEEE Transactions on Instrumentation and Measurement  
Index Terms-Digital filters, dynamic range analysis, polyphase IIR structure, quantization effects, quantization noise, roundoff noise.  ...  In this paper, we take four of these different implementation structures, analyze the rounding noise originating from the limited arithmetic wordlength of the mathematical operators, and check the internal  ...  In the digital filter implementation, the signal values are multiplied with the filter coefficients, and the result is usually constrained back to the original signal wordlength.  ... 
doi:10.1109/tim.2002.808032 fatcat:pnjmmm3yrjcd5lwx3d2d45x7pu

Multiplierless unified architecture for mixed radix-2/3/4 FFTs

Fahad Qureshi, Jarmo Takala, Anastasia Volkova, Thibault Hilaire
2017 2017 25th European Signal Processing Conference (EUSIPCO)  
The complexity is equal to multiplierless 3-point FFT in terms of adders/subtractors with the exception of a few additional multiplexers.  ...  The proposed architecture is based on radix-3 Wingorad Fourier transform, however multiplication is performed by constant multiplication instead of general multiplier.  ...  Usually, for the finite-precision error analysis in signal processing domain a stochastic approach is used: the quantization and computational errors are seen as a white uniformly distributed noise added  ... 
doi:10.23919/eusipco.2017.8081425 dblp:conf/eusipco/QureshiTVH17 fatcat:f7ttft3arnfaznma3fb3abbxym

Design and Complexity Optimization of a New Digital IF for Software Radio Receivers With Prescribed Output Accuracy

S. C. Chan, K. M. Tsui, K. S. Yeung, T. I. Yuk
2007 IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications  
The IF under study consists of digital filters with fixed coefficients, except for a limited number of multipliers required in the Farrow-based sampling rate converter (SRC).  ...  The second one is based on a discrete optimization method called the Marginal Analysis method, and it yields the desired wordlengths in integer values.  ...  For rounding operations, the quantization noise will have a zero mean with a variance equal to , where is the quantization step-size.  ... 
doi:10.1109/tcsi.2006.886003 fatcat:ami35fbvwnefhi5uepemjvcmum

Multiplierless Unified Architecture For Mixed Radix-2/3/4 Ffts

Thibault Hilaire, Fahad Qureshi, Jarmo Takala, Anastasia Volkova
2018 Zenodo  
Publication in the conference proceedings of EUSIPCO, Kos island, Greece, 2017  ...  Therefore, our modeling of the error propagation stays the same and the new multiplierless design has an error bound equivalent to the implementation with a multiplier (or better if additions in the multiplierless  ...  Generally, the canonical signed digit representation is used to reduce the number of non-zero digits with respect to the simple binary representation and, therefore the number of adders [20] .  ... 
doi:10.5281/zenodo.1159623 fatcat:3nfpl26dsncudgiku7bltcrixy

Integer FFT with Optimized Coefficient Sets

Wei-Hsin Chang, Truong Nguyen
2007 2007 IEEE International Conference on Acoustics, Speech and Signal Processing - ICASSP '07  
In this paper, the principle of nding the optimized coef cient set of integer fast Fourier transform (IntFFT) is introduced.  ...  Based on the observation of the quantization loss model of lifting operations, we can select an optimized coef cient set and achieve better signal-to-quantizationnoise ratio (SQNR).  ...  James [9] derived the xed-point MSE analysis of quantization loss for mixed-radix FFT algorithms with conventional complex multipliers.  ... 
doi:10.1109/icassp.2007.366184 dblp:conf/icassp/ChangN07 fatcat:ov2yzx5la5bllgmt45j4sajjfq

Effects of quantization and overflow in recursive digital filters

T. Claasen, W. Mecklenbrauker, J. Peek
1976 IEEE Transactions on Acoustics Speech and Signal Processing  
Suppression of parasitic oscillations due to overflow and quantization in recursive digital filters. Eindhoven: Technische Universiteit Eindhoven.  ...  Linear analysis of digital filters Before analysing the nonlinear effects due to the finite wordlength representation of the signals in a digital signal processor the linear response of the idealized filter  ...  We start with the analysis of the first -order digital filter with round- The quantization method used in this example is "anti-rounding", as defined by: Q(x) X for x integer x + E with 1/2 s lEI < 1  ... 
doi:10.1109/tassp.1976.1162863 fatcat:37zcakusnfd5pf7gsfjlpvdz3m

High-speed digital filtering: Structures and finite wordlength effects

K. S. Arun, D. R. Wagner
1992 Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology  
A potential problem that arises as a result of coefficient quantization is a periodically time-varying behavior exhibited by the realized filter.  ...  We will demonstrate how finite wordlength errors can change a nominally time-invariant filter into a time-varying system.  ...  Acknowledgments This work was supported partially by the SDIO/IST office under contract DAAL 03-86-K0111 administered by the US Army Research Office, and partially by the Joint Services Electronics Project  ... 
doi:10.1007/bf00930646 fatcat:rb35lbgs25ahzcnjcvs4s3b2ka

Formalization of Fixed-Point Arithmetic in HOL

Behzad Akbarpour, Sofiène Tahar, Abdelkader Dekdouk
2005 Formal methods in system design  
An error analysis is then performed to check the correctness of the quantized result after carrying out basic arithmetic operations, such as addition, subtraction, multiplication and division against their  ...  We encoded the fixed-point number system and specified the different quantization modes in fixed-point arithmetic such as the directed and even quantization modes.  ...  The second main theorem on fixed-point error analysis concerns bounding the quantization error.  ... 
doi:10.1007/s10703-005-2256-8 fatcat:g4e5csm4i5gnnjl3fa46w6tnqu
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