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Analog Codes on Graphs
[article]
2006
arXiv
pre-print
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Thus, over a wide range of SNR values, the proposed code performs much better than any single previously known analog coding system. ...
An analog coding scheme is described, which can achieve a mean-squared error distortion proportional to (1+SNR)^-B for a bandwidth expansion factor of B/R, where 0 < R < 1 is the rate of individual component ...
Figure 11 11 Figure 11 The factor graph for the (RA 2 ) code.
Figure 13 13 Figure 13 Forward backward algorithm on the Accumulate code graph. ...
arXiv:cs/0608086v1
fatcat:kqijel3r7nadbjaxgybllkkyxm
An Optimization Method for Designing LDPC Analog Decoders Based on Frequent Subgraph Mining Algorithm
2016
International Journal of Signal Processing, Image Processing and Pattern Recognition
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Based on factor graphs and the sum-product algorithm, the LDPC decoding process on the factor graph and the construction of analog decoders are exploited. ...
Moreover, this method can extend to optimize the design of other analog decoders for linear block codes, such as BCH and RS codes. ...
A (120, 75) LDPC analog decoder with the MS algorithm was proposed in [9] , which was one of the longest length codes implemented to date using analog techniques [10] . ...
doi:10.14257/ijsip.2016.9.10.12
fatcat:37en453sxzazlixxweuezcz5ti
Versatile graphs for tail-biting convolutional codes
2008
2008 IEEE International Symposium on Circuits and Systems
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Analog realization of such a graph employing MOS transistors is discussed and its circuit-level simulation results are given. ...
A unified method to derive Tanner graph related to tail-biting convolutional codes (CCs) is presented. ...
We considered convolutional codes which are converted to block code by adding certain constraints on the trellis of the graph. ...
doi:10.1109/iscas.2008.4541393
dblp:conf/iscas/ZahabiMMC08
fatcat:ttlaxkz3djatnhvbvklfalkyri
A Subthreshold PMOS Analog Cortex Decoder for the (8, 4, 4) Hamming Code
2009
ETRI Journal
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However, the structure of the encoder is well suited for analog decoding. A proof-of-concept Cortex decoder for the (8, 4, 4) Hamming code is implemented in subthreshold 0.25-µm CMOS. ...
These codes are systematic block codes of rate 1/2 and can have higher d min than turbo codes. ...
Cortex decoder construction: (a) bipartite graph of (4, 2, 2) Hadamard code and (b) Cortex graph of the (8, 4, 4) Hamming code. One of the shortest cycles is shown with dashed lines. ...
doi:10.4218/etrij.09.0109.0207
fatcat:gypldjgzwbdupavlbym25vhv5m
HoloCast+: Hybrid Digital-Analog Transmission for Graceful Point Cloud Delivery with Graph Fourier Transform
2021
IEEE transactions on multimedia
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Specifically, our method utilizes hybrid digital-analog coding, integrating digital compression and analog coding based on graph Fourier transform (GFT), to gracefully improve 3D reconstruction quality ...
Conventionally, communications of point cloud data have relied on digital compression and digital modulation for three-dimensional (3D) data streaming. ...
The graph-based analog coding decorrelates the residuals in graph-domain to boost the quality enhancement according to the improvement of wireless channel quality. ...
doi:10.1109/tmm.2021.3077772
fatcat:22ltju4moveydiidcmppckpbpa
An Analysis of the Sum-Product Decoding of Analog Compound Codes
2007
2007 IEEE International Symposium on Information Theory
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We investigate the sum-product decoding on graphs of analog compound codes and show that the iterative decoding can be completely analyzed by tracing the mean vector at each iteration. ...
Based on this geometric analysis, we propose to decompose the analog compound codes into several orthogonal constituent code spaces to achieve the fastest convergence speed. ...
Each constituent code can be represented by a cycle-free graph and is decodable on its own. ...
doi:10.1109/isit.2007.4557496
dblp:conf/isit/HuH07
fatcat:ml2xguqz4ffdzfnnv5biihfrta
Low-voltage CMOS circuits for analog iterative decoders
2006
IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications
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Measured results for two fabricated low-voltage analog decoders are also presented. ...
The low-voltage analog architecture is then useful for implementing Turbo and low-density parity check decoders. ...
The decoding algorithms used in Turbo codes have since been generalized into a class of algorithms operating on graphs [2] , [3] . ...
doi:10.1109/tcsi.2005.859773
fatcat:pwe67lb23jhyrovw25a2tqfgba
Complexity ratings of digit strings and their pictorial analogs
1973
Bulletin of the Psychonomic Society
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The pictorial analog of a d igit string was the dot-line graph or bar graph representing the heights of t he digits in the string. ...
In each of .three experiments, one group of Ss rated complexity of short strings of decimal dig its and another group rat ed t he complexity of the pic torial analogs of the digit strings. ...
E xperiment 3B: The bar-graph analogs of the Experiment 3A digit strings drawn on cards. ...
doi:10.3758/bf03327712
fatcat:4piyiyvsorbnrj7dlxqw3kqcpe
Analog MIMO detection on the basis of Belief Propagation
2006
The ... Midwest Symposium on Circuits and Systems conference proceedings
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A small analog detector based on this work has been designed and laid out in a 0.25pm BiCMOS process. ...
In this article we present the design of an analog detector for Multiple-Input Multiple-Output (NIMO) wireless systems, based on the well known Belief Propagation (BP) algorithm. ...
Analog decoding of channel codes is a good example of this new philosophy of receiver design. ...
doi:10.1109/mwscas.2006.382205
fatcat:ldu3ghmwrrbcbbssdxyignr5oi
Solving Hofstadter's Analogies Using Structural Information Theory
[chapter]
2021
Communications in Computer and Information Science
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This paper introduces a method to solve string-based (symbolic) analogies based on hybrid inferential process integrating Structural Information Theory-a framework used to predict phenomena of perceptual ...
Analogies are common part of human life; our ability to handle them is critical in problem solving, humor, metaphors and argumentation. ...
-PISA always returns the one code with the lowest complexity, while this compressor returns a Graph object. ...
doi:10.1007/978-3-030-76640-5_7
fatcat:hewksdk5qndadhdlexp7ixvasq
DESIGN OF PRESSURE MEASUREMENT IN THE EXERCISE SMART MINE USING A PRESSURE SENSOR
2020
JOURNAL ASRO
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On testing authors use applications that are created using Visual Studio 2012 to plotting the pressure graphs and large voltage output sensors. ...
The MPX5700 air pressure Sensor, as a source of pressure measurement with analog voltage output is comparable to the large value of air pressure. ...
Data received through serial communications will be in the plot on the interface graph to obtain a graph of air pressure and large analog voltage output sensor MPX5700. ...
doi:10.37875/asro.v11i2.279
fatcat:nbau47lckbab3imbwh4jj7332a
Page 1106 of SMPTE Motion Imaging Journal Vol. 102, Issue 12
[page]
1993
SMPTE Motion Imaging Journal
Preserved Fulltext
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CCIR Rec. 709 is based on a power function of 0.45. ...
Computer frame buffer digital-to-ana- log converters that employ 7.5% setup almost universally have very loose tolerance on the analog voltage associated with reference black. ...
Coding-Aware Scheduling for Reliable Many-to-One Flows
2009
2009 IEEE International Conference on Communications
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The performance of coding-aware scheduling is studied based on both digital network coding (DNC) and analog network coding (ANC). ...
We revisit the problem of scheduling the sources transmissions in a many-to-one flow to provide reliable communication between n sources and a single destination. ...
Fig. 6 . 6 An alternative corresponding Graph G
Fig. 7 . 7 Coding tree on graph G IV. SCHEDULING BASED ON ANALOG NETWORK CODING
SS Input: Graph G(V, E), V = {Us ∪ Ls}. G is bipartite, and a tree. ...
doi:10.1109/icc.2009.5198830
dblp:conf/icc/Al-KofahiK09
fatcat:qolpsncoczfz3lg7xn5qcqlltm
Finite Rate QLDPC-GKP Coding Scheme that Surpasses the CSS Hamming Bound
[article]
2022
arXiv
pre-print
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code such as the surface code on these GKP qubits. ...
Furthermore, we observe that the GKP analog information helps the iterative decoder in escaping harmful trapping sets in the Tanner graph of the QLDPC code, thereby eliminating or significantly lowering ...
graphs. ...
arXiv:2111.07029v2
fatcat:6p2f6szhafhbznroeqnchjaoli
Iterative decoding in analog CMOS
2003
Proceedings of the 13th ACM Great Lakes Symposium on VLSI - GLSVLSI '03
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The decoder is based on the so-called min-sum algorithm (also referred to as max-sum or max-product) and can be used to decode powerful coding schemes such as low-density paritycheck (LDPC) codes and turbo ...
The proposed circuits can be implemented by standard CMOS technology, which means lower fabrication cost and/or simpler design compared to previously reported analog iterative decoders that are based on ...
MIN-SUM DECODING ALGORITHM To explain the min-sum algorithm, we focus on binary LDPC codes and the bipartite graph that represents the code through its parity-check equations, and is referred to as "Tanner ...
doi:10.1145/764813.764814
fatcat:vjwyr66c7je4rhkc24dtetpaym
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