Filters








15,938 Hits in 4.0 sec

An efficient lock-aware transactional memory implementation

Justin E. Gottschlich, Jeremy G. Siek, Manish Vachharajani, Dwight Y. Winkler, Daniel A. Connors
2009 Proceedings of the 4th workshop on the Implementation, Compilation, Optimization of Object-Oriented Languages and Programming Systems - ICOOOLPS '09  
We present a lock-aware transactional memory (LATM) system that employs a unique communication method using local knowledge of locks coupled with granularity-based policies.  ...  Transactional memory (TM) is an emerging concurrency control mechanism that provides a simple and composable programming model.  ...  Introduction Transactional memory (TM), as introduced by Herlihy and Moss, is an emerging concurrency control mechanism that provides a simple, efficient, and composable programming model [5, 7, 9, 10  ... 
doi:10.1145/1565824.1565826 dblp:conf/ecoop/GottschlichSVWC09 fatcat:56nufh72sra6bbviixn4gf5g4m

A Resolution for Shared Memory Conflict in Multiprocessor System-on-a-Chip [article]

Shaily Mittal, Nitin
2012 arXiv   pre-print
In this paper, we propose a new semaphore scheme for synchronization in shared cache memory in an MPSoC.  ...  It has been shown that locks have numerous shortcomings over transactional memory in terms of power consumption, ease of programming and performance.  ...  Shared memory accesses dominate energy consumption, making the locks simulation an unattractive energy-aware solution. Executing transactions mode consumes less energy than executing them with locks.  ... 
arXiv:1202.0613v1 fatcat:27ky77b3nrgj3g6eupgkitblwq

The Velox Transactional Memory Stack

Yehuda Afek, Ulrich Drepper, Pascal Felber, Christof Fetzer, Vincent Gramoli, Michael Hohmuth, Etienne Riviere, Per Stenstrom, Osman Unsal, Walther Ma Moreira, Derin Harmanci, Patrick Marlier (+12 others)
2010 IEEE Micro  
Compiler support is necessary for implementing an efficient transactional memory stack in a way that is transparent to the programmer.  ...  TinySTM: An STM runtime TinySTM is a lightweight and efficient STM implementation developed as the reference C/Cþþ transactional memory runtime of the VELOX stack. 7 It is word-based (that is, it achieves  ... 
doi:10.1109/mm.2010.80 fatcat:lmt2kryqbbd4ncz3crwlh2dvu4

TM-dietlibc: A TM-aware Real-World System Library

Vesna Smiljkovic, Martin Nowack, Neboja Miletic, Timothy Harris, Osman Unsal, Adrian Cristal, Mateo Valero
2013 2013 IEEE 27th International Symposium on Parallel and Distributed Processing  
The simplicity of concurrent programming with Transactional Memory (TM) and its recent implementation in mainstream processors greatly motivates researchers and industry to investigate this field and propose  ...  In this paper, we present the first TM-aware system library, a complex software implementation integrated with TM principles and suited for software (STM), hardware (HTM) and hybrid TM (HyTM).  ...  We compare our TM-aware implementation using different TM implementations with the traditional approach of running library calls irrevocably or with locks.  ... 
doi:10.1109/ipdps.2013.45 dblp:conf/ipps/SmiljkovicNMHUCV13 fatcat:gsfewmkdozbangsumcgko4ol74

Dynamic performance tuning of word-based software transactional memory

Pascal Felber, Christof Fetzer, Torvald Riegel
2008 Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming - PPoPP '08  
The current generation of software transactional memories has the advantage of being simple and efficient.  ...  In this paper, we investigate dynamic tuning mechanisms on a new time-based software transactional memory implementation.  ...  Further, a transaction can only free memory after it has acquired all the locks covering it as a free is semantically equivalent to an update.  ... 
doi:10.1145/1345206.1345241 dblp:conf/ppopp/FelberFR08 fatcat:aopkirisxnethjs6cbjpfkugce

On designing NUMA-aware concurrency control for scalable transactional memory

Mohamed Mohamedin, Roberto Palmieri, Sebastiano Peluso, Binoy Ravindran
2016 SIGPLAN notices  
Therefore in this paper we present a NUMA-aware concurrency control for transactional memory that we designed for promoting scalability in scenarios where both the transactional workload is prone to scale  ...  , and the characteristics of the underlying memory model are inherently non-uniform, such as NUMA architectures.  ...  Overview Transactional Memory (TM) [8] is a powerful programming abstraction for implementing concurrent applications.  ... 
doi:10.1145/3016078.2851189 fatcat:mcfmw5oz4fhgfh6urcjcsaly7a

Address-aware fences

Changhui Lin, Vijay Nagarajan, Rajiv Gupta
2013 Proceedings of the 27th international ACM conference on International conference on supercomputing - ICS '13  
Our experiments conducted on a group of concurrent lock-free algorithms and SPLASH-2 benchmarks show that address-aware fence eliminates nearly all the overhead due to fences and achieves an average improvement  ...  This is achieved by dynamically checking a condition for when an execution of a fence must take effect and delay the memory accesses following the fence.  ...  Speculative lock elision [29] and lock elision with transactional memory [8, 34] both use speculative technique to dynamically eliminate lock operations.  ... 
doi:10.1145/2464996.2465015 dblp:conf/ics/LinNG13 fatcat:7njoxz55pva7necoyhr7iuooke

Committing conflicting transactions in an STM

Hany E. Ramadan, Indrajit Roy, Maurice Herlihy, Emmett Witchel
2009 SIGPLAN notices  
Dependence-aware transactional memory (DATM) is a recently proposed model for increasing concurrency of memory transactions without complicating their interface.  ...  Second, we describe the first application of dependence tracking to software transactional memory (STM) design and implementation. We compare our implementation with a state of the art STM, TL2 [5].  ...  Experimental results from our prototypes (in C and Java) confirm the potential performance benefits of dependence-aware transactional memory as compared to traditional STM implementations.  ... 
doi:10.1145/1594835.1504201 fatcat:2qnfojbnkjckrp6lrsza54vamu

Committing conflicting transactions in an STM

Hany E. Ramadan, Indrajit Roy, Maurice Herlihy, Emmett Witchel
2008 Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming - PPoPP '09  
Dependence-aware transactional memory (DATM) is a recently proposed model for increasing concurrency of memory transactions without complicating their interface.  ...  Second, we describe the first application of dependence tracking to software transactional memory (STM) design and implementation. We compare our implementation with a state of the art STM, TL2 [5].  ...  Experimental results from our prototypes (in C and Java) confirm the potential performance benefits of dependence-aware transactional memory as compared to traditional STM implementations.  ... 
doi:10.1145/1504176.1504201 dblp:conf/ppopp/RamadanRHW09 fatcat:x6oarptd35hf5mdujldiczbz3m

An HTM-based update-side synchronization for RCU on NUMA systems

SeongJae Park, Paul E. McKenney, Laurent Dufour, Heon Y. Yeom
2020 Proceedings of the Fifteenth European Conference on Computer Systems  
RCX is a software-based synchronization mechanism combining hardware transactional memory (HTM) and traditional locking based on our NUMA-aware design principles for RCU.  ...  Logging, hardware transactional memory, or fine-grained locking can provide better scalability, but each of these approaches has limitations, such as imposing overhead on readers or poor scalability on  ...  However, RCX keeps the best performance and scaling towards 144 threads owing to its efficient and NUMA-aware use of HTM.  ... 
doi:10.1145/3342195.3387527 dblp:conf/eurosys/ParkMDY20 fatcat:l3lo6xnmdfe5vlgeyfcmzmn2im

On designing NUMA-aware concurrency control for scalable transactional memory

Mohamed Mohamedin, Roberto Palmieri, Sebastiano Peluso, Binoy Ravindran
2016 Proceedings of the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming - PPoPP '16  
Therefore in this paper we present a NUMA-aware concurrency control for transactional memory that we designed for promoting scalability in scenarios where both the transactional workload is prone to scale  ...  , and the characteristics of the underlying memory model are inherently non-uniform, such as NUMA architectures.  ...  Overview Transactional Memory (TM) [8] is a powerful programming abstraction for implementing concurrent applications.  ... 
doi:10.1145/2851141.2851189 dblp:conf/ppopp/MohamedinPPR16 fatcat:ncghvvppzjapfiauzcqypsskim

Hardware tansactional memory support for lightweight dynamic language evolution

Nicholas Riley, Craig Zilles
2006 Companion to the 21st ACM SIGPLAN conference on Object-oriented programming systems, languages, and applications - OOPSLA '06  
To explore these ideas, we constructed a full-system simulation infrastructure consisting of an HTM implementation, modified Linux kernel and Python interpreter.  ...  We eliminate common transactional conflicts and defer I/O within transactions to make parallel Python execution both possible and efficient.  ...  ., [4, 18, 22] ) implementations of transactional memory.  ... 
doi:10.1145/1176617.1176758 dblp:conf/oopsla/RileyZ06 fatcat:ghn7hmicevdh7plv7yosemiddi

Transactional Memory Today [chapter]

Maurice Herlihy
2010 Lecture Notes in Computer Science  
The term "Transactional Memory" was coined back in 1993, but even today, there is a vigorous debate about what it means and what it should do.  ...  TM itself can encompass hardware, software, speculative lock elision, and other mechanisms.  ...  Lock Elision Transactions can also be used as a way to implement locking.  ... 
doi:10.1007/978-3-642-11659-9_1 fatcat:cihqs2idzzamdegkk7xn662cpy

Concurrent transformation components using contention context sensors

Erik Österlund, Welf Löwe
2014 Proceedings of the 29th ACM/IEEE international conference on Automated software engineering - ASE '14  
., conservatively use thread-safe components to assure consistency of their data, while deferring implementation and optimization decisions to contentioncontext-aware composition at runtime.  ...  Based on the thread contention monitored at runtime, context-aware composition and optimization select the appropriate mechanism.  ...  Transactional Memory Analogous to database transactions, Transactional Memory guarantees sequences of load and store instructions to execute in an atomic way.  ... 
doi:10.1145/2642937.2642995 dblp:conf/kbse/OsterlundL14 fatcat:hnngcccecvedpo47wb3enhzyue

To lock, swap, or elide

Darko Makreshanski, Justin Levandoski, Ryan Stutsman
2015 Proceedings of the VLDB Endowment  
The release of hardware transactional memory (HTM) in commodity CPUs has major implications on the design and implementation of main-memory databases, especially on the architecture of highperformance  ...  Our study uses two state-of-the-art index implementations: a memory-optimized B-tree extended with HTM to provide multi-threaded concurrency and the Bw-tree lock-free B-tree used in several Microsoft production  ...  We are not aware of work that investigates mixing non-transactional code with an existing best-effort HTM implementation, such as Intel's TSX.  ... 
doi:10.14778/2809974.2809990 fatcat:io6bn72bpbeppgnwh44onkdnoa
« Previous Showing results 1 — 15 out of 15,938 results