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Adding For-Loops to First-Order Logic

Frank Neven, Martin Otto, Jurek Tyszkiewicz, Jan Van den Bussche
2001 Information and Computation  
We also study FO(FOR): the extension of first-order logic with a for-loop variant of the partial fixpoint operator.  ...  C 2001 Academic Press 157 the extension of first-order logic with the least fixpoint operator; we denote this logic here by FO(LFP).  ...  In the FOR world, however, the fragment with first-order polynomial bodies is weaker than the logic with arbitrary first-order bodies.  ... 
doi:10.1006/inco.2000.2961 fatcat:45ubt7akdrcmzm35ftbj35kp2e

Adding For-Loops to First-Order Logic [chapter]

Frank Neven, Martin Otto, Jurek Tyszkiewicz, Jan Van den Bussche
1999 Lecture Notes in Computer Science  
We also study FO(FOR): the extension of first-order logic with a for-loop variant of the partial fixpoint operator.  ...  C 2001 Academic Press 157 the extension of first-order logic with the least fixpoint operator; we denote this logic here by FO(LFP).  ...  In the FOR world, however, the fragment with first-order polynomial bodies is weaker than the logic with arbitrary first-order bodies.  ... 
doi:10.1007/3-540-49257-7_5 fatcat:7ybp5osji5bkdfwk7bcjiyiu5i

Study on the structure and algorithm of a feedback fuzzy controller

Sheng-li Qu, Bo Qian, Xin-zhi Zhu, Wen-long Xu
2008 2008 IEEE Conference on Cybernetics and Intelligent Systems  
The results show that the performances of the control systems with the first-order dynamic fuzzy logic controller, especially the robustness of resisting uncertainty and anti-timedelay, are much better  ...  the first-order dynamic fuzzy controller and six new corresponding fuzzy inference rules are given.  ...  In figure 3 it is shown that the six added rules in the first-order DFLC are able to reduce the oscillation obviously. results also indicate that the performances of the control system with the first-order  ... 
doi:10.1109/iccis.2008.4670825 fatcat:ln2y5jgcyvb2hbpyutmoretbza

Symbolic Computation and Automated Reasoning for Program Analysis [chapter]

Laura Kovács
2016 Lecture Notes in Computer Science  
These extensions allow us to express program properties directly in first-order logic and hence use further first-order theorem provers to reason about program properties.  ...  For doing so, we use saturation-based first-order theorem proving and extend first-order provers with support for program analysis.  ...  These extensions allow us to express program properties directly in first-order logic and hence use further first-order theorem provers to reason about program properties.  ... 
doi:10.1007/978-3-319-33693-0_2 fatcat:hyz76ibeuva2djyyejvvs2dbtu

Automating control for logic programs

Lee Naish
1985 The Journal of Logic Programming  
Heuristics for the control of data-base and recursive procedures are given, which lead to algorithms for generating control information These algorithms can be incorporated into a >reprocessor for logic  ...  A model for the coroutined execution of PROLOG programs is presented, and two control primitives are described.  ...  The author wishes to thank John Lloyd, Maurice Bruynooghe, Rodney Topor and Jean-Louis Lassez for comments on earlier drafts of this paper.  ... 
doi:10.1016/0743-1066(85)90017-2 fatcat:b5k24umnrbazvkmfxbkogxhnvq

On Recurrent Neural Network Based Theorem Prover For First Order Minimal Logic

Ashot Baghdasaryan, Hovhannes Bolibekyan
2021 Journal of universal computer science (Online)  
There are three main problems for theorem proving with a standard cut-free system for the first order minimal logic. The first problem is the possibility of looping.  ...  New systems with history mechanisms were introduced for solving the looping problems of automated theorem provers in the first order minimal logic.  ...  In order to have a system for first-order minimal logic, propositional fragment have to be extended with first-order rules. [ Alemi et al. 2016 ], [Bridge et al. 2014 ] and [Kaliszyk et al. 2017] show  ... 
doi:10.3897/jucs.76563 fatcat:kse2yoqvmrgxvcm2252b3ouafe

Efficient and flexible simulation of phase locked loops, part I: Simulator design

Daniel Y. Abramovitch
2008 2008 American Control Conference  
Although phase-locked loops (PLLs) are arguably the most ubiquitous control loop designed by humans, system theory analysis seems to lag behind the practice of implementation.  ...  This paper will explain the reasons for this and offer an efficient and flexible simulator for PLLs. This part presents the simulator requirements and design.  ...  There are classes for logic gates, latches, and flip-flops. These include the ability to add first order dynamics (transport lag and propagation delay) to each of these objects.  ... 
doi:10.1109/acc.2008.4587232 dblp:conf/amcc/Abramovitch08 fatcat:mudfxdkgujdbbbehpcn7c5gzyu

Page 5200 of Mathematical Reviews Vol. , Issue 2002G [page]

2002 Mathematical Reviews  
for-loops to first-order logic.  ...  This paper examines the expressive power of this extension, and of an alternative extension of first-order logic itself with for-loops, called FO(FOR).  ... 

Dynamic synthesis of program invariants using genetic programming

Luigi Cardamone, Andrea Mocci, Carlo Ghezzi
2011 2011 IEEE Congress of Evolutionary Computation (CEC)  
Logic formulae are used to represent the program's state and transformation rules describe the effect of statement executions on the program's state.  ...  The effect of a loop is therefore abstracted into a loop invariant, whose derivation cannot in general be automated and requires human ingenuity.  ...  Representation of Logical Formulae The representation of the logical formula is based on a subset of First Order Logic.  ... 
doi:10.1109/cec.2011.5949677 dblp:conf/cec/CardamoneMG11 fatcat:ootfxzhcfjacrpx2bqi4nm2lue

Verifying properties of well-founded linked lists

Shuvendu K. Lahiri, Shaz Qadeer
2006 SIGPLAN notices  
We use our induction principle to derive from two basic axioms a small set of additional first-order axioms that are useful for proving the correctness of several programs.  ...  To prove program properties and the instrumented assertions, we provide a first-order axiomatization of our two predicates.  ...  Acknowledgements We are grateful to Venkatesan Guruswami for his help in proving Lemma 1 and to Thomas Ball for his insightful comments on this paper.  ... 
doi:10.1145/1111320.1111048 fatcat:gcmimmuwvnfjhdrz6w5cvcg4ue

Simulating reachability using first-order logic with applications to verification of linked data structures

Tal Lev-Ami, Neil Immerman, Thomas Reps, Mooly Sagiv, Siddharth Srivastava, Greta Yorsh, Pierre Wolper
2009 Logical Methods in Computer Science  
This paper shows how to harness existing theorem provers for first-order logic to automatically verify safety properties of imperative programs that perform dynamic storage allocation and destructive updating  ...  The main technical contributions are methods for simulating reachability in a conservative way using first-order formulas--the formulas describe a superset of the set of program states that would be specified  ...  Even simple decidable fragments of first-order logic become undecidable when reachability is added [2, 3] .  ... 
doi:10.2168/lmcs-5(2:12)2009 fatcat:6jnbgs673vah7gvezkz44lf4gq

Case Studies on Invariant Generation Using a Saturation Theorem Prover [chapter]

Kryštof Hoder, Laura Kovács, Andrei Voronkov
2011 Lecture Notes in Computer Science  
In this paper we evaluate a program analysis method, called symbol elimination, that uses firstorder theorem proving techniques to automatically discover non-trivial program properties.  ...  These two properties are first-order properties, that is, they can be expressed in first-order logic.  ...  Moreover, one needs a theorem prover able to deal with theories (e.g. integer arithmetic), first-order logic, and generate consequences.  ... 
doi:10.1007/978-3-642-25324-9_1 fatcat:ht36kixdvvgzvbdoeohs24v5bm

Ordered completion for first-order logic programs on finite structures

Vernon Asuncion, Fangzhen Lin, Yan Zhang, Yi Zhou
2012 Artificial Intelligence  
In this paper, we propose a translation from normal first-order logic programs under the stable model semantics to first-order sentences on finite structures.  ...  The translation is done through, what we call, ordered completion which is a modification of Clark's completion with some auxiliary predicates added to keep track of the derivation order.  ...  Acknowledgements We would like to thank the anonymous reviewers for their valuable comments.  ... 
doi:10.1016/j.artint.2011.11.001 fatcat:jcxsbjdt5zg7hkoui7wj37cepm

Hoare Logics for Time Bounds [chapter]

Maximilian P. L. Haslbeck, Tobias Nipkow
2018 Lecture Notes in Computer Science  
We study three different Hoare logics for reasoning about time bounds of imperative programs and formalize them in Isabelle/HOL: a classical Hoare like logic due to Nielson, a logic with potentials due  ...  to Carbonneaux et al. and a separation logic following work by Atkey, Chaguérand and Pottier.  ...  The time e to execute the whole loop must be an upper bound for the time e to execute the loop body plus the time e to execute the remaining loop iteration; the 1+ accounts for evaluation of b.  ... 
doi:10.1007/978-3-319-89960-2_9 fatcat:kxhvl5opirb4dhrhodxzymmdm4

Reduction of minimum operating voltage (VDDmin) of CMOS logic circuits with post-fabrication automatically selective charge injection

Kentaro Honda, Katsuyuki Ikeuchi, Masahiro Nomura, Makoto Takamiya, Takayasu Sakurai
2011 IEEE/ACM International Symposium on Low Power Electronics and Design  
In the new circuit, switches are added to combinational logic circuits in order to turn them into latch loops.  ...  By applying the proposed scheme to 96stage inverter chain fabricated in 65-nm CMOS, the measured reduction of V DDmin from 94mV to 74mV is successfully demonstrated for the first time.  ...  Figs. 2(b) and (c) show schematics of the proposed logic circuit with the automatically selective charge injection scheme, where switches are added to combinational logic circuits in order to turn them  ... 
doi:10.1109/islped.2011.5993632 fatcat:3rn3fk56pbf63aa5bytgknvsli
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