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Adaptive lock-free maps: purely-functional to scalable
2015
Proceedings of the 20th ACM SIGPLAN International Conference on Functional Programming - ICFP 2015
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We provide a way to retain the benefits of these pure-ina-box data structures while dynamically converting to a more scalable lock-free data structure under contention. ...
Our solution scales to any pair of pure and lock-free container types with key/value set semantics, while retaining lock-freedom. ...
Adaptation Algorithm In this section we present our algorithm for lifting a pair of data structures-pure and lock-free respectively-into a hybrid structure that retains lock-freedom. ...
doi:10.1145/2784731.2784734
dblp:conf/icfp/NewtonFV15
fatcat:y2ky4sonxjdydmphoqtqzc4fa4
Adaptive lock-free maps: purely-functional to scalable
2015
SIGPLAN notices
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We provide a way to retain the benefits of these pure-ina-box data structures while dynamically converting to a more scalable lock-free data structure under contention. ...
Our solution scales to any pair of pure and lock-free container types with key/value set semantics, while retaining lock-freedom. ...
Adaptation Algorithm In this section we present our algorithm for lifting a pair of data structures-pure and lock-free respectively-into a hybrid structure that retains lock-freedom. ...
doi:10.1145/2858949.2784734
fatcat:uactka4jkbho5cr7al463fvyyu
Adaptive lock-free data structures in Haskell: a general method for concurrent implementation swapping
2017
Proceedings of the 10th ACM SIGPLAN International Symposium on Haskell - Haskell 2017
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2017 pre-print arXiv:1708.02318v1 fatcat:rkyyxhtxivernhh4wd5o7zxo6a
In this paper, we present an algorithm for lifting plain to adaptive data and prove that the resulting hybrid data structure is itself lock-free, linearizable, and simulates the original. ...
We generalize this approach to augment an arbitrary lock-free data structure with the ability to gradually freeze and optionally transition to a new representation. ...
Adaptive data, prior work: Previous work by leverages the snapshot benefit of immutable data in a mutable container, presenting an algorithm to transition from purely functional map implementations to ...
doi:10.1145/3122955.3122973
dblp:conf/haskell/ChenCN17
fatcat:apsdgzcmrjeg7lftg6w6y4xtsa
A tale of lock-free agents: towards Software Transactional Memory in parallel Agent-Based Simulation
2019
Complex Adaptive Systems Modeling
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Therefore, in this paper we propose the use of a lock-free approach to parallel ABS using Software Transactional Memory (STM) in conjunction with the pure functional programming language Haskell, which ...
We show that the lock-free STM implementations consistently outperform the lock-based ones and scale much better to increasing number of CPU cores both on local hardware and on Amazon EC. ...
Acknowledgements The authors would like to thank J. Hey and M. Handley for constructive feedback, comments and valuable discussions. ...
doi:10.1186/s40294-019-0067-9
fatcat:5fuv3e75onfqfkvmjpi67mvdde
The Shared Map pattern
2010
Proceedings of the 2010 Workshop on Parallel Programming Patterns - ParaPLoP '10
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Although presented here as a standalone pattern, Shared Map belongs to an extensive design pattern language for engineering parallel software. ...
The solution presents a variety of techniques that trade off implementation complexity for scalability and performance. ...
ACKNOWLEDGEMENTS The author is grateful to Tim Mattson, Berna Massingill, Ralph Johnson, Kurt Keutzer, and the participants of the ParaPloP'10 writers workshop for many helpful comments. ...
doi:10.1145/1953611.1953625
fatcat:pygti3nj3vbdjdsvemgvplyyfq
CedrusDB: Persistent Key-Value Store with Memory-Mapped Lazy-Trie
[article]
2021
arXiv
pre-print
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performance under failure-free conditions while still being able to recover from failures. ...
The lazy-trie is kept on disk while made available in memory using standard memory-mapping. ...
HOT [6] uses an adaptive number of children for each node. ...
arXiv:2005.13762v3
fatcat:wkbsap2jbjf67eyesbc6zis4du
Multi-Resolution 3D Mapping with Explicit Free Space Representation for Fast and Accurate Mobile Robot Motion Planning
[article]
2021
arXiv
pre-print
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2020 pre-print arXiv:2010.07929v4 fatcat:wrjhu63tvneh5cfickfc2za5q4Other Versions
Instead of a Truncated Signed Distance Function (TSDF), we adopt mapping of occupancy probabilities in log-odds representation, which allows to represent both surfaces, as well as the entire free, i.e. ...
With the aim of bridging the gap between high quality reconstruction and mobile robot motion planning, we propose an efficient system that leverages the concept of adaptive-resolution volumetric mapping ...
To improve scalability, several extensions to the original algorithm have been proposed. ...
arXiv:2010.07929v5
fatcat:as2eaqmg6zgg7j46zxmklzm2v4
Spaceborne laser instruments for high-resolution mapping
2010
Solid State Lasers XIX: Technology and Devices
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We report ytterbium-based disk amplifier for USPL using edgepumped architecture and offering excellent scalability to high-average power in kW-range. ...
All resulting visible lasers are single-axial-frequency with FWHM bandwidths less than 200 kHz, and are spatially pure with M² values less than 1.05. ...
The coherent locking approach is highly scalable. ...
doi:10.1117/12.843191
fatcat:6ouzsdkdknh63ordfsktdz3lqq
Mapping the BCPNN Learning Rule to a Memristor Model
2021
Frontiers in Neuroscience
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In this paper, the BCPNN learning rule is mapped to a memristor model and implemented with a memristor-based architecture. ...
This work focuses on demonstrating the feasibility of mapping the BCPNN learning rule to in-circuit computation in memristor. ...
All authors contributed to the article and approved the submitted version. ...
doi:10.3389/fnins.2021.750458
pmid:34955716
pmcid:PMC8695980
fatcat:qvj6nuzanrbupl2ohuoqt6iwju
Parallel Tracking and Mapping on a camera phone
2009
2009 8th IEEE International Symposium on Mixed and Augmented Reality
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We describe a series of adaptations to the Parallel Tracking and Mapping system to mitigate the impact of the device's imaging deficiencies. ...
Early results demonstrate a system capable of generating and augmenting small maps, albeit with reduced accuracy and robustness compared to SLAM on a PC. * ...
Perhaps a work-flow by which the user initially maps out a workspace and then locks the map for tracking would be acceptable. ...
doi:10.1109/ismar.2009.5336495
dblp:conf/ismar/KleinM09
fatcat:nohuszgq6ffx3jjpfkvz5o3ria
Parallel sections
2016
Proceedings of the Eleventh European Conference on Computer Systems - EuroSys '16
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We show that the co-management of scalable memory reclamation, memory allocation, locking, and namespace management enables scalable system service implementation. ...
Fundamental to the approach is a new form of scalable memory reclamation that leverages fast local access to real-time to globally order system events. ...
We'd also like to thank Samy Bahra, the author of the Concurrency Kit, for his useful feedback throughout the process. ...
doi:10.1145/2901318.2901356
dblp:conf/eurosys/WangSP16
fatcat:4r3onu5zynee3fh5fet6tpjzda
Mapping Human Pluripotent-to-Cardiomyocyte Differentiation: Methylomes, Transcriptomes, and Exon DNA Methylation "Memories"
2016
EBioMedicine
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Here, we utilize a human embryonic stem cell suspension bank, produced according to a good manufacturing practice, to generate CMs using a fully defined and small molecule-based differentiation strategy ...
Primitive and cardiac mesoderm purification was used to remove non-committing and multi-lineage populations and this significantly aided the identification of key transcription factors, lncRNAs, and essential ...
Acknowledgments We would like to thank City of Hope's Analytical Cytometry and Integrative Genomics Core. This work was supported in part by CIRM TG2-01150. ...
doi:10.1016/j.ebiom.2016.01.021
pmid:26981572
pmcid:PMC4776252
fatcat:ca4uxyiawzaxpgplgm5buoiw34
A flexible data to L2 cache mapping approach for future multicore processors
2006
Proceedings of the 2006 workshop on Memory system performance and correctness - MSPC '06
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This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. ...
L2 cache management is a crucial multicore processor design aspect to overcome non-uniform cache access latency for high program performance and to reduce on-chip network traffic and related power consumption ...
The commonly used mapping function is a modulo-N function, where N is the number of available cache slices [16, 21, 26] . ...
doi:10.1145/1178597.1178613
dblp:conf/ACMmsp/JinLC06
fatcat:3puyalgmtvao7fzvbm2yzigqzm
Scalable large-scale fluid-structure interaction solvers in the Uintah framework via hybrid task-based parallelism algorithms
2013
Concurrency and Computation
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This scalability challenge is addressed here for Uintah, by the development of new hybrid runtime and scheduling algorithms combined with novel lock-free data structures, making it possible for Uintah ...
Uintah has been shown to scale successfully with many fluid and solid problems with adaptive meshes [12, 13] ; however, the scalability of fluid-structure interaction problems has proven to be somewhat ...
Finally, we would like to thank the reviewers for helping to improve the paper by their helpful and perceptive comments. ...
doi:10.1002/cpe.3099
fatcat:pssnumvxivaovhsiw3u7dk4lye
Queue-Based and Adaptive Lock Algorithms for Scalable Resource Allocation on Shared-Memory Multiprocessors
2014
International journal of parallel programming
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We present a scalable lock algorithm and an adaptive scheme for sharedmemory multiprocessors addressing the resource allocation problem, which is also known as the h-out-of-k mutual exclusion problem. ...
In our experimental evaluation we compared the overhead and scalability of our lock to the best available alternative approaches using a micro-benchmark. ...
The authors would also like to thank Dimitry Vyukov for providing insightful implementation tips on the non-blocking queue. ...
doi:10.1007/s10766-014-0317-6
fatcat:5waj5ideqfharlijwbbvpjid2q
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