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Optimizing CNN-based Hyperspectral Image Classification on FPGAs [article]

Shuanglong Liu, Ringo S.W. Chu, Xiwei Wang, Wayne Luk
2019 arXiv   pre-print
Besides, previous CNN models used in HSI are not specially designed for efficient implementation on embedded devices such as FPGAs.  ...  A customized architecture which enables the proposed algorithm to be mapped effectively onto FPGA resources is then proposed to support real-time on-board classification with low power consumption.  ...  Dropout is applied on the fully-connected layers in block 3 to prevent over-fitting. Loss functions We employ cross-entropy loss function as error measure.  ... 
arXiv:1906.11834v1 fatcat:arcbhexooja6hhmm4j5z4sgbei

Acceleration of FPGA based Convolutional Neural Network for Human Activity Classification using Millimeter-Wave Radar

Peng Lei, Jiawei Liang, Zhenyu Guan, Jun Wang, Tong Zheng
2019 IEEE Access  
In this paper, we investigate an acceleration method of the convolutional neural network (CNN) on the field-programmable gate array (FPGA) for the embedded application of the millimeter-wave (mmW) radar-based  ...  decision to accelerate the CNN execution.  ...  Section III describes the CNN architecture with forward-propagation procedure. The acceleration method of CNN based the human activity classification on FPGA is presented in Section IV.  ... 
doi:10.1109/access.2019.2926381 fatcat:qgifhcib65ggnnsod6w3semike

Recent Advances in Convolutional Neural Network Acceleration [article]

Qianru Zhang, Meng Zhang, Tinghuan Chen, Zhifei Sun, Yuzhe Ma, Bei Yu
2018 arXiv   pre-print
At last, we give a discussion on different perspectives of these acceleration and optimization methods within each level.  ...  We also analyze the acceleration methods in terms of CNN architecture compression, algorithm optimization, and hardware-based improvement.  ...  Therefore, it is challenging in acceleration performance evaluation as well. Figure 1 : 1 Illustration of LeNet-5. Figure 2 : 2 Activation function plot.  ... 
arXiv:1807.08596v1 fatcat:jx66ekaofjhqzdbaueal476bvi

Environmental Sound Recognition on Embedded Systems: From FPGAs to TPUs

Jurgen Vandendriessche, Nick Wouters, Bruno da Silva, Mimoun Lamrini, Mohamed Yassin Chkouri, Abdellah Touhafi
2021 Electronics  
In this work, we evaluate existing tool flows to deploy CNN models on FPGAs as well as on TPU platforms.  ...  We propose and adjust several CNN-based sound classifiers to be embedded on such hardware accelerators.  ...  The result of this sum is used as the input of the so called activation function of that layer. This is a mathematical equation, typically the ReLU function or the sigmoid function.  ... 
doi:10.3390/electronics10212622 fatcat:q5u64r6lzfhlbbotdnqinih5xe

Implementation Strategy of Convolution Neural Networks on Field Programmable Gate Arrays for Appliance Classification Using the Voltage and Current (V-I) Trajectory

Darío Baptista, Sheikh Mostafa, Lucas Pereira, Leonel Sousa, Fernando Morgado-Dias
2018 Energies  
For the implementation on hardware, a field programmable gate array (FPGA) was used to exploit processing parallelism in order to achieve optimal performance.  ...  However, developing a classifier for deducing what kind of appliances are used at home is a difficult assignment, because the system should identify the appliance as fast as possible with a higher degree  ...  In order to achieve this goal, CNNs have convolution and pooling layers accompanied with activation functions and, in the end, there are a fully connected layer with a softmax function [22] .  ... 
doi:10.3390/en11092460 fatcat:aqfoh5so3zfnbcwk5fja4t36na

Applications of Machine Learning

2006 2006 16th IEEE Signal Processing Society Workshop on Machine Learning for Signal Processing  
A general neural network framework was written in VHDL for Xilinx FPGAs. It allows for any neural network to be trained or tested on FPGAs.  ...  In this thesis, many machine learning algorithms were applied to electrocardiogram (ECG), spectral analysis, and Field Programmable Gate Arrays (FPGAs).  ...  The paper, "SpWA: an efficient sparse winograd convolutional neural networks accelerator on FPGAs" [123] , shows a CNN implemented in Vivado HLS.  ... 
doi:10.1109/mlsp.2006.275590 fatcat:qwvkrap4orayvk2tz5fhpyad5e

Accelerating Recurrent Neural Networks for Gravitational Wave Experiments [article]

Zhiqiang Que, Erwei Wang, Umar Marikar, Eric Moreno, Jennifer Ngadiuba, Hamza Javed, Bartłomiej Borzyszkowski, Thea Aarrestad, Vladimir Loncar, Sioni Summers, Maurizio Pierini, Peter Y Cheung (+1 others)
2021 arXiv   pre-print
The proposed approach has been evaluated based on two LSTM models, targeting a ZYNQ 7045 FPGA and a U250 FPGA.  ...  A customizable template for this architecture has been designed, which enables the generation of low-latency FPGA designs with efficient resource utilization using high-level synthesis tools.  ...  However, FPGAs work fast on a single inference with a fully unrolled tailor-made design. Table IV .  ... 
arXiv:2106.14089v1 fatcat:rrz7pzy7t5eoxiag2ioyzgxb5y

Radar Signal Processing for Sensing in Assisted Living: The challenges associated with real-time implementation of emerging algorithms

Julien Le Kernec, Francesco Fioranelli, Chuanwei Ding, Heng Zhao, Li Sun, Hong Hong, Jordane Lorandel, Olivier Romain
2019 IEEE Signal Processing Magazine  
the field of activity recognition (multidomain, multi-modal and fusion) and healthcare applications based on vital signs (super-resolution techniques) and commenting on outstanding challenges.  ...  O. (2019) Radar signal processing for sensing in assisted living: the challenges associated with real-time implementation of emerging algorithms.  ...  Several proposed algorithms exist active learning lies on the partial reconfiguration on FPGA on the fly.  ... 
doi:10.1109/msp.2019.2903715 fatcat:vifhwthbnzhmzf4gc6pbta2gyi

Reservoir Computing based Neural Image Filters [article]

Samiran Ganguly, Yunfei Gu, Yunkun Xie, Mircea R. Stan, Avik W. Ghosh, Nibir K. Dhar
2018 arXiv   pre-print
These FPGAs can be used as "linear algebra" accelerators [24] and in that respect work as a more efficient accelerator than GPU based implementation.  ...  FPGAs can be directly combined with a camera ROIC for implementation of neuro-adaptive signal processing capabilities within the same device with built-in data network independence and resilience.  ... 
arXiv:1809.02651v1 fatcat:zhiom47bnndcpjv66jmlovsvju

Resource-Constrained Machine Learning for ADAS: A Systematic Review

Juan Borrego-Carazo, David Castells-Rufas, Ernesto Biempica, Jordi Carrabina
2020 IEEE Access  
The usual solution consists in adapting the ML models to comply with the memory and real-time (RT) requirements for inference.  ...  These methods mainly focus on specific problems ranging from traffic sign and light recognition to pedestrian detection.  ...  the computation of the activation function.  ... 
doi:10.1109/access.2020.2976513 fatcat:mgoek62t6zhp3hikgqv36ibpua

A Survey of Domain-Specific Architectures for Reinforcement Learning

Marc Rothmann, Mario Porrmann
2022 IEEE Access  
However, their training is often timeconsuming, with training times ranging from multiple hours to weeks.  ...  This paper presents a review of hardware architectures for the acceleration of reinforcement learning algorithms.  ...  For example, [92] and [29] implement frameworks for CNN training on FPGAs, and [76] explores the training of LSTM layers on FPGAs.  ... 
doi:10.1109/access.2022.3146518 fatcat:ufrhsktrkza2jjjoi6kdm23rgi

CNN Variants for Computer Vision: History, Architecture, Application, Challenges and Future Scope

Dulari Bhatt, Chirag Patel, Hardik Talsania, Jigar Patel, Rasmika Vaghela, Sharnil Pandya, Kirit Modi, Hemant Ghayvat
2021 Electronics  
Several inspirational concepts for the progress of CNN have been investigated, including alternative activation functions, regularization, parameter optimization, and architectural advances.  ...  This survey paper focuses mainly on the primary taxonomy and newly released deep CNN architectures, and it divides numerous recent developments in CNN architectures into eight groups.  ...  (it depends on the activation function). The activation functions can be categorized into two types: 1. Linear Activation Function This uses function F(x) = CY.  ... 
doi:10.3390/electronics10202470 fatcat:aqhrysjtbjagzl6byalgy2du5a

Applications and Techniques for Fast Machine Learning in Science [article]

Allison McCarn Deiana, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier Duarte, Philip Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci-Memik, Maurizio Pierini (+74 others)
2021 arXiv   pre-print
The material for the report builds on two workshops held by the Fast ML for Science community and covers three main areas: applications for fast ML across a number of scientific domains; techniques for  ...  This community report is intended to give plenty of examples and inspiration for scientific discovery through integrated and accelerated ML solutions.  ...  The hls4ml library currently provides support for several commonly used neural network layers like fully connected, convolutional, batch normalization, pooling, as well as several activation functions.  ... 
arXiv:2110.13041v1 fatcat:cvbo2hmfgfcuxi7abezypw2qrm

RADAR 2019 Author Index

2019 2019 International Radar Conference (RADAR)  
Using pix2pix network derived from cGAN submission_218 LI Hongbo Neural network with different activation function in polarimetric SAR image Classification submission_155 LI Hongbo A Spectrum  ...  Noisy Micro-Doppler Signatures submission_252 HUA Qinglong Neural network with different activation function in polarimetric SAR image Classification submission_155 RADAR 2019 10/24 NOM Prénom  ... 
doi:10.1109/radar41533.2019.9078992 fatcat:qgj7mi5yrfc7ti5qz6he5n4xvm

QCNN Inspired Reconfigurable Keyword Spotting Processor With Hybrid Data-Weight Reuse Methods

Yu Gong, Yan Li, Xiaoling Ding, Haichuan Yang, Zilong Zhang, Xuan Zhang, Wei Ge, Zhen Wang, Bo Liu
2020 IEEE Access  
Firstly, the approach to quantize CNNs into QCNNs with high accuracy is proposed with considerations of hardware-software tradeoff.  ...  Implemented and verified under TSMC 22nm ULL technology, with the area of 1.42mm 2 , the QCNN accelerator can achieve 5.26µW/9.08µW power consumption in 4bit/8bit work mode with accuracy of 88% and 93%  ...  He is currently pursuing the M.S. degree in digital IC design and neural network accelerator design based on FPGA with Southeast University, Nanjing, China.  ... 
doi:10.1109/access.2020.3037931 fatcat:ybmsc35v6vg3fj4fihknxnmm2i
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