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Accelerating database operators using a network processor

Brian Gold, Anastassia Ailamaki, Larry Huston, Babak Falsafi
2005 Proceedings of the 1st international workshop on Data management on new hardware - DAMON '05  
Using an Intel IXP2400 network processor, we evaluate the performance of three key database operations and demonstrate improvements of 1.9X to 2.5X when compared to a generalpurpose processor.  ...  This paper shows an existing hardware architecture-the network processor-already fits the model for multi-threaded, multi-core execution.  ...  A number of recent papers have explored the use of graphics processors in the execution of database operators [5, 11, 22] .  ... 
doi:10.1145/1114252.1114260 fatcat:dm7ub4pxhrhkrpdcrsb6jzo6ea

Query Co-Processing on Commodity Hardware

A. Ailamaki, N.K. Govindaraju, D. Manocha
2006 22nd International Conference on Data Engineering (ICDE'06)  
Network processors, which are used to handle network traffic and routing, are actually well-suited for executing many relational operators.  ...  Network co-Processors: Unlike most scientific applications, database operations exhibit sequences of dependent memory accesses, which limit the opportunity for speculation and out-of-order execution to  ...  Network processors, which are used to handle network traffic and routing, are actually well-suited for executing many relational operators.  ... 
doi:10.1109/icde.2006.122 dblp:conf/icde/AilamakiGM06 fatcat:x3rdgytg3fcwlgld6ctgc32vxu

Novel graph processor architecture, prototype system, and results

William S. Song, Vitaliy Gleyzer, Alexei Lomakin, Jeremy Kepner
2016 2016 IEEE High Performance Extreme Computing Conference (HPEC)  
Graph algorithms are increasingly used in applications that exploit large databases.  ...  Our processor utilizes innovations that include a sparse matrix-based graph instruction set, a cacheless memory system, accelerator-based architecture, a systolic sorter, high-bandwidth multi-dimensional  ...  Before a sparse matrix operation, the controller module loads the control variables into the control registers and control memory of the accelerator modules by using the local control bus.  ... 
doi:10.1109/hpec.2016.7761635 dblp:conf/hpec/SongGLK16 fatcat:ck3bis6krrf2fivbvs6dzaaxbi

ACCELERATOR CONTROLS AND MODELING [chapter]

JEFF CORBETT, CLEMENS WERMELSKIRCHEN
1995 Synchrotron Radiation Sources — A Primer  
Control System Overview A general function of the accelerator control system is to establish coordination between all hardware components, so that the goal of the accelerator, to control a charged particle  ...  Specifically, the goal of an accelerator may be to produce electrons (or ions) in a beam with short pulse duration, or a beam stored for a long period of time, but the basic requirements of the control  ...  Networks The components of accelerator control systems are linked by a network to transmit data. A wide variety of technologies are used for these networks.  ... 
doi:10.1142/9789812831750_0009 fatcat:mdks4kajjfhslp6rtakwdymvjy

Page 65 of Journal of Research and Practice in Information Technology Vol. 16, Issue 2 [page]

1984 Journal of Research and Practice in Information Technology  
Britton-Lee claim throughput perfor- mance improvement in the range 2 to 10 through use of an accelerator. The bus permits a maximum configuration of sixteen processor and memory modules.  ...  Experiments With a Database Machine Performance The access mechanism used to enhance retrieval per- formance is the B-tree index.  ... 

Managing Heterogeneous Processor Machine Dependencies in Computer Network Applications [chapter]

Ralph Duncan, Peder Jungck, Kenneth Ross, Jim Frandeen, Greg Triplett
2014 Lecture Notes in Computer Science  
Executing complex network packet applications typically requires using network processors and parallel processing to handle packet transmission speeds of 1 gigabit per second and beyond.  ...  Our initial contribution to realizing these goals involves (1) expressing classic packet operations in a C dialect as C/C++-style operators; (2) compiling user code into bytecodes for a packet-processing  ...  Leupers describe a processor-specific C dialect geared to the Infineon network processor in [12] .  ... 
doi:10.1007/978-3-642-54420-0_28 fatcat:vsphqx2xb5fypb3vyeviz5wszy

A 201.4 GOPS 496 mW Real-Time Multi-Object Recognition Processor With Bio-Inspired Neural Perception Engine

Joo-Young Kim, Minsu Kim, Seungjin Lee, Jinwook Oh, Kwanho Kim, Hoi-Jun Yoo
2010 IEEE Journal of Solid-State Circuits  
A 201.4 GOPS real-time multi-object recognition processor is presented with a three-stage pipelined architecture.  ...  In addition, a 118.4 GB/s multi-casting network-on-chip is proposed for communication architecture with incorporating overall 21 IP blocks.  ...  In the proposed processor, the DP accelerates the vector matching to make the object decision stage to be operated over 60 frame/sec frame rate for the database including more than 15,000 vectors.  ... 
doi:10.1109/jssc.2009.2031768 fatcat:343tnykb7zd5dgpuz5pjdxuboi

Reconfigurable Hardware Accelerators: Opportunities, Trends, and Challenges [article]

Chao Wang, Wenqi Lou, Lei Gong, Lihui Jin, Luchao Tan, Yahui Hu, Xi Li, Xuehai Zhou
2017 arXiv   pre-print
Nowadays, in top-tier conferences of computer architecture, emerging a batch of accelerating works based on FPGA or other reconfigurable architectures.  ...  In the end, we prospect the development tendency of accelerator architectures in the future, hoping to provide a reference for computer architecture researchers.  ...  Hashing is a rather critical and frequently-used operation in database applications. Consequently, FPGAs for accelerating hashing is widely used in web applications.  ... 
arXiv:1712.04771v1 fatcat:3lxv45qb4zaqpagtn3eghrmroe

Accelerating Database Systems Using FPGAs: A Survey

Philippos Papaphilippou, Wayne Luk
2018 2018 28th International Conference on Field Programmable Logic and Applications (FPL)  
This survey presents a systematic review of research relating to accelerating analytical database systems using FPGAs.  ...  The review includes studies of database acceleration frameworks and accelerator implementations for various database operators.  ...  INTRODUCTION While the use of FPGAs in accelerating database operations has been explored for a long time [1] , reports about their application to accelerating industrial-scale databases have only emerged  ... 
doi:10.1109/fpl.2018.00030 dblp:conf/fpl/PapaphilippouL18 fatcat:gcnfescocngjbkdysdzj3rhpvy

Associative Memories and Processors: The Exact Match Paradigm

Sateh M. Jalaleddine
1999 Journal of King Saud University: Computer and Information Sciences  
Recent development in associative processing applications are also discussed which include fast routing in communication networks, memory management, database management, image processing, and artificial  ...  A classification of the diverse associative computing architectures is presented.  ...  Relational database machines are dedicated computing engines which accelerate relational operations such as Selection, Projection, Join, and Set operations.  ... 
doi:10.1016/s1319-1578(99)80003-2 fatcat:b2vlhax5gzgpbd7hnxejhtrjqm

Design and Implementation of Rough Set Algorithms on FPGA: A Survey

Kanchan Shailendra, Ashwin. G.
2014 International Journal of Advanced Research in Artificial Intelligence (IJARAI)  
The algorithms implemented on a conventional processor using any standard software routine offers high flexibility but the performance deteriorates while handling larger real time databases.  ...  Conventional Rough set information processing like discovering data dependencies, data reduction, and approximate set classification involves the use of software running on general purpose processor.  ...  The advantage of using a dedicated hardware is huge acceleration in terms of speed as they relieve main processor from the computational overheads.  ... 
doi:10.14569/ijarai.2014.030903 fatcat:t4wxelzcizau7f4txgf2iekleq

Making the gigabit IPsec VPN architecture secure

R. Friend
2004 Computer  
The network processor would use the flow-through device functions in a lookaside architecture.  ...  Most lookaside security processors accelerate the public-key operations, but leave the IKE protocol processing to the host NPU.  ... 
doi:10.1109/mc.2004.30 fatcat:wbd7coplxrfm5aqnuuuqr5fxcy

IBM's PowerEN Developer Cloud: Fertile ground for academic research

Amit Golander, Nancy Greco, Jimi Xenidis, Maria Hyland, Brian Purcell, David Bernstein
2010 2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel  
IBM's newest technology, the Power Edge of Network (PowerEN) processor, merges network and server attributes to create a new class of wire-speed processor.  ...  PowerEN is a hybrid computer that employs: massive multithreading capabilities, integrated I/O and unique special-purpose accelerators for compression, cryptography, pattern matching, XML and Network processing  ...  Using an XML accelerator may make it more cost efficient to store and query XML documents in a database [30] instead of storing preprocessed information in a relational database.  ... 
doi:10.1109/eeei.2010.5662101 fatcat:abeghmheknf3vhfend4hmm2wku

Modern Computational Techniques for the HMMER Sequence Analysis

Xiandong Meng, Yanqing Ji
2013 ISRN Bioinformatics  
acceleration technologies.  ...  The characteristics of the sequence analysis, such as data and compute-intensive natures, make it very attractive to optimize and parallelize by using both traditional software approach and innovated hardware  ...  HMMER has also been accelerated on other specialpurpose processor, such as network processors-JackHMMer [12] , which builds on the Intel IXP 2850 network processor, a heterogeneous multicore chip consisting  ... 
doi:10.1155/2013/252183 pmid:25937944 pmcid:PMC4393056 fatcat:kdo43qa23je4zflfpkvkhoxkfu

FPGAs

Rene Mueller, Jens Teubner
2010 Proceedings of the 13th International Conference on Extending Database Technology - EDBT '10  
With a focus on database use, this tutorial introduces into FPGA technology, demonstrates its potential, but also pinpoints some challenges that need to be addressed before FPGA-accelerated database systems  ...  Our more high-level ambition is to spur a broader interest in database processing on novel hardware technology.  ...  SYSTEM INTEGRATION To make a hardware-accelerated operator implementation accessible to a database system, it has to be wired up to conventional components and connected to, e.g., a generalpurpose CPU.  ... 
doi:10.1145/1739041.1739137 dblp:conf/edbt/MullerT10 fatcat:i5moqwftu5acri624w52jmooiy
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