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Advantage and Possibility of Application-domain Specific Instruction-set Processor (ASIP)

Masaharu Imai, Yoshinori Takeuchi, Keishi Sakanushi, Nagisa Ishiura
2010 IPSJ Transactions on System LSI Design Methodology  
First, VLSI design trend over the decades is overviewed and processors are shown to be expected one of the main components in the System Level Design.  ...  Then, as an ASIP development environment example, ASIP Meister is explained. Next, an application of ASIP to medical and healthcare is introduced.  ...  .), for their effort to develop ASIP Meister. The author would like to thank Mr. Nobuyuki Hikichi from SRA, for his kind assistance and advice to the development of GNU tool set for ASIP Meister.  ... 
doi:10.2197/ipsjtsldm.3.161 fatcat:2utgua4qffep7ih5a2vbrl6lee

ASIP design methodologies: survey and issues

M.K. Jain, M. Balakrishnan, A. Kumar
VLSI Design 2001. Fourteenth International Conference on VLSI Design  
This paper attempts to survey the state of the art in this area and identifies some issues which need to be addressed.  ...  We have identified the five key steps in ASIP design as application analysis, architectural design space exploration, instruction set generation, code synthesis and hardware synthesis.  ...  Similarly issues of pipelined ASIP design as well as low power ASIP design is in its infancy.  ... 
doi:10.1109/icvd.2001.902643 dblp:conf/vlsid/JainBK01 fatcat:f2v2ivpf2rew3avyooadhbt7me

Application of ASIP in Embedded Design with Optimized Clock Management

Mood Venkanna, Rameshwar Rao, P. Chandra Sekhar
2018 Proceedings of the First International Conference on Information Technology and Knowledge Management  
The current case study focuses on an ASIP design methodology considering the classical parameters computational performance and area as well as energy consumption simultaneously.  ...  This enables interest in Application Specific Instruction Processors (ASIPs) design and application considerably. It has higher flexibility as compared to dedicated hardware.  ...  Similarly issues related to pipelined ASIP design and pertaining to low power ASIP design has not been matured yet.  ... 
doi:10.15439/2017km41 dblp:conf/icitkm/VenkannaRS17 fatcat:ui3vmppvhfhxjoh646e2l6jrlm

Comparison between the Simulator and Scheduler based approach of Design Space Exploration for Application Specific Instruction set Processor

M. K.Jain, Deepak Gour
2012 International Journal of Computer Applications  
This paper is an attempt to survey and compare both the mentioned techniques of design space exploration of ASIP.  ...  An ASIP exploits special characteristics of application(s) to meet the desired performance, cost and power requirements.  ...  Table 1 shows the comparison among GPP, ASIP and ASIC. ASIP fits in between these two and provides flexibility at lower cost than general programmable processors.  ... 
doi:10.5120/6098-8290 fatcat:p2byhxibpzc77fu37s7z57rmny

ASAM: Automatic architecture synthesis and application mapping

Lech Jozwiak, Menno Lindwer, Rosilde Corvino, Paolo Meloni, Laura Micconi, Jan Madsen, Erkan Diken, Deepak Gangadharan, Roel Jordans, Sebastiano Pomata, Paul Pop, Giuseppe Tuveri (+2 others)
2013 Microprocessors and microsystems  
Issues and challenges of the ASIP-based MPSoC development The realization of complex and highly demanding applications, for which the presented ASIP technology is suitable, requires Fig. 1.  ...  It explains which system, design, and electronic design automation (EDA) concepts seem to be adequate to address the challenges and solve the problems.  ...  Acknowledgements The research reported in this paper has been performed in the scope of the ASAM project of the European ARTEMIS Research Program and has been partly supported by the ARTEMIS Joint Undertaking  ... 
doi:10.1016/j.micpro.2013.08.006 fatcat:tztiewd7vzfc5jtki2tcwursca

Embedded software in real-time signal processing systems: application and architecture trends

P.G. Paulin, C. Liem, M. Cornero, F. Nacabal, G. Goossens
1997 Proceedings of the IEEE  
A companion paper in this issue [1] presents a comprehensive survey of embedded software development tools, focusing mostly on retargetable software compilation.  ...  His research interests are in the fields of hardware/software co-design, embedded systems, compilation, high-level synthesis, and system-level design tools. Dr.  ...  In many cases, an ASIP is needed in order to attain sufficient performance and/or cost. 4) In all the case studies, high-performance C compilation is an essential part of the design methodology. 5) New  ... 
doi:10.1109/5.558716 fatcat:2kcn3jxw2jdppm2kqln6f7u5sy

Application Specific Hardware Design Simulation for High Performance Embeddeed System

Ravi Khatwal, Manoj Kumar Jain
2014 International Journal of Computer Applications  
Xilinx provides SDK and XPS tools, XPS tools used for develop complete hardware platform and SDK provides software platform for application creation and verification.  ...  Xilinx XUP-5 board have been used and implemented various specific Applications with hardware platform.  ...  [2] proposed survey in ASIP area and identifies some issues which need to be addressed. Hartmann, M., Raghavan, P., Agrawal,P., Dehaene, W.  ... 
doi:10.5120/16834-6599 fatcat:4rbwuni6drdg3lhnidjf4e27fm

A Feasibility Study on Programmer Specific Instruction Set Processors (PSISPs) [article]

T.M.R.L.B. Abeysinghe, N. Hassan, R. G. Ragel
2014 arXiv   pre-print
Thus, designing processors for domains with more similar programs would overcome these issues.  ...  The designing of ASIPs addresses the major challenges faced by a system on chip such as size, cost, performance and energy consumption.  ...  RELATED WORK ASIPs have a history of more than two decades. Most of the related researches concentrate on design issues of ASIPs and their instruction set generation and evaluation.  ... 
arXiv:1412.7692v1 fatcat:qokt64hl4vdnvkmndgg64wyvq4


Deepti Shinghal, Farooq Husain, Shuchita Saxena, Amit Saxena, Kshitij Shinghal
2018 International Journal of Recent Trends in Electrical & Electronics Engineering  
The technological evolution has increased the number of transistors for a given die area significantly and increased the switching speed from few MHz to GHz range.  ...  The study and survey of the different types of adiabatic logic circuits is carried out.  ...  The MetaCore DSP development system [38] is an ASIP style tool that supports style space exploration and design generation.  ... 
doi:10.7323/ijrte.2018.v06i02.004 fatcat:vipbrvfkwfdf5axlhfp2wv2izi

Instruction Set Extensions for Cryptographic Applications: Survey and Issues

Mahendra Singh, Manoj Jain
2014 Journal of Basic and Applied Engineering Research Print   unpublished
This paper is an attempt to survey the available instruction set extensions used in cryptographic applications and to identify some of the issues which needs to be addressed.  ...  Security in data communication is of utmost importance and is achieved using cryptographic algorithms while preserving confidentiality and integrity of data.  ...  These instructions are designed for ensuring fast and secure data encryption and decryption.  ... 

Costum computing machines vs. Hardware/Software Co-Design: From a globalized point of view [chapter]

Reiner W. Hartenstein, Jürgen Becker, Rainer Kress
1996 Lecture Notes in Computer Science  
The paper gives a generalized survey on Customized Computing with research activities of the emerging new research scenes of Application Specific Instruction Set Processors (ASIPs) and Custom Computing  ...  The ASIP scene tries to design an instruction set as an interface between hardware and application closely matching their characteristics. Reiner W.  ...  One key issue determining the success of the mapping is the design of the instruction set, which serves as an interface between the hardware and the application.  ... 
doi:10.1007/3-540-61730-2_7 fatcat:td6e4mto2jaaxixzgf6kxifefa

Microarchitectural Support for Program Code Integrity Monitoring in Application-specific Instruction Set Processors

Yunsi Fei, Z. Jerry Shi
2007 2007 Design, Automation & Test in Europe Conference & Exhibition  
In this work, we present a generalized methodology for monitoring code integrity at run-time in application-specific instruction set processors (ASIPs), where both the instruction set architecture (ISA  ...  ) and the underlying microarchitecture can be customized for a particular application domain.  ...  Sri Parameswaran and Roshan Ragel of the University of New South Wales, Australia for their helpful discussions and suggestions on ASIP Meister usage.  ... 
doi:10.1109/date.2007.364391 dblp:conf/date/FeiS07 fatcat:bj2ouj7trbcdrcdxukuxclg7tq

Rural Community Members' Perceptions of Harm from Medical Mistakes: A High Plains Research Network (HPRN) Study

R. F. Van Vorst, R. Araya-Guerra, M. Felzien, D. Fernald, N. Elder, C. Duclos, J. M. Westfall
2007 Journal of the American Board of Family Medicine  
Discussion: CBPR methodology is an important strategy to design and implement a community-based survey. Community members reported experiencing medical mistakes, most with harmful outcomes.  ...  The High Plains Research Network (HPRN) with its Community Advisory Council (CAC) designed and distributed an anonymous survey through local community newspapers.  ...  We acknowledge the following members of the HPRN CAC for their contributions to the methodology, analysis, and interpretation of findings: Shirley Cowart, Michael Hernandez, Connie Haynes, Garry Haynes  ... 
doi:10.3122/jabfm.2007.02.060147 pmid:17341749 fatcat:g5bktdsvfveq5h2ar4ajgx4cte

Application-Specific Instruction Sets Processor With Implicit Registers To Improve Register Bandwidth

Ginhsuan Li, Chiuyun Hung, Desheng Chen, Yiwen Wang
2011 Zenodo  
One major bottleneck in maximizing ASIP performance is the limitation on the data bandwidth between the General Purpose Register File (GPRF) and ASIs.  ...  Application-Specific Instruction (ASI ) set Processors (ASIP) have become an important design choice for embedded systems due to runtime flexibility, which cannot be provided by custom ASIC solutions.  ...  The research community has expended a considerable amount of effort in the ASIP area for almost a decade. The issues involved in the ASIP design were surveyed in [6] .  ... 
doi:10.5281/zenodo.1081267 fatcat:dhdextormnftrdrllr4idrzsia

CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey [chapter]

Yahya Jan, Lech Jozwiak
2009 Lecture Notes in Computer Science  
design directions are discussed.  ...  The purpose of the survey is to deliver a critical insight in the proposed solutions, and this way facilitate further research on accelerator architectures, architecture development methods and supporting  ...  In particular, (re-)configurable hardware accelerators are indispensable for the development of these specialized and demanding systems, as well as, new design and design automation methodologies to support  ... 
doi:10.1007/978-3-642-03138-0_4 fatcat:5zhnr3ebwraapnqx7ti4z5q4qy
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