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Redistribution aware two-step scheduling for mixed-parallel applications

Sascha Hunold, Thomas Rauber, Frederic Suter
2008 2008 IEEE International Conference on Cluster Computing  
Two redistribution aware mapping strategies are detailed and a study of their impact on the schedule length is proposed through a comparison with an efficient two step algorithm over a broad range of experimental  ...  Most of the mixed-parallel application scheduling algorithms rely on two decoupled steps: allocation and mapping.  ...  Second, because of contention on network links, data redistributions can delay the start date of a task and thus compromise a schedule based only on task execution time reduction.  ... 
doi:10.1109/clustr.2008.4663755 dblp:conf/cluster/HunoldRS08 fatcat:mbw45agfmzc6bemece2fwlqipq

On the importance of bandwidth control mechanisms for scheduling on large scale heterogeneous platforms

Olivier Beaumont, Hejer Rejeb
2010 2010 IEEE International Symposium on Parallel & Distributed Processing (IPDPS)  
We prove that implementations of optimal algorithms that do not enforce prescribed bandwidth sharing can fail by a large amount if TCP contention mechanisms only are used.  ...  We study three scheduling problems (file redistribution, independent tasks scheduling and broadcasting) on large scale heterogeneous platforms under the Bounded Multi-port Model.  ...  The processors with small latencies process more tasks with Implementation 1 than with Implementation 2.  ... 
doi:10.1109/ipdps.2010.5470450 dblp:conf/ipps/BeaumontR10 fatcat:npnoe7edy5eebkf5mo7i5esucu

Fuse-N: Framework for Unified Simulation Environment for Network-on-Chip

Ashwini Raina, Venkatesan Muthukumar
2009 2009 Sixth International Conference on Information Technology: New Generations  
CHAPTER 4 TAS: TRAFFIC AWARE SCHEDULING FOR HARD NOC In this chapter, a novel Traffic Aware Scheduling algorithm (TAS) is proposed for hard NoCs platforms.  ...  A contention aware hot potato routing scheme is proposed in [44] .  ... 
doi:10.1109/itng.2009.237 dblp:conf/itng/RainaM09 fatcat:mfpp5jvmeve3jfajihpw7hkliq

A realistic model and an efficient heuristic for scheduling with heterogeneous processors

O. Beaumont, V. Boudet, Y. Robert
2002 Proceedings 16th International Parallel and Distributed Processing Symposium  
Scheduling computational tasks on processors is a key issue for high-performance computing.  ...  In this paper, we deal with a more realistic model for heterogeneous networks of workstations, where each processor can send and/or receive at most one message at any given time-step.  ...  Communication-aware models from the literature Communication-aware models restrict the use of communication links in various manners.  ... 
doi:10.1109/ipdps.2002.1015663 dblp:conf/ipps/BeaumontBR02 fatcat:hiqxmkwbyvfb7d7qir6tusmwhi

Task Scheduling in Parallel Systems using Genetic Algorithm

Rachhpal Singh
2014 International Journal of Computer Applications  
In this paper, genetic algorithm based on the principles of evolution to obtain an optimal solution for task scheduling is developed.  ...  The common problem of multiprocessor scheduling can be defined as allocating a task graph in a multiprocessor system so that schedule length can be improved.  ...  Job scheduling compacts with the scheduling of autonomous jobs; whereas tasks scheduling is linked to scheduling of tasks belonging to a solitary application program.  ... 
doi:10.5120/18999-0470 fatcat:jlajegwvh5glngv34yl5z7uf3q

Task-FIFO Co-Scheduling of Streaming Applications on MPSoCs with Predictable Memory Hierarchy

Qi Tang, Twan Basten, Marc Geilen, Sander Stuijk, Ji-Bo Wei
2017 ACM Transactions on Embedded Computing Systems  
Randomly generated Synchronous Dataflow Graphs with different sizes and a set of practical applications are used to evaluate the performance of the proposed method.  ...  We propose an efficient Iterationbased Task-FIFO Co-Scheduling algorithm to optimize the FIFO size distribution and task/FIFO assignment.  ...  ACKNOWLEDGMENT The authors would like to thank Yonghui Li for the fruitful discussions about the platform model, and the reviewers for their constructive remarks.  ... 
doi:10.1145/3038484 fatcat:dwsmh7upqrdnnjebe3xpq3aj4e

Task-FIFO Co-scheduling of Streaming Applications on MPSoCs with Predictable Memory Hierarchy

Qi Tang, Twan Basten, Marc Geilen, Sander Stuijk, Ji-Bo Wei
2015 2015 15th International Conference on Application of Concurrency to System Design  
Randomly generated Synchronous Dataflow Graphs with different sizes and a set of practical applications are used to evaluate the performance of the proposed method.  ...  We propose an efficient Iterationbased Task-FIFO Co-Scheduling algorithm to optimize the FIFO size distribution and task/FIFO assignment.  ...  ACKNOWLEDGMENT The authors would like to thank Yonghui Li for the fruitful discussions about the platform model, and the reviewers for their constructive remarks.  ... 
doi:10.1109/acsd.2015.9 dblp:conf/acsd/TangBGSW15 fatcat:qjlhe7r4gvcvjm7i57vwlb6jp4

Scheduling multiple divisible loads on a linear processor network [article]

Matthieu Gallet, Yves Robert (LIP, INRIA Rhône-Alpes), Frédéric Vivien
2007 arXiv   pre-print
We also show how to find an optimal schedule for any instance, once the number of installments per load is given.  ...  Then, we formally state that any optimal schedule has an infinite number of installments under a linear cost model as the one assumed in the original papers.  ...  one, and so on, instead of directly searching for a global optimum.  ... 
arXiv:0706.4038v2 fatcat:3jj2ilvwobeplc75lqhz4nazga

Simulation-Based Performance Analysis and Tuning for a Two-Level Directly Connected System

Ehsan Totoni, Abhinav Bhatele, Eric J. Bohm, Nikhil Jain, Celso L. Mendes, Ryan M. Mokos, Gengbin Zheng, Laxmikant V. Kale
2011 2011 IEEE 17th International Conference on Parallel and Distributed Systems  
BigSim is a simulation-based performance prediction framework designed for these purposes.  ...  In this paper, we demonstrate the utility of BigSim in analyzing and optimizing parallel application performance for future systems based on the PERCS network.  ...  It was also supported in part by a NSF HECURA grant NSF-0833188 and a DOE grant DE-SC0001845 for HPC Colony II.  ... 
doi:10.1109/icpads.2011.121 dblp:conf/icpads/TotoniBBJMMZK11 fatcat:hqmy4uhbmvcp3lizv422jjbg5y

The low power energy aware processing (LEAP) embedded networked sensor system

D. Mclntire, K. Ho, B. Yip, A. Singh, W. Wu, W.J. Kaiser
2006 2006 5th International Conference on Information Processing in Sensor Networks  
This includes image processing, statistical computing, and optimization algorithms required for selection of proper sensor sampling [3] .  ...  both sensing performance and energy dissipation objectives for a broad class of applications.  ...  EXPERIMENTAL RESULTS Experience with development of applications in energy aware environmental monitoring using LEAP demonstrate that a broad range of algorithms may be classified into reactive, proactive  ... 
doi:10.1109/ipsn.2006.243913 fatcat:lvrumubxpbhurhgaacm6ywfg5y

The low power energy aware processing (LEAP)embedded networked sensor system

Dustin McIntire, Kei Ho, Bernie Yip, Amarjeet Singh, Winston Wu, William J. Kaiser
2006 Proceedings of the fifth international conference on Information processing in sensor networks - IPSN '06  
both sensing performance and energy dissipation objectives for a broad class of applications.  ...  To meet these new requirements while maintaining critical support for low energy operation, a new multiprocessor node hardware and software architecture, Low Power Energy Aware Processing (LEAP), has been  ...  EXPERIMENTAL RESULTS Experience with development of applications in energy aware environmental monitoring using LEAP demonstrate that a broad range of algorithms may be classified into reactive, proactive  ... 
doi:10.1145/1127777.1127846 dblp:conf/ipsn/McIntireHYSWK06 fatcat:nfmofetivrgu5b6df3bgrfa3g4

Scheduling multiple divisible loads on a linear processor network

M. Gallet, Y. Robert, F. Vivien
2007 2007 International Conference on Parallel and Distributed Systems  
We also show how to find an optimal scheduling for any instance, once the number of installments per load is given.  ...  Then, we formally prove that any optimal schedule has an infinite number of installments under a linear cost model as the one assumed in [18, 19] .  ...  Figure 1 . 1 Linear network, with m processors and m − 1 links. Start time of computation on processor P i for jth installment of nth load.  ... 
doi:10.1109/icpads.2007.4447768 dblp:conf/icpads/GalletRV07 fatcat:x5v7ayq5wjfjbl6qmruzzwdw5a

Interference-Aware Scheduling

Barbara Kreaseck, Larry Carter, Henri Casanova, Jeanne Ferrante, Sagnik Nandy
2006 The international journal of high performance computing applications  
We then present a model of interference, which can be used for more effective application scheduling, as demonstrated by real-world experiments.  ...  In this paper we empirically evaluate the interference rate of communication on computation via measurements on a single processor communicating on a heterogeneous collection of local and remote processors  ...  The two Interference Aware scheduling algorithms use the Interference Rate of sending to a child node to prioritize the order in which tasks are sent to child nodes.  ... 
doi:10.1177/1094342006061889 fatcat:wwjs2xw3h5h2xb3o4smktuyg5a

Various Approaches for Dynamic Load Balancing for Multiprocessor Interconnection Network

Mukul Varshney, Dr. Anand Sharma, Abhakiran Rajpoot
2017 International Journal of Trend in Scientific Research and Development  
There are numerous issues while designing an efficient dynamic load balancing algorithm that involves utilization of system, amount of information transferred among processors, selection of tasks for migration  ...  Now a days the many researchers doing research on the dynamic load scheduling in multiprocessor system.  ...  Content filtering: some balancers can arbitrarily modify traffic on the way through.  ... 
doi:10.31142/ijtsrd2208 fatcat:efxk2txexjebxouxrl5ueb5yl4

Memory Access Aware Mapping for Networks-on-Chip

Xi Jin, Nan Guan, Qingxu Deng, Wang Yi
2011 2011 IEEE 17th International Conference on Embedded and Real-Time Computing Systems and Applications  
In this paper, we present a memory access aware mapping algorithm for NoC, which explores SDRAM access parallelization in order to offer higher off-chip memory communication efficiency, and eventually  ...  Experimental results showed that, comparing with classical NoC mapping algorithms, our algorithm can significantly improve the memory utilization and overall system throughput (on average 60% improvement  ...  In [4], Chou et al. analyze the impact of network contention and propose a contention-aware application mapping problem which aims at minimizing the network contention and reducing packet latency.  ... 
doi:10.1109/rtcsa.2011.31 dblp:conf/rtcsa/JinGDY11 fatcat:jtqfhypzifbblowpjwqc6ofpji
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