Filters








49 Hits in 13.1 sec

A single-chip 2.4-GHz direct-conversion CMOS receiver for wireless local loop using multiphase reduced frequency conversion technique

Kyeongho Lee, Joonbae Park, Jeong-Woo Lee, Seung-Wook Lee, Hyung Ki Huh, Deog-Kyoon Jeong, Wonchan Kim
2001 IEEE Journal of Solid-State Circuits  
A single-chip direct-conversion CMOS receiver for 2.4-GHz wide-band code-division multiple-access wireless local loop (WLL) is described.  ...  The proposed multiphase reduced frequency conversion scheme combined with a multiphase sampling fractionalprescaler, a cascaded dc-offset canceler and distributed automatic gain control loops offers solutions  ...  A Single-Chip 2.4-GHz Direct-Conversion CMOS I. INTRODUCTION V ARIOUS RF communication systems have been developed for a wide range of applications.  ... 
doi:10.1109/4.918918 fatcat:7qnjfrgbl5cndficp3nhz7tvju

A Four-Channel Beamforming Down-Converter in 90-nm CMOS Utilizing Phase-Oversampling

Richard Tseng, Hao Li, Dae Hyun Kwon, Yun Chiu, Ada S. Y. Poon
2010 IEEE Journal of Solid-State Circuits  
In this paper, a 4-GHz, four-channel, analog-beamforming direct-conversion down-converter in 90-nm CMOS is presented.  ...  Index Terms-Beamforming, Cartesian combining, dynamic range, mixer, multiphase local oscillator (LO), phased arrays, phase-oversampling, phase shifter, RF CMOS, receivers, RF variable gain amplifier (RFVGA  ...  Mast for his support during testing and DARPA TAPO for chip fabrication.  ... 
doi:10.1109/jssc.2010.2063971 fatcat:4cakiltpaba57emyexyz6tw3z4

RFIC 2020 Program

2020 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)  
A ×6 on-chip multiplier is used to generate the 126-138 GHz local oscillator.  ...  These functions are implemented through a direction/frequency-independent single-sideband downconversion process, which well splits the on-chip TX and RX frequencies.  ...  Without using any digital pre-distortion, it achieves an ACLR of -44.5 dBc and an EVM of -35 dB, when applying an 80 MHz 256 QAM signal at 2.4 GHz.  ... 
doi:10.1109/rfic49505.2020.9218389 fatcat:fqkpw3oau5gzpoi3gscgb7kwhi

A Fast-Locking Agile Frequency Synthesizer for MIMO Dual-mode WiFi / WiMAX Applications

Meng-Ting Tsai, Ching-Yuan Yang
2007 2007 14th IEEE International Conference on Electronics, Circuits and Systems  
In this paper, a wide-range and fast-locking phase-locked loop (PLL) frequency synthesizer using the band selection technique for the agile voltage-controlled oscillator (VCO) is proposed.  ...  The synthesizer is implemented in a 0.13-lm CMOS process, which provides the range from 4.6 GHz to 5.4 GHz with the phase noise of -106 dBc/Hz at 1-MHz offset.  ...  In order to generate a pure LO signal with a reasonable gigahertz frequency range, a single-chip PLL-based frequency synthesizer with low power and low cost in CMOS technology is preferred.  ... 
doi:10.1109/icecs.2007.4511257 dblp:conf/icecsys/TsaiY07 fatcat:qvt26qc5ufbjrdfusnhmn7vstq

A fast-locking agile frequency synthesizer for MIMO dual-mode WiFi/WiMAX applications

Meng-Ting Tsai, Ching-Yuan Yang
2009 Analog Integrated Circuits and Signal Processing  
In this paper, a wide-range and fast-locking phase-locked loop (PLL) frequency synthesizer using the band selection technique for the agile voltage-controlled oscillator (VCO) is proposed.  ...  The synthesizer is implemented in a 0.13-lm CMOS process, which provides the range from 4.6 GHz to 5.4 GHz with the phase noise of -106 dBc/Hz at 1-MHz offset.  ...  In order to generate a pure LO signal with a reasonable gigahertz frequency range, a single-chip PLL-based frequency synthesizer with low power and low cost in CMOS technology is preferred.  ... 
doi:10.1007/s10470-009-9355-1 fatcat:77dzkqxhbnfuhmbkj2mhix5d2e

2021 Index IEEE Transactions on Microwave Theory and Techniques Vol. 69

2021 IEEE transactions on microwave theory and techniques  
The Author Index contains the primary entry for each item, listed under the first author's name.  ...  ., +, TMTT March 2021 1654-1660 A 2.4 GHz Power Receiver Embedded With a Low-Power Transmitter and PCE of 53.8%, for Wireless Charging of IoT/Wearable Devices.  ...  ., +, TMTT Jan. 2021 732-744 A Circuit-An Ultralow-Power Current-Reused Direct-Conversion Bluetooth-Low-En-ergy Receiver Front-End in 40-nm CMOS.  ... 
doi:10.1109/tmtt.2022.3156771 fatcat:7iov55dzdnbprgd42epirpfaia

2020 Index IEEE Transactions on Circuits and Systems I: Regular Papers Vol. 67

2020 IEEE Transactions on Circuits and Systems Part 1: Regular Papers  
., +, TCSI Aug. 2020 2647-2658 A 1.22 mW 2.4 GHz PLL Using a Single-Ring-Oscillator-Based Integrator With Background Frequency Calibration.  ...  ., +, TCSI Sept. 2020 2934-2947 A 1.22 mW 2.4 GHz PLL Using a Single-Ring-Oscillator-Based Integrator With Background Frequency Calibration.  ...  ., +, TCSI Dec. 2020 4295-4308 Enhanced Linearity in FD-SOI CMOS Body-Input Analog Circuits -Application to Voltage-Controlled Ring Oscillators and Frequency-Based ΣΔ ADCs.  ... 
doi:10.1109/tcsi.2021.3055003 fatcat:kbmst5td2bbvtl7vpbj3knnkri

2021 Index IEEE Journal of Solid-State Circuits Vol. 56

2021 IEEE Journal of Solid-State Circuits  
The Author Index contains the primary entry for each item, listed under the first author's name.  ...  ., +, JSSC Aug. 2021 2335-2346 A 2.5-nW Radio Platform With an Internal Wake-Up Receiver for Smart Contact Lens Using a Single Loop Antenna.  ...  ., +, JSSC April 2021 1058-1070 A 2.5-nW Radio Platform With an Internal Wake-Up Receiver for Smart Contact Lens Using a Single Loop Antenna.  ... 
doi:10.1109/jssc.2021.3137574 fatcat:nfo3y7i5kncsng36fvi5g5hdre

An inductorless 3–5 GHz band-pass filter with tunable center frequency in 90 nm CMOS

Tuan Anh Vu, Shanthi Sudalaiyandi, Hakon A. Hjortland, Oivind Nass, Tor Sverre Lande
2013 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)  
Accurate distance measurements between sensor nodes used for localization in wireless sensor networks (WSNs) are very attractive for advanced wireless health-care applications.  ...  The main goal of this thesis is to develop an IR-UWB receiver front-end covering the frequency band of 3-5 GHz for the CTBV ranging system.  ...  Acknowledgements This thesis has been submitted to the Faculty of Mathematics and Natural Sciences at the University of Oslo as a part of the requirements for the degree of Philosophiae Doctor in informatics  ... 
doi:10.1109/iscas.2013.6572088 dblp:conf/iscas/VuSHNL13 fatcat:qsh4hcdyobh2tj33ga5t3zdlqi

A 0.6–4.0 GHz RF-Resampling Beamforming Receiver With Frequency-Scaling True-Time-Delays up to Three Carrier Cycles

Kalle Spoof, Mahwish Zahra, Vishnu Unnikrishnan, Kari Stadius, Marko Kosunen, Jussi Ryynanen
2020 IEEE Solid-State Circuits Letters  
(a) multiphase LO generator for a receiver. (b) Latch-based frequency divider.(c) Pulse-skipping slice.  ...  This receiver front-end can be integrated with the direct-conversion receiver presented as design-1 for heterodyne reception to IF frequency.  ... 
doi:10.1109/lssc.2020.3012654 fatcat:xg6ui7nnqrfpjlv47okwlcyj6q

Multiphase interpolating digital power amplifiers for TX beamforming [article]

Zhidong Bai, Wen Yuan, Ali Azam, Jeffrey S. Walling
2020 arXiv   pre-print
This is the first use of multiphase interpolation (MPI) for beam-steering. This technique is ideal for low-frequency beamforming and MIMO, as it does not require passive or LO based phase shifters.  ...  The SCPA is ideal to use as the core element since it can perform frequency translation, data conversion and drive an output at high power and efficiency in a compact die area.  ...  Though using time delay, rather than phase shifting allows for a wider frequency bandwidth, the technique suffers from reduced phase resolution at higher frequency due to the performance of the delay elements  ... 
arXiv:2002.04152v1 fatcat:nn5kv7crg5b5zapwdikkx5tzya

A Polyphase Multipath Technique for Software-Defined Radio Transmitters

Rameswor Shrestha, Eric A. M. Klumperink, Eisse Mensink, Gerard J. M. Wienk, Bram Nauta
2006 IEEE Journal of Solid-State Circuits  
Prototype chips operate from DC to 2.4 GHz with spurs smaller than 40 dBc up to the 17th harmonic (18-path mode) or 5th harmonic (6-path mode) of the transmit frequency, without tuning or calibration.  ...  Using this technique, a wideband and flexible power upconverter with a clean output spectrum is realized in 0.13-m CMOS, aiming at a software-defined radio application.  ...  A recent step in this direction is the use of zero-order hold filtering in a mixer-DAC [4] to reduce DAC related spurs.  ... 
doi:10.1109/jssc.2006.884182 fatcat:qazlybcfrng4ro67b2nlelwfcu

Multiphase Interpolating Digital Power Amplifiers for TX Beamforming

Zhidong Bai, Wen Yuan, Ali Azam, Jeffrey S. Walling
2022 Chips  
This is the first use of multiphase interpolation (MPI) for beam steering. This technique is ideal for low-frequency beamforming and MIMO, as it does not require passive or LO-based phase shifters.  ...  The SCPA is ideal for use as the core element since it can perform frequency translation and data conversion, and drive an output at high power and efficiency in a compact die area.  ...  Although using time delay, rather than phase shifting allows for a wider frequency bandwidth, the technique suffers from reduced phase resolution at higher frequency due to degradation in the performance  ... 
doi:10.3390/chips1010004 fatcat:zfsi3zv4xbdtnc3j5jljbigc3q

Experimental Analysis of 60-GHz VCSEL and ECL Photonic Generation and Transmission of Impulse-Radio Ultra-Wideband Signals

Marta Beltran, Jesper Bevensee Jensen, Roberto Llorente, Idelfonso Tafur Monroy
2011 IEEE Photonics Technology Letters  
The use of 60 GHz CMOS transceivers may provide a cost-effective solution.  ...  In addition, data modulation and up-conversion could be performed by a single integrated dual-cascaded MZM device thus reducing cost and size, for instance using silicon photonics technology [191] .  ... 
doi:10.1109/lpt.2011.2153841 fatcat:7tt6y5jcgfe4led42pdd5lvfre

A 0.5-V 1.6-mW 2.4-GHz Fractional-N All-Digital PLL for Bluetooth LE With PVT-Insensitive TDC Using Switched-Capacitor Doubler in 28-nm CMOS

Naser Pourmousavian, Feng-Wei Kuo, Teerachot Siriburanon, Masoud Babaie, Robert Bogdan Staszewski
2018 IEEE Journal of Solid-State Circuits  
The power consumption reduces to 0.8 mW during the BLE transmission when the DCO switches to open loop.  ...  The ADPLL supports a two-point modulation and forms a Bluetooth low-energy (BLE) transmitter realized in 28-nm CMOS.  ...  ACKNOWLEDGMENT The authors would like to thank Microelectronic Circuits Centre Ireland for associated project support.  ... 
doi:10.1109/jssc.2018.2843337 fatcat:bfghbkvsqbeutkg6pkfbrpfaii
« Previous Showing results 1 — 15 out of 49 results