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Pipeline Architecture of 2d Dct for High Efficiency Video Coding

Dhanya R, Nishi G Nampoothiri
2017 International Journal of Engineering Research and  
In this paper, a novel computation and energy reduction technique for High Efficiency Video Coding (HEVC) Discrete Cosine Transform (DCT) for all Transform Unit (TU) sizes is proposed.  ...  Among them, discrete cosine transform (DCT) is supported by most of modern video standards. The integer DCT is an approximation of DCT. It can be implemented exclusively with integer arithmetic.  ...  It has 50% better video compression efficiency than H.264 standard. It uses Discrete Cosine Transform (DCT) / Inverse Discrete Cosine Transform (IDCT) same as H.264 standard.  ... 
doi:10.17577/ijertv6is050522 fatcat:eggb67ai7vd4fe54kazii27nie

Digital Video Watermarking in the Discrete Cosine Transform Domain

Sadik Ali M. Al-Taweel, Putra Sumari, Saleh Ali K. Alomari, Anas J.A. Husain
2009 Journal of Computer Science  
Approach: We proposed a framework based on the Hartung technique which depended on spread spectrum communication in discrete cosine transform (DCT).  ...  It could be on discrete wavelet transform that is relatively new and has useful properties for the image processing applications.  ...  Discrete Cosine Transformation (DCT), Discrete Furrier Transform (DFT) and Discrete Wavelet Transformation (DWT) are generally used in transform methodologies.  ... 
doi:10.3844/jcssp.2009.536.543 fatcat:vu6zaiwmsvcspnd52m73cgabby

Page 66 of SMPTE Motion Imaging Journal Vol. 104, Issue 2 [page]

1995 SMPTE Motion Imaging Journal  
discrete cosine transform (IDCT) * Motion compensation (MC) ¢ External host processor interface ¢ Memory (DRAM) interface ¢ Display (pixel) interface Reconstructed P Frame © —>- | field field Dual Prime  ...  The chip design is implemented in IBM CMOS-S5L, 0.5um @ 3.3V, technology. It supports an input compressed data rate of up to 15 Mbits/sec and operates at a 40-MHz clock frequency.  ... 

A 110-K transistor 25-MPixels/s configurable image transform processor unit

S. Molloy, R. Jain
1998 IEEE Journal of Solid-State Circuits  
Index Terms-Digital signal processors, discrete cosine transform, image coding, vector quantization, video signal processing.  ...  The processor has been fabricated in 1.2-m CMOS and has been successfully used to execute the discrete cosine transform/inverse discrete cosine transform (DCT/IDCT), subband coding, vector quantization  ...  Schoner, A. Madisetti, and R. Matic for their contributions to this project. The authors are also grateful to Xilinx for providing their FPGA design tools.  ... 
doi:10.1109/4.654940 fatcat:5zmy3eykinfbnpyktkraucgntu

A low-area high-efficiency video coding inverse transform core using resource and time sharing architecture

Yuan-Ho Chen, Chieh-Yang Liu
2020 EURASIP Journal on Advances in Signal Processing  
AbstractIn this paper, a very-large-scale integration (VLSI) design that can support high-efficiency video coding inverse discrete cosine transform (IDCT) for multiple transform sizes is proposed.  ...  The proposed 1-D IDCT core decomposes a 32-point transform into 16-, 8-, and 4-point matrix products according to the symmetric property of the transform coefficient.  ...  The authors would like to thank the National Chip Implementation Center (CIC), Taiwan, for providing the circuit design automation tools and chip fabrication. 1  ... 
doi:10.1186/s13634-020-00708-0 fatcat:ivabsf5ybnauhjkcoevb2rg6ty

Optimal Transform of Multichannel Evoked Neural Signals Using a Video Compression Algorithm

Chen Han Chung, Liang-Gee Chen, Yu-Chieh Kao, Fu-Shan Jaw
2009 2009 3rd International Conference on Bioinformatics and Biomedical Engineering  
Therefore, we use motion vectors (MVs) to reduce the redundancy between successive video frames and successive channels. We also test what transform for neural signal compression is best.  ...  Video compression technology is very important in the field of signal processing, and there are many similarities between multichannel neural signals and video signals.  ...  In video/image compression, the Discrete Cosine Transform (DCT) is used to reduce redundancy. However, our objective is to compress a neural signal.  ... 
doi:10.1109/icbbe.2009.5163149 fatcat:kj6o6nd2tzhynjdvxq4qsuez24

Techniques for FPGA implementation of video compression systems

Brian Schoner, John Villasenor, Steve Molloy, Rajeev Jain
1995 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays - FPGA '95  
Using design techniques that maximize FPGA utilization, we have implemented two video compression systems, each of which uses a single FPGA.  ...  This low-complexity implementation performs well, but is limited to a single compression algorithm.  ...  ., ARPA/CSTO under contract J-FBI-93-112, and by ARPA/CSTO under contract number DABT63-94-C-0085 under a subcontract to National Semiconductor. Software was provided by Xilinx.  ... 
doi:10.1145/201310.201334 dblp:conf/fpga/SchonerVMJ95 fatcat:q72ycaq3jnghjdygm7r63khgai

Techniques for FPGA Implementation of Video Compression Systems

B. Schoner, J. Villasenor, S. Molloy, Rajeev Jain
1995 Third International ACM Symposium on Field-Programmable Gate Arrays  
Using design techniques that maximize FPGA utilization, we have implemented two video compression systems, each of which uses a single FPGA.  ...  This low-complexity implementation performs well, but is limited to a single compression algorithm.  ...  ., ARPA/CSTO under contract J-FBI-93-112, and by ARPA/CSTO under contract number DABT63-94-C-0085 under a subcontract to National Semiconductor. Software was provided by Xilinx.  ... 
doi:10.1109/fpga.1995.242149 fatcat:j3fkxj4eobabzhkdwqdzx5erj4

Discrete Cosine Transform in JPEG Compression [article]

Jacob John
2021 arXiv   pre-print
This paper discusses the need for Discrete Cosine Transform or DCT in the compression of images in Joint Photographic Experts Group or JPEG file format.  ...  Discrete Cosine Transform During the past decade, the Discrete Cosine Transforms or DCT, has found its application in speech and image processing in areas such as compression, filtering, and feature extraction  ...  A variant of DCT, Modified Discrete Cosine Transform (MDCT) [30] , and has found implications for audio coding and error concealment [31] .  ... 
arXiv:2102.06968v1 fatcat:ne3yqmqon5flzntbk5ubrueh54

A video signal processor for MIMD multiprocessing

Jörg Hilgenstock, Klaus Herrmann, Jan Otterstedt, Dirk Niggemeyer, Peter Pirsch
1998 Proceedings of the 35th annual conference on Design automation conference - DAC '98  
For processing of very computation-intensive algorithms or high data rates, several processors can be bus-connected to form a MIMD multiprocessor system.  ...  The video signal processor AxPe1280V has been developed for implementation of different video coding applications according to standards like ITU-T H.261/H.263, and ISO MPEG-1/2.  ...  Low-level tasks, like 2D discrete cosine transform or motion estimation access blocks of 8*8 or 16*16 pixels respectively.  ... 
doi:10.1145/277044.277054 dblp:conf/dac/HilgenstockHONP98 fatcat:hykopa2sz5hw3jlhmq5lwii6zq

HW/SW Co-Design and Implementation of Multi-Standard Video Decoding

Liu Feng, Guo Rui, Shi Shu, Cheng Xu
2006 2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia  
In this paper, we present a design and implementation of multi-standard video decoder, which adopts the principle of HW/SW cooperation to achieve real time video decoding process.  ...  With the assistant hardware accelerating, the proposed video decoder can achieve the MPEG-1/2/4 D1 size (720×576) video decoding at 30 fps.  ...  motion compensation and inverse discrete cosine transform of MPEG video standards.  ... 
doi:10.1109/estmed.2006.321279 dblp:conf/estimedia/FengRSX06 fatcat:p3rmr6lsbrfftnjx36b4kvvule

A Novel Vlsi Architecture Of Hybrid Image Compression Model Based On Reversible Blockade Transform

C. Hemasundara Rao, M. Madhavi Latha
2009 Zenodo  
Furthermore, the discrete cosine transform has emerged as the new state-of-the art standard for image compression.  ...  In this paper, a hybrid image compression technique based on reversible blockade transform coding is proposed.  ...  Separated DCT implementation Fig. 3 . 3 Reversible Blockade Transform correspond to the discrete Walsh transform (DWT), Discrete Cosine Transform (DCT), Discrete Radon Transform (DRT), and Discrete Hartley  ... 
doi:10.5281/zenodo.1084379 fatcat:57x3oze7gnfytgwpcker3ysen4

A real-time vision system using an integrated memory array processor prototype

Yoshihiro Fujita, Nobuyuki Yamashita, Shin'ichiro Okazaki
1994 Machine Vision and Applications  
RVS performance is shown in real-time road-image processing and in a neural network simulation, as well as in low level image processing algorithms, such as filtering, histograms, Discrete Cosine Transform  ...  The RVS image processing is shown to be much faster than the video rate.  ...  The 8 x 8 block size Discrete Cosine Transform (DCT) for a 512x512 pixel image is accomplished in 13 ms.  ... 
doi:10.1007/bf01213412 fatcat:3wij54om4fcohg2kc5w43x7tli

Efficient architecture of variable size HEVC 2D-DCT for FPGA platforms

Min Chen, Yuanzhi Zhang, Chao Lu
2017 AEU - International Journal of Electronics and Communications  
This study presents a design of two-dimensional (2D) discrete cosine transform (DCT) hardware architecture dedicated for High Efficiency Video Coding (HEVC) in field programmable gate array (FPGA) platforms  ...  Keywords-H.265/HEVC, two-dimensional discrete cosine transform (2D-DCT), FPGA platform, hardware architecture  ...  The proposed architecture is able to sustain 4K@30fps UHD TV real-time encoding applications with a reduction of 31-64% in hardware cost.  ... 
doi:10.1016/j.aeue.2016.12.024 fatcat:ifeyivmsszhm7ni6dqff636e4i

Focal-Plane Spatially Oversampling CMOS Image Compression Sensor

Ashkan Olyaei, Roman Genov
2007 IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications  
The 3.1 mm 1.9-mm prototype captures 8-bit digital video at 30 frames/s and yields 4 GMACS projected computational throughput when scaled to HDTV 1080i resolution in discrete cosine transform (DCT) compression  ...  The CMOS image sensor performs spatially compressing image quantization on the focal plane yielding digital output at a rate proportional to the mere information rate of the video.  ...  ACKNOWLEDGMENT The authors thank the CMC foundry service for chip fabrication.  ... 
doi:10.1109/tcsi.2006.887976 fatcat:uclxlotmazdnjj7m63erctbwcu
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