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A scalable ASIP for BP Polar decoding with multiple code lengths

Wan Qiao, Dake Liu, Yansong Wang
2018 MATEC Web of Conferences  
In this paper, we propose a flexible scalable BP Polar decoding application-specific instruction set processor (PASIP) that supports multiple code lengths (64 to 4096) and any code rates.  ...  The comparison with state-of-art Polar decoders reveals PASIP's high area efficiency.  ...  Conclusion In this paper, we propose a scalable Polar decoding ASIP in 65nm CMOS technology, namely PASIP.  ... 
doi:10.1051/matecconf/201823201046 fatcat:iilyhils4jazhf4ad6wbuwfxcm

DNC-Aided SCL-Flip Decoding of Polar Codes [article]

Yaoyu Tao, Zhengya Zhang
2021 arXiv   pre-print
The proposed method consists of two phases: i) a flip DNC (F-DNC) is exploited to rank most likely flip positions for multi-bit flipping; ii) if decoding still fails, a flip-validate DNC (FV-DNC) is used  ...  Successive-cancellation list (SCL) decoding of polar codes has been adopted for 5G. However, the performance is not very satisfactory with moderate code length.  ...  Fig. 1 . 1 Overview of 1) Heuristic bit flipping, 2) LSTM-aided bit flipping and 3) proposed DNC-aided two-phase bit flipping. Fig. 3 . 3 DNC-aided two-phase flip decoding (ω = 3 case).  ... 
arXiv:2101.10498v5 fatcat:7tehp4dtfvdgjkn5rzm7k2pxkm

Scaling Deep Learning-based Decoding of Polar Codes via Partitioning [article]

Sebastian Cammerer, Tobias Gruber, Jakob Hoydis, Stephan ten Brink
2017 arXiv   pre-print
We examine the degradation through partitioning and compare the resulting decoder to state-of-the-art polar decoders such as successive cancellation list and belief propagation decoding.  ...  The resulting decoding algorithm is non-iterative and inherently enables a high-level of parallelization, while showing a competitive bit error rate (BER) performance.  ...  There are two main algorithmic avenues to tackle the polar decoding problem: 1) successive cancellation-based decoding, following a serial "channel layer unwrapping" decoding strategy [3] , 2) belief  ... 
arXiv:1702.06901v1 fatcat:tgahpsg3izg3jalq6nm3rbvohy

A Cat-State Benchmark on a Seven Bit Quantum Computer [article]

E. Knill, R. Laflamme, R. Martinez, C.-H. Tseng
1999 arXiv   pre-print
We propose and experimentally realize an algorithmic benchmark that demonstrates coherent control with a sequence of quantum operations that first generates and then decodes the cat state (|000...>+|111  ...  The experiment has the additional benefit of verifying a seven coherence in a generic system of coupled spins.  ...  This can be accomplished by use of a three step sequence involving transfer of polarization to the adjacent carbon and terminated by a gradient "crusher" (Fig.3) .  ... 
arXiv:quant-ph/9908051v1 fatcat:doitxlc6hrfbrhq4x2bll3tpku

High-fidelityZ-measurement error encoding of optical qubits

J. L. O'Brien, G. J. Pryde, A. G. White, T. C. Ralph
2005 Physical Review A. Atomic, Molecular, and Optical Physics  
We are able to decode the 2-qubit state (up to a bit flip) by performing a measurement on one of the qubits in the logical basis; we find that the 64 1-qubit decoded states arising from 16 real and imaginary  ...  single qubit superposition inputs have an average fidelity of 0.96(3).  ...  FIG. 3 . 3 One-qubit decoded states. A table of density matrices for the six inputs and four decoding measurements listed in the figure.  ... 
doi:10.1103/physreva.71.060303 fatcat:pgxhhkrdi5eg5nlounqhemr6lm

Demonstration of 160- and 320-Gb/s SPECTS O-CDMA network testbeds

Wei Cong, Chunxin Yang, R.P. Scott, V.J. Hernandez, N.K. Fontaine, B.H. Kolner, J.P. Heritage, S.J.B. Yoo
2006 IEEE Photonics Technology Letters  
This letter presents a high-capacity optical code-division multiple-access (O-CDMA) network testbed based on the spectral phase-encoded time-spreading technique.  ...  The first O-CDMA network testbed architecture utilizes eight encoders and a decoder to produce 16 users equally distributed in two time slots while the second architecture evenly distributes 32 users in  ...  In addition to an O-CDMA phase code, each user is assigned a particular time slot and a polarization direction ( or ).  ... 
doi:10.1109/lpt.2006.878160 fatcat:jjwjeeapgna7bpairh573ctcfq

Combinational Circuit Design Based on Quantum-Dot Cellular Automata

Kondwani Makanda, Jun-Cheol Jeon
2015 International Journal of Control and Automation  
The proposed structures reduce the clock phases to only three phases making them faster than the designs currently available in literature.The first proposed structure has reduced number of cells and hence  ...  Quantum-dot cellular automata(QCA) provides a new approach in computer circuit design and development at nanotechnology level.  ...  Equation 1 Figure 3 . 3 The Clocking Scheme in QCA Showing Four Phases and Four Phases of Operation of the QCA Cells in a Clock Cycle (a)QCA Four Phase Clocking Method (b)Actual QCA Operation in a Clock  ... 
doi:10.14257/ijca.2014.7.6.34 fatcat:zogmdyumhvcbnd3jrpkvfghvkm

Novel Multicode-Processing Platform for Wavelength-Hopping Time-Spreading Optical CDMA: A Path to Device Miniaturization and Enhanced Network Functionality

Yue-Kai Huang, Varghese Baby, Ivan Glesk, Camille-Sophie Bres, Christoph M. Greiner, Dmitri Iazikov, Thomas W. Mossberg, Paul R. Prucnal
2007 IEEE Journal of Selected Topics in Quantum Electronics  
Results of simultaneous en/decoding of two wavelength-hopping timespreading codes using a single device are presented.  ...  capability can result in significant simplification of node and system architectures and, thus, provide feasible implementation of schemes to obtain enhanced network performance such as security and scalability  ...  The HBR-based en/decoder shows a slight polarization dependency in the form of a slight blue shift of 100 pm for TEpolarized input light.  ... 
doi:10.1109/jstqe.2007.896098 fatcat:pxef242qj5f2pnstbdrag7kj2m

Benchmarking Quantum Computers: The Five-Qubit Error Correcting Code

E. Knill, R. Laflamme, R. Martinez, C. Negrevergne
2001 Physical Review Letters  
We experimentally implemented the encoding, decoding and error-correction quantum networks using nuclear magnetic resonance on a five spin subsystem of labeled crotonic acid.  ...  Thus, every currently envisaged scalable quantum computer has encoding, decoding and error-correction procedures among its most frequently used subroutines.  ...  Bottom: Decoding Encoding M C 1 C 2 C 3 C 4 Y:90 -Y:90 -Y:90 Y:90 -Y:90 -X:90 -X:90 -X:90 -Y:90 Z:270 Y:90 X:90 Y:90 Z:270 M C 1 C 2 C 3 C 4 M C 1 C 2 C 3  ... 
doi:10.1103/physrevlett.86.5811 pmid:11415364 fatcat:mgxvzhfkvng37beq2rorgxo4mi

Channel Coding Technique for 5G to Improve Flexibility

Annushree Kumari
2021 International Journal for Research in Applied Science and Engineering Technology  
Finally, a framework is designed which is a combination of LDPC codes with polar codes in order to improve information transmission efficiency.  ...  If the coding block is very small then the coding performance, cyclic redundancy, polar coding and interference cancelation decoder can exceed Turbo or LDPC. 3) Turbo Code: This code uses a blend of  ...  Figure 9 shows the NR Polar coding system. Fig.9. NR Polar Coding System 3) Polar and LDPC Cascading System: This section contains LDPC and Polar cascading system.  ... 
doi:10.22214/ijraset.2021.36820 fatcat:vhgvt7ekavcbhkyfmv3tv6gzxe

A fully-integrated digital-intensive polar Doherty transmitter

Yiyu Shen, Mohammadreza Mehrpoo, Mohsen Hashemi, Michael Polushkin, Lei Zhou, Mustafa Acar, Rene van Leuken, Morteza S. Alavi, Leo de Vreede
2017 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)  
Applying DPD for a 20-MHz 64-QAM signal, the measured EVM is better than −30 dB while the average drain efficiency is 24%.  ...  This paper presents an advanced 2.3-2.8 GHz fully-integrated digital-intensive polar Doherty transmitter realized in 40 nm standard CMOS.  ...  This approach enforces a constant amplitude IQ phase vector (shown in Fig. 3 ) to drive the phase modulator.  ... 
doi:10.1109/rfic.2017.7969051 fatcat:4yuy4hasufdpvomdet3srxr4c4

Fault‐tolerant quantum implementation of conventional decoder logic with enable input

Laxmidhar Biswal, Bappaditya Mondal, Hafizur Rahaman
2021 IET Circuits, Devices & Systems  
Quantum Error Correction Code (QECC), and Fault-tolerant quantum computation collectively could protect qubit and improve scalability.  ...  Decoherence is the greatest obstacle to the physical realization of scalable quantum computer, jeopardises coherent superposition of the qubit, and makes qubit extremely fragile.  ...  F I G U R E 3 3 (a) Pictorial representation of conventional 1:2 decoder with enable input.  ... 
doi:10.1049/cds2.12036 fatcat:2b377hsbzzerpkp7qeouml7r6a

Low Hardware Complexity QCA Decoding Architecture Using Inverter Chain

Jun-Cheol Jeon
2016 International Journal of Control and Automation  
This paper presents a quantum-dot cellular automata (QCA) 3-8 decoder with low hardware complexity. The proposed architecture is based on inverter chains to get inverse value and cross over a wire.  ...  Our architecture has not only an excellent regularity and scalability but a strong signal strength so that it is easy to extend a structure and connect with other circuit.  ...  In [12] , they have proposed two 2-4 decoders that reduced the number of gates and clock phases but they use little more cells compared to the previous architectures This paper proposes a 3:8 decoder  ... 
doi:10.14257/ijca.2016.9.4.34 fatcat:xchulmjjzvdqvkuwj6hk5havki

Polar Codes and Their Quantum-Domain Counterparts

Zunaira Babar, Zeynep B. Kaykac Egilmez, Luping Xiang, Daryus Chandra, Robert G. Maunder, Soon Xin Ng, Lajos Hanzo
2019 IEEE Communications Surveys and Tutorials  
Arikan's polar codes are capable of achieving the Shannon's capacity at a low encoding and decoding complexity, while inherently supporting rate adaptation.  ...  Furthermore, we also provide tutorial insights into the polar encoder, decoders as well as the code construction methods.  ...  or bit-and-phase-flip errors, each with a probability of p/3.  ... 
doi:10.1109/comst.2019.2937923 fatcat:tno37ac5izbljlsf7apqcpapsq

A maskable memory architecture for rank-order filtering

Lan-Rong Dung, Meng-Chun Lin
2004 IEEE transactions on consumer electronics  
Combining the bit-sliced read with polarization selector allows PMM to perform polar determination while the partial write achieves polarization.  ...  threshold decomposition and polarization.  ...  With the instruction decoder and maskable memory, the proposed architecture is programmable and scalable.  ... 
doi:10.1109/tce.2004.1309423 fatcat:xe3jl3q7snd4fmew3oaxjbkq5i
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