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16-Channel CMOS Impedance Spectroscopy DNA Analyzer With Dual-Slope Multiplying ADCs
2012
IEEE Transactions on Biomedical Circuits and Systems
Integration is implemented by accumulating output digital bits in the ADC counter over multiple input samples. ...
Each channel occupies an area of only 0.06 mm and consumes 42 W of power from a 1.2 V supply. ...
In DNA sensing applications, the surface of the working electrode is functionalized with a probe DNA. ...
doi:10.1109/tbcas.2012.2226334
pmid:23853233
fatcat:gobygnbzfverniev67ewpogqce
The SST Fully-Synchronous Multi-GHz Analog Waveform Recorder with Nyquist-Rate Bandwidth and Flexible Trigger Capabilities
[article]
2015
arXiv
pre-print
The design and performance of a fully-synchronous multi-GHz analog transient waveform recorder I.C. ("SST") with fast and flexible trigger capabilities is presented. ...
The SST's internal sample clocks are generated synchronously via a shift register driven by an external LVDS oscillator running at half the sample rate (e.g., a 1 GHz oscillator yields 2 G-samples/s). ...
ACKNOWLEDGMENTS We thank Wei Cai for her assistance designing the SST's LVDS receiver. We also thank Steve Barwick and numerous other members of the ARIANNA collaboration for invaluable input. ...
arXiv:1505.07085v1
fatcat:mlivj4d3o5djzhta5hidn5xlqq
A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators and a Wideband Frequency Divider at Millimeter Waves
2011
IEEE Journal of Solid-State Circuits
The quadrature voltage-controlled oscillator (VCO) relies on a ring of two tuned VCOs, where the oscillation frequency depends on inter-stage passive components only, demonstrating low noise and accurate ...
The frequency divider is based on clocked differential amplifiers, working as dynamic CML latches, achieving high speed and low power simultaneously. ...
Fig. 15 . 15 (a) Traditional static CML latch and (b) proposed dynamic CML latch with a sample read and hold cycle. ...
doi:10.1109/jssc.2011.2162468
fatcat:oyca6dcpavckbbdzgxuvtl6xgy
A Power-Efficient Bio-Potential Acquisition Device with DS-MDE Sensors for Long-Term Healthcare Monitoring Applications
2010
Sensors
This work describes a power-efficient bio-potential acquisition device for long-term healthcare applications that is implemented using novel microelectromechanical dry electrodes (MDE) and a low power ...
a 12-bit analog-to-digital converter (ADC). ...
A latch comparator is suitable for a low power ADC circuit. ...
doi:10.3390/s100504777
pmid:22399907
pmcid:PMC3292147
fatcat:i7jf4nw3jzajvlz3s4mliab6c4
A high-performance, reconfigurable, fully integrated time-domain reflectometry architecture using digital I/Os
2021
IEEE Transactions on Instrumentation and Measurement
The receiver of a TDR system plays a key role in recording reflection waveforms; thus, such a receiver must have high analog bandwidth, high sampling rate, and high-voltage resolution. ...
Consequently, there exists a growing technical need for an electronically simple, portable, and low-cost TDR technology. ...
For a limited set of applications, such as soil moisture measurement, the resolution requirements are low [2] ; consequently, efforts have been made to reduce the cost of TDR technology for these applications ...
doi:10.1109/tim.2021.3060586
fatcat:ejkzvhqtk5b3ldrqpaojk4zj7y
A seven nanosecond comparator for single supply operation
[chapter]
2015
Analog Circuit Design
The LT1016 was, and is, a highly successful product. Recent technology trends have emphasized low power, single supply operation. ...
A new device, the LT1394, maintains the speed and application civility of its predecessor while including ground in its input operating range. ...
Emitter Switched Current Source Has Clean,
Figure 74 . 74 Sampling Pulse (Trace D) May Be Positioned at Desired Point on Input Waveform (Trace A) Figure 73. 10ns Sample-and-Hold for Repetitive Signals ...
doi:10.1016/b978-0-12-800001-4.00482-8
fatcat:63g6xgsngbhdnimox3qdmeeoje
CMOS impedance spectrum analyzer with dual-slope multiplying ADC
2011
2011 IEEE Biomedical Circuits and Systems Conference (BioCAS)
Integration is implemented by accumulating output digital bits in the ADC counter over multiple input samples. ...
We present a multi-channel, mixed-signal VLSI architecture that utilizes frequency response analysis (FRA) to extract the real and imaginary components of a biosensor impedance. ...
For example, in DNA sensing applications, the surface of the working electrode is functionalized with the probe DNA. ...
doi:10.1109/biocas.2011.6107802
fatcat:4pwzpubiurgcpjogjbvgngi6im
High speed comparator techniques
[chapter]
2013
Analog Circuit Design
Figure 23 .Figure 24 . 2324 200ns Sample-and-Hold Fast Sample-and-Hold Waveforms. Traces A-C Show Ramp-Compare Action. ...
When conversion is complete, the status line (Trace E) drops low and C1's latch is set by the TTL inverter, preventing the comparator from responding to input noise or shifts. ...
doi:10.1016/b978-0-12-397888-2.00017-1
fatcat:fg6kwp5b3jfjjfgtnuubzkesxy
Accurate in situ measurement of peak noise and delay change induced by interconnect coupling
2001
IEEE Journal of Solid-State Circuits
The proposed measurement technique can be used for interconnect model verification and calibration, and has applications to various design automation tools such as noise-aware static timing analysis. ...
This paper improves upon previous work by proposing 1) a novel accurate peak detector to measure on-chip crosstalk noise, and 2) in situ measurement structure to characterize the dynamic delay effect. ...
Meyer of University of California, Berkeley, for their helpful suggestions and discussions. The authors also acknowledge X. Huang and A. ...
doi:10.1109/4.953489
fatcat:5symvgeasrdsvo6i6ivsunrprq
A Broadband Static Frequency Divider up to 62 GHz in InP DHBT with Capacitive Degeneration
2022
IEICE Electronics Express
A broadband static frequency divider fabricated in a 165 GHz f t 0.8 µm InP DHBT process is described. ...
With single-ended sinewave input, the divider is operational in 2∼62 GHz, exhibiting a 0.36f t frequency range. ...
Fig. 4 4 Fig. 4 Equivalent half circuit of the ECL latch in "sample" state.
Fig. 5 5 Fig. 5 (a) Simulated waveforms of i c ,7 at 50 GHz input frequency. ...
doi:10.1587/elex.19.20220117
fatcat:vn4emivbnnbcxdxhjje4btuvry
A low-light-level sensor for medical diagnostic applications
2001
IEEE Journal of Solid-State Circuits
A low-level light sensor and preprocessor for a disposable medical probe is described. ...
A single-bit first-order sigma-delta modulator has been employed for analog-to-digital conversion, thanks to its robustness, simplicity, inherent linearity, and high signal-to-noise ratio. ...
Nemirovsky and A. Ezion for motivating this research. Comments by the anonymous referees have helped improve this paper and correct errors. ...
doi:10.1109/4.953484
fatcat:c5255xxfsfguze3dstrta272ti
On-chip oscilloscopes for noninvasive time-domain measurement of waveforms in digital integrated circuits
2003
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
In this work, we explore the feasibility of integrating primitive sampling oscilloscopes on-chip to provide waveforms on selective critical nets for test and diagnosis. ...
High-speed samplers are combined with delay-locked loops (DLLs) and a simple 8-bit analog-to-digital converter (ADC) to convert the waveforms into digital data that can be incorporated as part of the chip ...
In latch mode, the regenerative action is enabled, producing nearly full-rail output. This track-and-latch architecture gives good comparator resolution without the need for a multistage amplifier. ...
doi:10.1109/tvlsi.2003.812313
fatcat:7raffkyiefdsbphvorxwtla3qq
All-Digital Ring-Oscillator-Based Macro for Sensing Dynamic Supply Noise Waveform
2009
IEEE Journal of Solid-State Circuits
This paper proposes an all-digital measurement circuit called a "gated oscillator" to capture the waveforms of dynamic power supply noise. ...
Its performance was evaluated using test chips fabricated in a 90 nm process. ...
Fig . 30 compares the measured supply noise waveforms of TEGs E and F. ...
doi:10.1109/jssc.2009.2020192
fatcat:3jcxrk352besrem3dqsda76czi
Advanced transient waveform digitizers
2003
Particle Astrophysics Instrumentation
Temporal noise is typically equivalent to ~1 mV RMS, for a signal to noise ratio of ~2,500:1, RMS. ...
The fast triggering and waveform capture, channel-parallel digitization and convenient word-parallel digital readout results in a responsive and low dead-time system. ...
Each ADC consists of a comparator, a 10-bit latch, and ancillary logic. All 128 ADCs share a single on-chip analog ramp and a synchronized 10-bit gray-code counter. ...
doi:10.1117/12.472486
fatcat:mdcjau34jbcudfdloxy2iaftyq
A 4-GHz effective sample rate integrated test core for analog and mixed-signal circuits
2002
IEEE Journal of Solid-State Circuits
The core consists of a completely digital implementation, except for a simple reconstruction filter and a comparator. ...
It is capable of both generating arbitrary band-limited waveforms (for excitation purposes) and coherently digitizing arbitrary periodic analog waveforms (for DSP-based test and measurement). ...
Collected waveform samples are highlighted with circles.
Fig. 11 . 11 (a) Converting the comparator into a digital latch to verify functionality. ...
doi:10.1109/4.991388
fatcat:w4m55qus2vbz3hgmg4n3feidtm
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